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[MIPS] Count timer interrupts correctly.
author
Chris Dearman
<chris@mips.com>
Thu, 21 Jun 2007 11:59:58 +0000
(12:59 +0100)
committer
Ralf Baechle
<ralf@linux-mips.org>
Tue, 26 Jun 2007 17:57:34 +0000
(19:57 +0200)
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/smtc.c
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diff --git
a/arch/mips/kernel/smtc.c
b/arch/mips/kernel/smtc.c
index 2e011470c347d34389d660ab6f748d583d1b75d4..046b03b1705ab5177f0c2f8bf8ce5ef8d48f0c05 100644
(file)
--- a/
arch/mips/kernel/smtc.c
+++ b/
arch/mips/kernel/smtc.c
@@
-822,7
+822,7
@@
void ipi_decode(struct smtc_ipi *pipi)
switch (type_copy) {
case SMTC_CLOCK_TICK:
irq_enter();
- kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_
perfcount
_irq]++;
+ kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_
compare
_irq]++;
/* Invoke Clock "Interrupt" */
ipi_timer_latch[dest_copy] = 0;
#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG