clk: renesas: r8a779g0: Add Audio clocks
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Thu, 2 Feb 2023 01:03:24 +0000 (01:03 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 6 Mar 2023 09:42:14 +0000 (10:42 +0100)
Add module clocks for the Audio (SSI/SSIU) blocks on the Renesas R-Car
V4H (R8A779G0) SoC.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/878rhganfo.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a779g0-cpg-mssr.c

index 7fca112..18a9462 100644 (file)
@@ -213,6 +213,8 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
        DEF_MOD("pfc1",         916,    R8A779G0_CLK_CL16M),
        DEF_MOD("pfc2",         917,    R8A779G0_CLK_CL16M),
        DEF_MOD("pfc3",         918,    R8A779G0_CLK_CL16M),
+       DEF_MOD("ssiu",         2926,   R8A779G0_CLK_S0D6_PER),
+       DEF_MOD("ssi",          2927,   R8A779G0_CLK_S0D6_PER),
 };
 
 /*