ASoC: AMD: Change MCLK to 48Mhz
authorAkshu Agrawal <akshu.agrawal@amd.com>
Tue, 21 Aug 2018 06:59:43 +0000 (12:29 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 20 Nov 2019 17:45:34 +0000 (18:45 +0100)
[ Upstream commit a1b1e9880f0c2754a5ac416a546d9f295f72eabc ]

25Mhz MCLK which was earlier used was of spread type.
Thus, we were not getting accurate rate. The 48Mhz system
clk is of non-spread type and we are changing to it to get
accurate rate.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
sound/soc/amd/acp-da7219-max98357a.c

index 8e3275a..e53b54d 100644 (file)
@@ -42,7 +42,7 @@
 #include "../codecs/da7219.h"
 #include "../codecs/da7219-aad.h"
 
-#define CZ_PLAT_CLK 25000000
+#define CZ_PLAT_CLK 48000000
 #define DUAL_CHANNEL           2
 
 static struct snd_soc_jack cz_jack;