SI_PARAM_START_INSTANCE);
break;
+ case TGSI_SEMANTIC_DRAWID:
+ value = LLVMGetParam(radeon_bld->main_fn,
+ SI_PARAM_DRAWID);
+ break;
+
case TGSI_SEMANTIC_INVOCATIONID:
if (ctx->type == PIPE_SHADER_TESS_CTRL)
value = unpack_param(ctx, SI_PARAM_REL_IDS, 8, 5);
params[SI_PARAM_VERTEX_BUFFERS] = const_array(ctx->v16i8, SI_NUM_VERTEX_BUFFERS);
params[SI_PARAM_BASE_VERTEX] = ctx->i32;
params[SI_PARAM_START_INSTANCE] = ctx->i32;
- num_params = SI_PARAM_START_INSTANCE+1;
+ params[SI_PARAM_DRAWID] = ctx->i32;
+ num_params = SI_PARAM_DRAWID+1;
if (shader->key.vs.as_es) {
params[ctx->param_es2gs_offset = num_params++] = ctx->i32;
SI_SGPR_VERTEX_BUFFERS_HI,
SI_SGPR_BASE_VERTEX,
SI_SGPR_START_INSTANCE,
+ SI_SGPR_DRAWID,
SI_ES_NUM_USER_SGPR,
/* hw VS only */
SI_PARAM_VERTEX_BUFFERS = SI_NUM_RESOURCE_PARAMS,
SI_PARAM_BASE_VERTEX,
SI_PARAM_START_INSTANCE,
+ SI_PARAM_DRAWID,
/* [0] = clamp vertex color, VS as VS only */
SI_PARAM_VS_STATE_BITS,
/* same value as TCS_IN_LAYOUT, VS as LS only */
- SI_PARAM_LS_OUT_LAYOUT = SI_PARAM_START_INSTANCE + 1,
+ SI_PARAM_LS_OUT_LAYOUT = SI_PARAM_DRAWID + 1,
/* the other VS parameters are assigned dynamically */
/* Layout of TCS outputs in the offchip buffer