phy: phy-mtk-tphy: disable hardware efuse when set INTR
authorChunfeng Yun <chunfeng.yun@mediatek.com>
Wed, 14 Sep 2022 06:07:43 +0000 (14:07 +0800)
committerVinod Koul <vkoul@kernel.org>
Tue, 20 Sep 2022 06:29:05 +0000 (11:59 +0530)
INTR's value is able autoload from hardware efuse by default, when
software tries to update its value, should disable hardware efuse
firstly.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20220914060746.10004-4-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/mediatek/phy-mtk-tphy.c

index 986fde0..7f40b8b 100644 (file)
@@ -874,9 +874,14 @@ static void u2_phy_props_set(struct mtk_tphy *tphy,
                mtk_phy_update_bits(com + U3P_USBPHYACR1, PA1_RG_TERM_SEL,
                                    PA1_RG_TERM_SEL_VAL(instance->eye_term));
 
-       if (instance->intr)
+       if (instance->intr) {
+               if (u2_banks->misc)
+                       mtk_phy_set_bits(u2_banks->misc + U3P_MISC_REG1,
+                                        MR1_EFUSE_AUTO_LOAD_DIS);
+
                mtk_phy_update_bits(com + U3P_USBPHYACR1, PA1_RG_INTR_CAL,
                                    PA1_RG_INTR_CAL_VAL(instance->intr));
+       }
 
        if (instance->discth)
                mtk_phy_update_bits(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH,