*doc/install.texi: Add s390 s390x as new targets.

	*doc/invoke.texi: Add documantation of S/390 and zSeries
	target options.
	* doc/md.texi: Add documantation of S/390 and zSeries constraints.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@44501 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7995bfb..85b915b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2001-07-31 Hartmut Penner <hpenner@de.ibm.com>
+
+        * doc/install.texi: Add s390 and s390x as new targets.
+        * doc/invoke.texi: Add documantation of S/390 and zSeries
+        target options.
+        * doc/md.texi: Add documantation of S/390 and zSeries constraints.
+
 2001-07-30  Roman Zippel  <zippel@linux-m68k.org>
 
        * config/m68k/m68k.md: Replace all general_operand with

diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index b5a08de..1e61127 100644 (file)
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -1375,6 +1375,10 @@ GNU Compiler Collection on your machine.
 @item
 @uref{#romp-*-aos,,romp-*-aos, romp-*-mach}
 @item
+@uref{#s390-*-linux*}
+@item
+@uref{#s390x-*-linux*}
+@item
 @uref{#*-*-solaris*,,*-*-solaris*}
 @item
 @uref{#sparc-sun-solaris*,,sparc-sun-solaris*}
@@ -2930,6 +2934,20 @@ can be safely ignored; the stage 3 compiler is correct.
 </p>
 <hr>
 @end html
+@heading @anchor{s390-*-linux*}s390-*-linux*
+S/390 system running Linux for S/390@. 
+
+@html
+</p>
+<hr>
+@end html
+@heading @anchor{s390x-*-linux*}s390x-*-linux*
+zSeries system (64 Bit) running Linux for zSeries@. 
+
+@html
+</p>
+<hr>
+@end html
 @heading @anchor{*-*-solaris*}*-*-solaris*
 
 Sun does not ship a C compiler with Solaris.  To bootstrap and install

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index f3b3e8e..4ac1834 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -577,6 +577,12 @@ in the following sections.
 -minline-divide-max-throughput  -mno-dwarf2-asm @gol
 -mfixed-range=@var{register-range}}
 
+@emph{S/390 and zSeries Options}
+@gccoptlist{
+-mhard-float  -msoft-float  -mbackchain  -mno-backchain @gol
+-msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle @gol
+-m64 -m31 -mdebug -mno-debug}
+
 @item Code Generation Options
 @xref{Code Gen Options,,Options for Code Generation Conventions}.
 @gccoptlist{
@@ -5083,6 +5089,7 @@ that macro, which enables you to change the defaults.
 * MCore Options::
 * IA-64 Options::
 * D30V Options::
+* S/390 and zSeries Options::
 @end menu
 
 @node M680x0 Options
@@ -8976,6 +8983,71 @@ Specify the maximum number of conditionally executed instructions that
 replace a branch.  The default is 4.
 @end table
 
+@node S/390 and zSeries Options
+@subsection S/390 and zSeries Options
+@cindex S/390 and zSeries Options
+
+These are the @samp{-m} options defined for the S/390 and zSeries architecture.
+
+@table @gcctabopt
+@item -mhard-float
+@itemx -msoft-float
+@opindex mhard-float
+@opindex msoft-float
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations.  When @option{-msoft-float} is specified,
+functions in @file{libgcc.a} will be used to perform floating-point
+operations.  When @option{-mhard-float} is specified, the compiler
+generates IEEE floating-point instructions.  This is the default.
+
+@item -mbackchain
+@itemx -mno-backchain
+@opindex mbackchain
+@opindex mno-backchain
+Generate (or do not generate) code which maintains an explicit 
+backchain within the stack frame that points to the caller's frame.
+This is currently needed to allow debugging.  The default is to
+generate the backchain.
+
+@item -msmall-exec
+@itemx -mno-small-exec
+@opindex msmall-exec
+@opindex mno-small-exec
+Generate (or do not generate) code using the @code{bras} instruction 
+to do subroutine calls. 
+This only works reliably if the total executable size does not
+exceed 64k.  The default is to use the @code{basr} instruction instead,
+which does not have this limitation.
+
+@item -m64
+@itemx -m31
+@opindex m64
+@opindex m31
+When @option{-m31} is specified, generate code compliant to the
+Linux for S/390 ABI@.  When @option{-m64} is specified, generate
+code compliant to the Linux for zSeries ABI@.  This allows GCC in
+particular to generate 64-bit instructions.  For the @samp{s390}
+targets, the default is @option{-m31}, while the @samp{s390x} 
+targets default to @option{-m64}.
+
+@item -mmvcle
+@itemx -mno-mvcle
+@opindex mmvcle
+@opindex mno-mvcle
+Generate (or do not generate) code using the @code{mvcle} instruction 
+to perform block moves.  When @option{-mno-mvcle} is specifed,
+use a @code{mvc} loop instead.  This is the default.
+
+@item -mdebug
+@itemx -mno-debug
+@opindex mdebug
+@opindex mno-debug
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
+
+@end table
+
+
 @node Code Gen Options
 @section Options for Code Generation Conventions
 @cindex code generation conventions

diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 0a79f34..e546706 100644 (file)
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -1963,6 +1963,38 @@ Direct memory reference
 Symbolic address
 
 @end table
+
+@item S/390 and zSeries---@file{s390.h}
+@table @code
+@item a
+Address register (general purpose register except r0)
+
+@item d
+Data register (arbitrary general purpose register)
+
+@item f
+Floating-point register
+
+@item I
+Unsigned 8-bit constant (0--255)
+
+@item J
+Unsigned 12-bit constant (0--4095)
+
+@item K
+Signed 16-bit constant (@minus{}32768--32767)
+
+@item L
+Unsigned 16-bit constant (0--65535)
+
+@item Q
+Memory reference without index register
+
+@item S
+Symbolic constant suitable for use with the @code{larl} instruction
+
+@end table
+
 @end table
 
 @ifset INTERNALS