Soft reset during tc_bridge_enable() is triggered by setting all available
reset control bits in the SYSRST register.
But as noted in the data sheet resetting the i2c-slave controller should
be only done over DSI and is only useful for chip debugging.
So do not set RSTI2CS (bit0).
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220901131951.1116512-1-t.remmet@phytec.de
(val >> 8) & 0xFF, val & 0xFF);
d2l_write(tc->i2c, SYSRST, SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM |
- SYS_RST_LCD | SYS_RST_I2CM | SYS_RST_I2CS);
+ SYS_RST_LCD | SYS_RST_I2CM);
usleep_range(30000, 40000);
d2l_write(tc->i2c, PPI_TX_RX_TA, TTA_GET | TTA_SURE);