Handle identifying AMDGPU bitcode files
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 27 Aug 2018 12:40:00 +0000 (12:40 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 27 Aug 2018 12:40:00 +0000 (12:40 +0000)
llvm-svn: 340738

lld/ELF/InputFiles.cpp
lld/test/ELF/lto/amdgcn.ll [new file with mode: 0644]
lld/test/ELF/lto/r600.ll [new file with mode: 0644]

index 93c2f76..5610498 100644 (file)
@@ -1053,6 +1053,9 @@ static uint8_t getBitcodeMachineKind(StringRef Path, const Triple &T) {
   switch (T.getArch()) {
   case Triple::aarch64:
     return EM_AARCH64;
+  case Triple::amdgcn:
+  case Triple::r600:
+    return EM_AMDGPU;
   case Triple::arm:
   case Triple::thumb:
     return EM_ARM;
diff --git a/lld/test/ELF/lto/amdgcn.ll b/lld/test/ELF/lto/amdgcn.ll
new file mode 100644 (file)
index 0000000..4281e20
--- /dev/null
@@ -0,0 +1,12 @@
+; REQUIRES: amdgpu
+; RUN: llvm-as %s -o %t.o
+; RUN: ld.lld %t.o -o %t
+
+; Make sure the amdgcn triple is handled
+
+target triple = "amdgcn-amd-amdhsa"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+define void @_start() {
+  ret void
+}
diff --git a/lld/test/ELF/lto/r600.ll b/lld/test/ELF/lto/r600.ll
new file mode 100644 (file)
index 0000000..1c95edc
--- /dev/null
@@ -0,0 +1,12 @@
+; REQUIRES: amdgpu
+; RUN: llvm-as %s -o %t.o
+; RUN: ld.lld %t.o -o %t
+
+; Make sure the r600 triple is handled
+
+target triple = "r600-mesa-mesa3d"
+target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+define void @_start() {
+  ret void
+}