vdin: tl1: add viu loop back vpp path [1/1]
authorXuhua Zhang <xuhua.zhang@amlogic.com>
Thu, 3 Jan 2019 07:30:17 +0000 (15:30 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 7 Jan 2019 11:04:43 +0000 (03:04 -0800)
PD#SWPL-2676

Problem:
tl1 viu loop back error

Solution:
add viu loop back vpp path

Verify:
TL1 X301

Change-Id: I4069f6bbd6672d89bd93a0c8b275cfffc273c427
Signed-off-by: Xuhua Zhang <xuhua.zhang@amlogic.com>
drivers/amlogic/media/vin/tvin/vdin/vdin_debug.c
drivers/amlogic/media/vin/tvin/viu/viuin.c
include/linux/amlogic/media/frame_provider/tvin/tvin.h

index 72fee04..4309aed 100644 (file)
@@ -1631,6 +1631,9 @@ start_chk:
                } else if (!strcmp(parm[1], "video")) {
                        param.port = TVIN_PORT_VIU1_VIDEO;
                        pr_info(" port is TVIN_PORT_VIU_VIDEO\n");
+               } else if (!strcmp(parm[1], "viu_wb0_vpp")) {
+                       param.port = TVIN_PORT_VIU1_WB0_VPP;
+                       pr_info(" port is TVIN_PORT_VIU1_WB0_VPP\n");
                } else if (!strcmp(parm[1], "viu_wb0_vd1")) {
                        param.port = TVIN_PORT_VIU1_WB0_VD1;
                        pr_info(" port is TVIN_PORT_VIU_WB0_VD1\n");
@@ -1646,6 +1649,9 @@ start_chk:
                } else if (!strcmp(parm[1], "viu_wb0_post_blend")) {
                        param.port = TVIN_PORT_VIU1_WB0_POST_BLEND;
                        pr_info(" port is TVIN_PORT_VIU_WB0_POST_BLEND\n");
+               } else if (!strcmp(parm[1], "viu_wb1_vpp")) {
+                       param.port = TVIN_PORT_VIU1_WB1_VPP;
+                       pr_info(" port is TVIN_PORT_VIU1_WB1_VPP\n");
                } else if (!strcmp(parm[1], "viu_wb1_vd1")) {
                        param.port = TVIN_PORT_VIU1_WB1_VD1;
                        pr_info(" port is TVIN_PORT_VIU_WB1_VD1\n");
@@ -1667,6 +1673,9 @@ start_chk:
                } else if (!strcmp(parm[1], "video2")) {
                        param.port = TVIN_PORT_VIU2_VIDEO;
                        pr_info(" port is TVIN_PORT_VIU_VIDEO\n");
+               } else if (!strcmp(parm[1], "viu2_wb0_vpp")) {
+                       param.port = TVIN_PORT_VIU2_WB0_VPP;
+                       pr_info(" port is TVIN_PORT_VIU2_WB0_VPP\n");
                } else if (!strcmp(parm[1], "viu2_wb0_vd1")) {
                        param.port = TVIN_PORT_VIU2_WB0_VD1;
                        pr_info(" port is TVIN_PORT_VIU_WB0_VD1\n");
@@ -1682,6 +1691,9 @@ start_chk:
                } else if (!strcmp(parm[1], "viu2_wb0_post_blend")) {
                        param.port = TVIN_PORT_VIU2_WB0_POST_BLEND;
                        pr_info(" port is TVIN_PORT_VIU_WB0_POST_BLEND\n");
+               } else if (!strcmp(parm[1], "viu2_wb1_vpp")) {
+                       param.port = TVIN_PORT_VIU2_WB1_VPP;
+                       pr_info(" port is TVIN_PORT_VIU2_WB1_VPP\n");
                } else if (!strcmp(parm[1], "viu2_wb1_vd1")) {
                        param.port = TVIN_PORT_VIU2_WB1_VD1;
                        pr_info(" port is TVIN_PORT_VIU_WB1_VD1\n");
index 3fe16a6..15cf430 100644 (file)
@@ -165,6 +165,9 @@ void viuin_check_venc_line(struct viuin_s *devp_local)
                pr_info("**************%s,vencv_line_cur:%d,cnt:%d***********\n",
                                __func__, vencv_line_cur, cnt);
 }
+
+/*g12a/g12b and before: use viu_loop encl/encp*/
+/*tl1: use viu_loop vpp */
 static int viuin_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
 {
        struct viuin_s *devp = container_of(fe, struct viuin_s, frontend);
@@ -256,8 +259,12 @@ static int viuin_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
                else if ((port == TVIN_PORT_VIU1_WB0_POST_BLEND) ||
                        (port == TVIN_PORT_VIU2_WB0_POST_BLEND))
                        wr_bits_viu(VPP_WRBAK_CTRL, 5, 0, 3);
+               else if ((port == TVIN_PORT_VIU1_WB0_VPP) ||
+                       (port == TVIN_PORT_VIU2_WB0_VPP))
+                       wr_bits_viu(VPP_WRBAK_CTRL, 6, 0, 3);
                else
                        wr_bits_viu(VPP_WRBAK_CTRL, 0, 4, 3);
+
                if ((port == TVIN_PORT_VIU1_WB1_VD1) ||
                        (port == TVIN_PORT_VIU2_WB1_VD1))
                        wr_bits_viu(VPP_WRBAK_CTRL, 1, 4, 3);
@@ -273,8 +280,12 @@ static int viuin_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
                else if ((port == TVIN_PORT_VIU1_WB1_POST_BLEND) ||
                        (port == TVIN_PORT_VIU2_WB1_POST_BLEND))
                        wr_bits_viu(VPP_WRBAK_CTRL, 5, 4, 3);
+               else if ((port == TVIN_PORT_VIU1_WB1_VPP) ||
+                       (port == TVIN_PORT_VIU2_WB1_VPP))
+                       wr_bits_viu(VPP_WRBAK_CTRL, 6, 4, 3);
                else
                        wr_bits_viu(VPP_WRBAK_CTRL, 0, 4, 3);
+
                /*wrback hsync en*/
                if (((port >= TVIN_PORT_VIU1_WB0_VD1) &&
                        (port <= TVIN_PORT_VIU1_WB0_POST_BLEND)) ||
@@ -387,7 +398,11 @@ static void viuin_sig_property(struct tvin_frontend_s *fe,
        if (devp->parm.port == TVIN_PORT_VIU1_VIDEO)
                prop->color_format = TVIN_YUV444;
        else if ((devp->parm.port == TVIN_PORT_VIU1) ||
-               (devp->parm.port == TVIN_PORT_VIU2)) {
+               (devp->parm.port == TVIN_PORT_VIU2) ||
+               (devp->parm.port == TVIN_PORT_VIU1_WB0_VPP) ||
+               (devp->parm.port == TVIN_PORT_VIU1_WB1_VPP) ||
+               (devp->parm.port == TVIN_PORT_VIU2_WB0_VPP) ||
+               (devp->parm.port == TVIN_PORT_VIU2_WB1_VPP)) {
                vinfo = get_current_vinfo();
                prop->color_format = vinfo->viu_color_fmt;
        } else
index 4b106fb..f933f11 100644 (file)
@@ -64,11 +64,13 @@ enum tvin_port_e {
        TVIN_PORT_VIU1_WB0_VD2,
        TVIN_PORT_VIU1_WB0_OSD1,
        TVIN_PORT_VIU1_WB0_OSD2,
+       TVIN_PORT_VIU1_WB0_VPP,
        TVIN_PORT_VIU1_WB0_POST_BLEND,
        TVIN_PORT_VIU1_WB1_VD1,
        TVIN_PORT_VIU1_WB1_VD2,
        TVIN_PORT_VIU1_WB1_OSD1,
        TVIN_PORT_VIU1_WB1_OSD2,
+       TVIN_PORT_VIU1_WB1_VPP,
        TVIN_PORT_VIU1_WB1_POST_BLEND,
        TVIN_PORT_VIU2 = 0x0000C000,
        TVIN_PORT_VIU2_VIDEO,
@@ -76,11 +78,13 @@ enum tvin_port_e {
        TVIN_PORT_VIU2_WB0_VD2,
        TVIN_PORT_VIU2_WB0_OSD1,
        TVIN_PORT_VIU2_WB0_OSD2,
+       TVIN_PORT_VIU2_WB0_VPP,
        TVIN_PORT_VIU2_WB0_POST_BLEND,
        TVIN_PORT_VIU2_WB1_VD1,
        TVIN_PORT_VIU2_WB1_VD2,
        TVIN_PORT_VIU2_WB1_OSD1,
        TVIN_PORT_VIU2_WB1_OSD2,
+       TVIN_PORT_VIU2_WB1_VPP,
        TVIN_PORT_VIU2_WB1_POST_BLEND,
        TVIN_PORT_MIPI = 0x00010000,
        TVIN_PORT_ISP = 0x00020000,