arm64: dts: qcom: sc8180x: Mark PCIe hosts cache-coherent

[ Upstream commit 45e8c72712345263208f7c94f334fa718634f557 ]

The PCIe controllers on 8180 are cache-coherent. Mark them as such.

Fixes: d20b6c84f56a ("arm64: dts: qcom: sc8180x: Add PCIe instances")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231219-topic-8180_pcie_dmac-v1-1-5d00fc1b23fd@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 486f7ff..0d85bde 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -1751,6 +1751,7 @@
 
                        phys = <&pcie0_lane>;
                        phy-names = "pciephy";
+                       dma-coherent;
 
                        status = "disabled";
                };
@@ -1858,6 +1859,7 @@
 
                        phys = <&pcie3_lane>;
                        phy-names = "pciephy";
+                       dma-coherent;
 
                        status = "disabled";
                };
@@ -1965,6 +1967,7 @@
 
                        phys = <&pcie1_lane>;
                        phy-names = "pciephy";
+                       dma-coherent;
 
                        status = "disabled";
                };
@@ -2072,6 +2075,7 @@
 
                        phys = <&pcie2_lane>;
                        phy-names = "pciephy";
+                       dma-coherent;
 
                        status = "disabled";
                };