The "DMA Status" registers are sequential in the enum ni_gpct_register.
Replace this inline CamelCase function with a simple define.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
#define NITIO_STATUS1_REG(x) (NITIO_G01_STATUS1 + ((x) / 2))
#define NITIO_STATUS2_REG(x) (NITIO_G01_STATUS2 + ((x) / 2))
#define NITIO_DMA_CFG_REG(x) (NITIO_G0_DMA_CFG + (x))
-
-static inline enum ni_gpct_register NITIO_Gi_DMA_Status_Reg(unsigned idx)
-{
- switch (idx) {
- case 0:
- return NITIO_G0_DMA_STATUS;
- case 1:
- return NITIO_G1_DMA_STATUS;
- case 2:
- return NITIO_G2_DMA_STATUS;
- case 3:
- return NITIO_G3_DMA_STATUS;
- }
- return 0;
-}
+#define NITIO_DMA_STATUS_REG(x) (NITIO_G0_DMA_STATUS + (x))
static inline enum ni_gpct_register NITIO_Gi_ABZ_Reg(unsigned idx)
{
case ni_gpct_variant_m_series:
case ni_gpct_variant_660x:
if (read_register(counter,
- NITIO_Gi_DMA_Status_Reg
+ NITIO_DMA_STATUS_REG
(counter->counter_index)) & Gi_DRQ_Error_Bit) {
dev_notice(counter->counter_dev->dev->class_dev,
"%s: Gi_DRQ_Error detected.\n", __func__);