arm64: dts: ti: k3-am62-main: Add node for DSS

Add Display SubSystem (DSS) DT node for the AM625 SoC.

The DSS supports one each of video pipeline (vid) and video-lite
pipeline (vidl1). It outputs OLDI signals on one video port (VP1) and
DPI signals on another (VP2). The video ports are connected to the
pipelines via 2 identical overlay managers (ovr1 and ovr2).

Also add the DT node for DSS clock divider. This is a fixed-factor-clock
and does not have any register. This comes into effect whenenver OLDI
display is used. The input to this divider is a serial clock used by
OLDI TXes. The divider divides the input clock by 7, and provides the
pixel clock to VP1.

Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230809084559.17322-3-a-bhatia1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 5f19ef4..284b90c 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -735,6 +735,31 @@
                };
        };
 
+       dss: dss@30200000 {
+               compatible = "ti,am625-dss";
+               reg = <0x00 0x30200000 0x00 0x1000>, /* common */
+                     <0x00 0x30202000 0x00 0x1000>, /* vidl1 */
+                     <0x00 0x30206000 0x00 0x1000>, /* vid */
+                     <0x00 0x30207000 0x00 0x1000>, /* ovr1 */
+                     <0x00 0x30208000 0x00 0x1000>, /* ovr2 */
+                     <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */
+                     <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */
+               reg-names = "common", "vidl1", "vid",
+                           "ovr1", "ovr2", "vp1", "vp2";
+               power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 186 6>,
+                        <&dss_vp1_clk>,
+                        <&k3_clks 186 2>;
+               clock-names = "fck", "vp1", "vp2";
+               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+
+               dss_ports: ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+
        hwspinlock: spinlock@2a000000 {
                compatible = "ti,am64-hwspinlock";
                reg = <0x00 0x2a000000 0x00 0x1000>;

diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k3-am62.dtsi
index 5e72c44..11f14ee 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62.dtsi
@@ -102,6 +102,14 @@
                };
        };
 
+       dss_vp1_clk: clock-divider-oldi {
+               compatible = "fixed-factor-clock";
+               clocks = <&k3_clks 186 0>;
+               #clock-cells = <0>;
+               clock-div = <7>;
+               clock-mult = <1>;
+       };
+
        #include "k3-am62-thermal.dtsi"
 };