@code{L1D_FLUSH} -- IA32_FLUSH_CMD MSR.
@item
+@code{LA57} -- 57-bit linear addresses and five-level paging.
+
+@item
@code{LAHF64_SAHF64} -- LAHF/SAHF available in 64-bit mode.
@item
x86_cpu_INDEX_7_ECX_13 = x86_cpu_index_7_ecx + 13,
x86_cpu_AVX512_VPOPCNTDQ = x86_cpu_index_7_ecx + 14,
x86_cpu_INDEX_7_ECX_15 = x86_cpu_index_7_ecx + 15,
- x86_cpu_INDEX_7_ECX_16 = x86_cpu_index_7_ecx + 16,
+ x86_cpu_LA57 = x86_cpu_index_7_ecx + 16,
/* Note: Bits 17-21: The value of MAWAU used by the BNDLDX and BNDSTX
instructions in 64-bit mode. */
x86_cpu_RDPID = x86_cpu_index_7_ecx + 22,
CHECK_CPU_FEATURE_PRESENT (AVX512_VNNI);
CHECK_CPU_FEATURE_PRESENT (AVX512_BITALG);
CHECK_CPU_FEATURE_PRESENT (AVX512_VPOPCNTDQ);
+ CHECK_CPU_FEATURE_PRESENT (LA57);
CHECK_CPU_FEATURE_PRESENT (RDPID);
CHECK_CPU_FEATURE_PRESENT (KL);
CHECK_CPU_FEATURE_PRESENT (CLDEMOTE);