src/peripheral_pwm.c
src/peripheral_uart.c
src/peripheral_spi.c
- src/interface/gpio.c
- src/interface/i2c.c
- src/interface/pwm.c
- src/interface/spi.c
- src/interface/uart.c
+ src/interface/peripheral_interface_gpio.c
+ src/interface/peripheral_interface_i2c.c
+ src/interface/peripheral_interface_pwm.c
+ src/interface/peripheral_interface_spi.c
+ src/interface/peripheral_interface_uart.c
src/peripheral_gdbus_gpio.c
src/peripheral_gdbus_i2c.c
src/peripheral_gdbus_pwm.c
* limitations under the License.
*/
-#ifndef __GPIO_H__
-#define __GPIO_H__
+#ifndef __PERIPHERAL_INTERFACE_GPIO_H__
+#define __PERIPHERAL_INTERFACE_GPIO_H__
#include "peripheral_io.h"
GPIO_EDGE_BOTH = 3,
} gpio_edge_e;
-int gpio_close(peripheral_gpio_h gpio);
-int gpio_set_edge_mode(peripheral_gpio_h gpio, gpio_edge_e edge);
-int gpio_set_direction(peripheral_gpio_h gpio, gpio_direction_e dir);
-int gpio_write(peripheral_gpio_h gpio, int value);
-int gpio_read(peripheral_gpio_h gpio, int *value);
+int peripheral_interface_gpio_close(peripheral_gpio_h gpio);
+int peripheral_interface_gpio_set_edge_mode(peripheral_gpio_h gpio, gpio_edge_e edge);
+int peripheral_interface_gpio_set_direction(peripheral_gpio_h gpio, gpio_direction_e dir);
+int peripheral_interface_gpio_write(peripheral_gpio_h gpio, int value);
+int peripheral_interface_gpio_read(peripheral_gpio_h gpio, int *value);
-int gpio_open_isr(peripheral_gpio_h gpio);
-int gpio_close_isr(peripheral_gpio_h gpio);
-#endif/*__GPIO_H__*/
+int peripheral_interface_gpio_open_isr(peripheral_gpio_h gpio);
+int peripheral_interface_gpio_close_isr(peripheral_gpio_h gpio);
+
+#endif/*__PERIPHERAL_INTERFACE_GPIO_H__*/
\ No newline at end of file
* limitations under the License.
*/
-#ifndef __I2C_H__
-#define __I2C_H__
+#ifndef __PERIPHERAL_INTERFACE_I2C_H__
+#define __PERIPHERAL_INTERFACE_I2C_H__
#include <stdint.h>
union i2c_smbus_data *data;
};
-int i2c_close(peripheral_i2c_h i2c);
-int i2c_set_address(peripheral_i2c_h i2c, int address);
-int i2c_read(peripheral_i2c_h i2c, unsigned char *data, int length);
-int i2c_write(peripheral_i2c_h i2c, const unsigned char *data, int length);
-int i2c_smbus_ioctl(peripheral_i2c_h i2c, struct i2c_smbus_ioctl_data *data);
+int peripheral_interface_i2c_close(peripheral_i2c_h i2c);
+int peripheral_interface_i2c_set_address(peripheral_i2c_h i2c, int address);
+int peripheral_interface_i2c_read(peripheral_i2c_h i2c, unsigned char *data, int length);
+int peripheral_interface_i2c_write(peripheral_i2c_h i2c, const unsigned char *data, int length);
+int peripheral_interface_i2c_smbus_ioctl(peripheral_i2c_h i2c, struct i2c_smbus_ioctl_data *data);
-#endif/* __I2C_H__ */
+#endif/* __PERIPHERAL_INTERFACE_I2C_H__ */
* limitations under the License.
*/
-#ifndef __PWM_H__
-#define __PWM_H__
+#ifndef __PERIPHERAL_INTERFACE_PWM_H__
+#define __PERIPHERAL_INTERFACE_PWM_H__
#include "peripheral_io.h"
* @param[in] pin pwm pin number
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int pwm_close(peripheral_pwm_h pwm);
+int peripheral_interface_pwm_close(peripheral_pwm_h pwm);
/**
* @brief pwm_set_period() sets the pwm period.
* @param[in] period pwm period
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int pwm_set_period(peripheral_pwm_h pwm, int period);
+int peripheral_interface_pwm_set_period(peripheral_pwm_h pwm, int period);
/**
* @brief pwm_set_duty_cycle() sets the pwm duty cycle.
* @param[in] duty_cycle pwm duty cycle
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int pwm_set_duty_cycle(peripheral_pwm_h pwm, int duty_cycle);
+int peripheral_interface_pwm_set_duty_cycle(peripheral_pwm_h pwm, int duty_cycle);
/**
* @brief pwm_set_polarity() sets the pwm polarity.
* @param[in] polarity pwm polarity
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int pwm_set_polarity(peripheral_pwm_h pwm, pwm_polarity_e polarity);
+int peripheral_interface_pwm_set_polarity(peripheral_pwm_h pwm, pwm_polarity_e polarity);
/**
* @brief pwm_set_enable() sets the pwm state.
* @param[in] enable pwm enable/disabled state value
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int pwm_set_enable(peripheral_pwm_h pwm, bool enable);
+int peripheral_interface_pwm_set_enable(peripheral_pwm_h pwm, bool enable);
-#endif /* __PWM_H__ */
+#endif /* __PERIPHERAL_INTERFACE_PWM_H__ */
--- /dev/null
+/*
+ * Copyright (c) 2016-2017 Samsung Electronics Co., Ltd.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __PERIPHERAL_INTERFACE_SPI_H__
+#define __PERIPHERAL_INTERFACE_SPI_H__
+
+#include "peripheral_io.h"
+
+int peripheral_interface_spi_close(peripheral_spi_h spi);
+int peripheral_interface_spi_set_mode(peripheral_spi_h spi, unsigned char mode);
+int peripheral_interface_spi_set_bit_order(peripheral_spi_h spi, unsigned char lsb);
+int peripheral_interface_spi_set_bits_per_word(peripheral_spi_h spi, unsigned char bits);
+int peripheral_interface_spi_set_frequency(peripheral_spi_h spi, unsigned int freq);
+int peripheral_interface_spi_read(peripheral_spi_h spi, unsigned char *rxbuf, int length);
+int peripheral_interface_spi_write(peripheral_spi_h spi, unsigned char *txbuf, int length);
+int peripheral_interface_spi_transfer(peripheral_spi_h spi, unsigned char *txbuf, unsigned char *rxbuf, int length);
+
+#endif /* __PERIPHERAL_INTERFACE_SPI_H__ */
* limitations under the License.
*/
-#ifndef __UART_H__
-#define __UART_H__
+#ifndef __PERIPHERAL_INTERFACE_UART_H__
+#define __PERIPHERAL_INTERFACE_UART_H__
#include "peripheral_io.h"
* @param[in] file_hndl handle of uart_context
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_close(peripheral_uart_h uart);
+int peripheral_interface_uart_close(peripheral_uart_h uart);
/**
* @brief uart_flush() flushes uart buffer.
* @param[in] file_hndl handle of uart_context
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_flush(peripheral_uart_h uart);
+int peripheral_interface_uart_flush(peripheral_uart_h uart);
/**
* @brief uart_set_baudrate() sets uart baud rate.
* @param[in] baud uart baud rate
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_set_baud_rate(peripheral_uart_h uart, uart_baud_rate_e baud);
+int peripheral_interface_uart_set_baud_rate(peripheral_uart_h uart, uart_baud_rate_e baud);
/**
* @brief uart_set_mode() sets byte size, parity bit and stop bits.
* @param[in] stop_bits uart stop bits
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_set_mode(peripheral_uart_h uart, uart_byte_size_e byte_size, uart_parity_e parity, uart_stop_bits_e stop_bits);
+int peripheral_interface_uart_set_mode(peripheral_uart_h uart, uart_byte_size_e byte_size, uart_parity_e parity, uart_stop_bits_e stop_bits);
/**
* @brief peripheral_bus_uart_set_byte_size() set byte size.
* @param[in] byte_size uart byte size
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_set_byte_size(peripheral_uart_h uart, uart_byte_size_e byte_size);
+int peripheral_interface_uart_set_byte_size(peripheral_uart_h uart, uart_byte_size_e byte_size);
/**
* @brief peripheral_bus_uart_set_parity() set parity bit.
* @param[in] parity uart parity type (even/odd/none)
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_set_parity(peripheral_uart_h uart, uart_parity_e parity);
+int peripheral_interface_uart_set_parity(peripheral_uart_h uart, uart_parity_e parity);
/**
* @brief peripheral_bus_uart_set_stop_bits() set stop bits.
* @param[in] stop_bits uart stop bits
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_set_stop_bits(peripheral_uart_h uart, uart_stop_bits_e stop_bits);
+int peripheral_interface_uart_set_stop_bits(peripheral_uart_h uart, uart_stop_bits_e stop_bits);
/**
* @brief uart_set_flow_control() set flow control settings.
* @param[in] rtscts rts/cts
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_set_flow_control(peripheral_uart_h uart, bool xonxoff, bool rtscts);
+int peripheral_interface_uart_set_flow_control(peripheral_uart_h uart, bool xonxoff, bool rtscts);
/**
* @brief uart_read() reads data over uart bus.
* @param[in] length size to read
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_read(peripheral_uart_h uart, uint8_t *buf, unsigned int length);
+int peripheral_interface_uart_read(peripheral_uart_h uart, uint8_t *buf, unsigned int length);
/**
* @brief uart_write() writes data over uart bus.
* @param[in] length size to write
* @return On success, 0 is returned. On failure, a negative value is returned.
*/
-int uart_write(peripheral_uart_h uart, uint8_t *buf, unsigned int length);
+int peripheral_interface_uart_write(peripheral_uart_h uart, uint8_t *buf, unsigned int length);
-#endif /* __UART_H__ */
+#endif /* __PERIPHERAL_INTERFACE_UART_H__ */
+++ /dev/null
-/*
- * Copyright (c) 2016-2017 Samsung Electronics Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SPI_H__
-#define __SPI_H__
-
-#include "peripheral_io.h"
-
-int spi_close(peripheral_spi_h spi);
-int spi_set_mode(peripheral_spi_h spi, unsigned char mode);
-int spi_set_bit_order(peripheral_spi_h spi, unsigned char lsb);
-int spi_set_bits_per_word(peripheral_spi_h spi, unsigned char bits);
-int spi_set_frequency(peripheral_spi_h spi, unsigned int freq);
-int spi_read(peripheral_spi_h spi, unsigned char *rxbuf, int length);
-int spi_write(peripheral_spi_h spi, unsigned char *txbuf, int length);
-int spi_transfer(peripheral_spi_h spi, unsigned char *txbuf, unsigned char *rxbuf, int length);
-
-#endif /* __SPI_H__ */
#include <fcntl.h>
#include <poll.h>
-#include "gpio.h"
+#include "peripheral_interface_gpio.h"
#include "peripheral_common.h"
#include "peripheral_internal.h"
#define MAX_ERR_LEN 255
-int gpio_set_direction(peripheral_gpio_h gpio, gpio_direction_e dir)
+int peripheral_interface_gpio_set_direction(peripheral_gpio_h gpio, gpio_direction_e dir)
{
int status;
return 0;
}
-int gpio_set_edge_mode(peripheral_gpio_h gpio, gpio_edge_e edge)
+int peripheral_interface_gpio_set_edge_mode(peripheral_gpio_h gpio, gpio_edge_e edge)
{
int status;
return 0;
}
-int gpio_write(peripheral_gpio_h gpio, int value)
+int peripheral_interface_gpio_write(peripheral_gpio_h gpio, int value)
{
int status;
return 0;
}
-int gpio_read(peripheral_gpio_h gpio, int *value)
+int peripheral_interface_gpio_read(peripheral_gpio_h gpio, int *value)
{
int len;
char gpio_buf[GPIO_BUFFER_MAX] = {0, };
return 0;
}
-int gpio_close(peripheral_gpio_h gpio)
+int peripheral_interface_gpio_close(peripheral_gpio_h gpio)
{
int status;
return 0;
}
-int gpio_open_isr(peripheral_gpio_h gpio)
+int peripheral_interface_gpio_open_isr(peripheral_gpio_h gpio)
{
- // int fd;
- // char gpio_dev[GPIO_BUFFER_MAX] = {0, };
-
- // snprintf(gpio_dev, sizeof(gpio_dev)-1, SYSFS_GPIO_DIR"/gpio%d/value", gpiopin);
-
- // _D("open isr string [%s]", gpio_dev);
-
- // fd = open(gpio_dev, O_RDONLY);
- // if (fd < 0) {
- // char errmsg[MAX_ERR_LEN];
- // strerror_r(errno, errmsg, MAX_ERR_LEN);
- // _E("Can't Open /sys/class/gpio/gpio%d pin value: %s\n", gpiopin, errmsg);
- // return -ENXIO;
- // }
-
- // return fd;
+ // TODO: set interrupted callback function
return 0;
}
-int gpio_close_isr(peripheral_gpio_h gpio)
+int peripheral_interface_gpio_close_isr(peripheral_gpio_h gpio)
{
-// if (fd <= 0) return -EINVAL;
-
-// close(fd);
+ // TODO: unset interrupted callback function
return 0;
}
\ No newline at end of file
#include <fcntl.h>
#include <sys/ioctl.h>
-#include "i2c.h"
+#include "peripheral_interface_i2c.h"
#include "peripheral_common.h"
#include "peripheral_internal.h"
#define MAX_ERR_LEN 255
-int i2c_close(peripheral_i2c_h i2c)
+int peripheral_interface_i2c_close(peripheral_i2c_h i2c)
{
int status;
return 0;
}
-int i2c_set_address(peripheral_i2c_h i2c, int address)
+int peripheral_interface_i2c_set_address(peripheral_i2c_h i2c, int address)
{
int status;
return 0;
}
-int i2c_read(peripheral_i2c_h i2c, unsigned char *data, int length)
+int peripheral_interface_i2c_read(peripheral_i2c_h i2c, unsigned char *data, int length)
{
int status;
return 0;
}
-int i2c_write(peripheral_i2c_h i2c, const unsigned char *data, int length)
+int peripheral_interface_i2c_write(peripheral_i2c_h i2c, const unsigned char *data, int length)
{
int status;
return 0;
}
-int i2c_smbus_ioctl(peripheral_i2c_h i2c, struct i2c_smbus_ioctl_data *data)
+int peripheral_interface_i2c_smbus_ioctl(peripheral_i2c_h i2c, struct i2c_smbus_ioctl_data *data)
{
int status;
#include <unistd.h>
#include <stdbool.h>
-#include "pwm.h"
+#include "peripheral_interface_pwm.h"
#include "peripheral_common.h"
#include "peripheral_internal.h"
#define PWM_BUF_MAX 16
#define MAX_ERR_LEN 255
-int pwm_close(peripheral_pwm_h pwm)
+int peripheral_interface_pwm_close(peripheral_pwm_h pwm)
{
int status;
return 0;
}
-int pwm_set_period(peripheral_pwm_h pwm, int period)
+int peripheral_interface_pwm_set_period(peripheral_pwm_h pwm, int period)
{
int len, status;
char pwm_buf[PWM_BUF_MAX] = {0};
return 0;
}
-int pwm_set_duty_cycle(peripheral_pwm_h pwm, int duty_cycle)
+int peripheral_interface_pwm_set_duty_cycle(peripheral_pwm_h pwm, int duty_cycle)
{
int len, status;
char pwm_buf[PWM_BUF_MAX] = {0};
return 0;
}
-int pwm_set_polarity(peripheral_pwm_h pwm, pwm_polarity_e polarity)
+int peripheral_interface_pwm_set_polarity(peripheral_pwm_h pwm, pwm_polarity_e polarity)
{
int status;
return 0;
}
-int pwm_set_enable(peripheral_pwm_h pwm, bool enable)
+int peripheral_interface_pwm_set_enable(peripheral_pwm_h pwm, bool enable)
{
int len, status;
char pwm_buf[PWM_BUF_MAX] = {0};
#include <sys/ioctl.h>
#include <linux/spi/spidev.h>
-#include "spi.h"
+#include "peripheral_interface_spi.h"
#include "peripheral_common.h"
#include "peripheral_internal.h"
#define SPI_BUFFER_MAX 64
#define MAX_ERR_LEN 255
-int spi_close(peripheral_spi_h spi)
+int peripheral_interface_spi_close(peripheral_spi_h spi)
{
int status;
return 0;
}
-int spi_set_mode(peripheral_spi_h spi, unsigned char mode)
+int peripheral_interface_spi_set_mode(peripheral_spi_h spi, unsigned char mode)
{
int status;
return 0;
}
-int spi_set_bit_order(peripheral_spi_h spi, unsigned char lsb)
+int peripheral_interface_spi_set_bit_order(peripheral_spi_h spi, unsigned char lsb)
{
int status;
return 0;
}
-int spi_set_bits_per_word(peripheral_spi_h spi, unsigned char bits)
+int peripheral_interface_spi_set_bits_per_word(peripheral_spi_h spi, unsigned char bits)
{
int status;
return 0;
}
-int spi_set_frequency(peripheral_spi_h spi, unsigned int freq)
+int peripheral_interface_spi_set_frequency(peripheral_spi_h spi, unsigned int freq)
{
int status;
return 0;
}
-int spi_read(peripheral_spi_h spi, unsigned char *rxbuf, int length)
+int peripheral_interface_spi_read(peripheral_spi_h spi, unsigned char *rxbuf, int length)
{
int status;
struct spi_ioc_transfer xfer;
return 0;
}
-int spi_write(peripheral_spi_h spi, unsigned char *txbuf, int length)
+int peripheral_interface_spi_write(peripheral_spi_h spi, unsigned char *txbuf, int length)
{
int status;
struct spi_ioc_transfer xfer;
return 0;
}
-int spi_transfer(peripheral_spi_h spi, unsigned char *txbuf, unsigned char *rxbuf, int length)
+int peripheral_interface_spi_transfer(peripheral_spi_h spi, unsigned char *txbuf, unsigned char *rxbuf, int length)
{
int status;
struct spi_ioc_transfer xfer;
#include <stdbool.h>
#include <sys/ioctl.h>
-#include "uart.h"
+#include "peripheral_interface_uart.h"
#include "peripheral_common.h"
#include "peripheral_internal.h"
static const int byteinfo[4] = {CS5, CS6, CS7, CS8};
-int uart_close(peripheral_uart_h uart)
+int peripheral_interface_uart_close(peripheral_uart_h uart)
{
int status;
return -EINVAL;
}
- status = uart_flush(uart);
+ status = peripheral_interface_uart_flush(uart);
if (status < 0) {
char errmsg[MAX_ERR_LEN];
strerror_r(errno, errmsg, MAX_ERR_LEN);
return 0;
}
-int uart_flush(peripheral_uart_h uart)
+int peripheral_interface_uart_flush(peripheral_uart_h uart)
{
int ret;
return 0;
}
-int uart_set_baud_rate(peripheral_uart_h uart, uart_baud_rate_e baud)
+int peripheral_interface_uart_set_baud_rate(peripheral_uart_h uart, uart_baud_rate_e baud)
{
int ret;
struct termios tio;
tio.c_cc[VMIN] = 1;
tio.c_cc[VTIME] = 0;
- uart_flush(uart);
+ peripheral_interface_uart_flush(uart);
ret = tcsetattr(uart->fd, TCSANOW, &tio);
if (ret) {
char errmsg[MAX_ERR_LEN];
return 0;
}
-int uart_set_mode(peripheral_uart_h uart, uart_byte_size_e byte_size, uart_parity_e parity, uart_stop_bits_e stop_bits)
+int peripheral_interface_uart_set_mode(peripheral_uart_h uart, uart_byte_size_e byte_size, uart_parity_e parity, uart_stop_bits_e stop_bits)
{
int ret;
struct termios tio;
return -EINVAL;
}
- uart_flush(uart);
+ peripheral_interface_uart_flush(uart);
ret = tcsetattr(uart->fd, TCSANOW, &tio);
if (ret) {
char errmsg[MAX_ERR_LEN];
return 0;
}
-int uart_set_byte_size(peripheral_uart_h uart, uart_byte_size_e byte_size)
+int peripheral_interface_uart_set_byte_size(peripheral_uart_h uart, uart_byte_size_e byte_size)
{
int ret;
struct termios tio;
tio.c_cflag |= byteinfo[byte_size];
tio.c_cflag |= (CLOCAL | CREAD);
- uart_flush(uart);
+ peripheral_interface_uart_flush(uart);
ret = tcsetattr(uart->fd, TCSANOW, &tio);
if (ret) {
char errmsg[MAX_ERR_LEN];
return 0;
}
-int uart_set_parity(peripheral_uart_h uart, uart_parity_e parity)
+int peripheral_interface_uart_set_parity(peripheral_uart_h uart, uart_parity_e parity)
{
int ret;
struct termios tio;
break;
}
- uart_flush(uart);
+ peripheral_interface_uart_flush(uart);
ret = tcsetattr(uart->fd, TCSANOW, &tio);
if (ret) {
char errmsg[MAX_ERR_LEN];
return 0;
}
-int uart_set_stop_bits(peripheral_uart_h uart, uart_stop_bits_e stop_bits)
+int peripheral_interface_uart_set_stop_bits(peripheral_uart_h uart, uart_stop_bits_e stop_bits)
{
int ret;
struct termios tio;
return -EINVAL;
}
- uart_flush(uart);
+ peripheral_interface_uart_flush(uart);
ret = tcsetattr(uart->fd, TCSANOW, &tio);
if (ret) {
char errmsg[MAX_ERR_LEN];
return 0;
}
-int uart_set_flow_control(peripheral_uart_h uart, bool xonxoff, bool rtscts)
+int peripheral_interface_uart_set_flow_control(peripheral_uart_h uart, bool xonxoff, bool rtscts)
{
int ret;
struct termios tio;
return 0;
}
-int uart_read(peripheral_uart_h uart, uint8_t *buf, unsigned int length)
+int peripheral_interface_uart_read(peripheral_uart_h uart, uint8_t *buf, unsigned int length)
{
int ret;
return ret;
}
-int uart_write(peripheral_uart_h uart, uint8_t *buf, unsigned int length)
+int peripheral_interface_uart_write(peripheral_uart_h uart, uint8_t *buf, unsigned int length)
{
int ret;
projects / platform / core / api / peripheral-io.git / commitdiff