FeatureNoPostRASched]>;
def : ProcNoItin<"exynos-m1", [ARMv8a, ProcExynosM1,
+ FeatureZCZeroing,
FeatureUseWideStrideVFP,
+ FeatureSplatVFPToNeon,
+ FeatureSlowVGETLNi32,
+ FeatureSlowVDUP32,
+ FeatureSlowFPBrcc,
+ FeatureProfUnpredicate,
FeatureHWDivThumb,
FeatureHWDivARM,
+ FeatureHasSlowFPVMLx,
+ FeatureHasRetAddrStack,
+ FeatureExpandMLx,
FeatureCrypto,
FeatureCRC]>;
def : ProcNoItin<"exynos-m2", [ARMv8a, ProcExynosM1,
+ FeatureZCZeroing,
FeatureUseWideStrideVFP,
+ FeatureSplatVFPToNeon,
+ FeatureSlowVGETLNi32,
+ FeatureSlowVDUP32,
+ FeatureSlowFPBrcc,
+ FeatureProfUnpredicate,
FeatureHWDivThumb,
FeatureHWDivARM,
+ FeatureHasSlowFPVMLx,
+ FeatureHasRetAddrStack,
+ FeatureExpandMLx,
FeatureCrypto,
FeatureCRC]>;
def : ProcNoItin<"exynos-m3", [ARMv8a, ProcExynosM1,
+ FeatureZCZeroing,
FeatureUseWideStrideVFP,
+ FeatureSplatVFPToNeon,
+ FeatureSlowVGETLNi32,
+ FeatureSlowVDUP32,
+ FeatureSlowFPBrcc,
+ FeatureProfUnpredicate,
FeatureHWDivThumb,
FeatureHWDivARM,
+ FeatureHasSlowFPVMLx,
+ FeatureHasRetAddrStack,
+ FeatureExpandMLx,
FeatureCrypto,
FeatureCRC]>;
def : ProcNoItin<"exynos-m4", [ARMv8a, ProcExynosM1,
+ FeatureZCZeroing,
FeatureUseWideStrideVFP,
+ FeatureSplatVFPToNeon,
+ FeatureSlowVGETLNi32,
+ FeatureSlowVDUP32,
+ FeatureSlowFPBrcc,
+ FeatureProfUnpredicate,
FeatureHWDivThumb,
FeatureHWDivARM,
+ FeatureHasSlowFPVMLx,
+ FeatureHasRetAddrStack,
+ FeatureExpandMLx,
FeatureCrypto,
FeatureCRC]>;