re PR testsuite/90502 (gcc.dg/tree-ssa/vector-6.c FAILs)
authorRichard Biener <rguenther@suse.de>
Thu, 16 May 2019 09:12:53 +0000 (09:12 +0000)
committerRichard Biener <rguenth@gcc.gnu.org>
Thu, 16 May 2019 09:12:53 +0000 (09:12 +0000)
2019-05-16  Richard Biener  <rguenther@suse.de>

PR testsuite/90502
* gcc.dg/tree-ssa/vector-6.c: Adjust for half of the
transforms happening earlier now.

From-SVN: r271283

gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/tree-ssa/vector-6.c

index 2c5f638..e6ce5a2 100644 (file)
@@ -1,3 +1,9 @@
+2019-05-16  Richard Biener  <rguenther@suse.de>
+
+       PR testsuite/90502
+       * gcc.dg/tree-ssa/vector-6.c: Adjust for half of the
+       transforms happening earlier now.
+
 2019-05-16  Iain Sandoe  <iain@sandoe.co.uk>
 
        * lib/target-supports.exp (check_effective_target_cet): Add the
index 785e5df..e0bb196 100644 (file)
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O -fdump-tree-ccp1 -Wno-psabi -w" } */
+/* { dg-options "-O -fdump-tree-ssa -fdump-tree-ccp1 -Wno-psabi -w" } */
 /* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */
 /* { dg-additional-options "-maltivec" { target powerpc_altivec_ok } } */
 
@@ -32,4 +32,5 @@ v4si test4 (v4si v, int i)
   return v;
 }
 
-/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 4 "ccp1" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */
+/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 2 "ssa" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */
+/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 2 "ccp1" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */