return 0;
}
+/* Horizontal flip the image. */
+static int mt9m114_g_hflip(struct v4l2_subdev *sd, s32 * val)
+{
+ struct i2c_client *c = v4l2_get_subdevdata(sd);
+ int ret;
+ u32 data;
+ ret = mt9m114_read_reg(c, MISENSOR_16BIT,
+ (u32)MISENSOR_READ_MODE, &data);
+ if (ret)
+ return ret;
+ *val = !!(data & MISENSOR_HFLIP_MASK);
+
+ return 0;
+}
+
+static int mt9m114_g_vflip(struct v4l2_subdev *sd, s32 * val)
+{
+ struct i2c_client *c = v4l2_get_subdevdata(sd);
+ int ret;
+ u32 data;
+
+ ret = mt9m114_read_reg(c, MISENSOR_16BIT,
+ (u32)MISENSOR_READ_MODE, &data);
+ if (ret)
+ return ret;
+ *val = !!(data & MISENSOR_VFLIP_MASK);
+
+ return 0;
+}
+
static int mt9m114_s_freq(struct v4l2_subdev *sd, s32 val)
{
struct i2c_client *c = v4l2_get_subdevdata(sd);
.step = 1,
.default_value = 0,
},
+ .query = mt9m114_g_vflip,
.tweak = mt9m114_t_vflip,
},
{
.step = 1,
.default_value = 0,
},
+ .query = mt9m114_g_hflip,
.tweak = mt9m114_t_hflip,
},
{
struct i2c_client *c = v4l2_get_subdevdata(sd);
struct mt9m114_device *dev = to_mt9m114_sensor(sd);
int err;
-
/* set for direct mode */
err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC850);
if (value) {
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x01, 0x01);
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x01, 0x01);
- /* enable vert_flip and horz_mirror */
err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE,
- MISENSOR_F_M_MASK, MISENSOR_F_M_EN);
+ MISENSOR_HFLIP_MASK, MISENSOR_FLIP_EN);
dev->bpat = MT9M114_BPAT_GRGRBGBG;
} else {
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x01, 0x00);
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x01, 0x00);
- /* enable vert_flip and disable horz_mirror */
err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE,
- MISENSOR_F_M_MASK, MISENSOR_F_EN);
+ MISENSOR_HFLIP_MASK, MISENSOR_FLIP_DIS);
dev->bpat = MT9M114_BPAT_BGBGGRGR;
}
{
struct i2c_client *c = v4l2_get_subdevdata(sd);
int err;
-
/* set for direct mode */
err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC850);
if (value >= 1) {
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x02, 0x01);
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x02, 0x01);
- /* disable vert_flip and horz_mirror */
err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE,
- MISENSOR_F_M_MASK, MISENSOR_F_M_DIS);
+ MISENSOR_VFLIP_MASK, MISENSOR_FLIP_EN);
} else {
/* disable H flip - ctx A */
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x02, 0x00);
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x02, 0x00);
err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x02, 0x00);
- /* enable vert_flip and disable horz_mirror */
err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE,
- MISENSOR_F_M_MASK, MISENSOR_F_EN);
+ MISENSOR_VFLIP_MASK, MISENSOR_FLIP_DIS);
}
err += mt9m114_write_reg(c, MISENSOR_8BIT, 0x8404, 0x06);
#define MISENSOR_TOK_POLL 0xfc00 /* token indicating poll instruction */
#define MISENSOR_TOK_RMW 0x0010 /* RMW operation */
#define MISENSOR_TOK_MASK 0xfff0
-#define MISENSOR_FLIP_EN (1<<1) /* enable vert_flip */
-#define MISENSOR_MIRROR_EN (1<<0) /* enable horz_mirror */
#define MISENSOR_AWB_STEADY (1<<0) /* awb steady */
#define MISENSOR_AE_READY (1<<3) /* ae status ready */
/* mask to set sensor read_mode via misensor_rmw_reg */
#define MISENSOR_R_MODE_MASK 0x0330
/* mask to set sensor vert_flip and horz_mirror */
-#define MISENSOR_F_M_MASK 0x0003
+#define MISENSOR_VFLIP_MASK 0x0002
+#define MISENSOR_HFLIP_MASK 0x0001
+#define MISENSOR_FLIP_EN 1
+#define MISENSOR_FLIP_DIS 0
/* bits set to set sensor read_mode via misensor_rmw_reg */
#define MISENSOR_SKIPPING_SET 0x0011
#define MISENSOR_SUMMING_SET 0x0033
#define MISENSOR_NORMAL_SET 0x0000
-/* bits set to set sensor vert_flip and horz_mirror */
-#define MISENSOR_F_M_EN (MISENSOR_FLIP_EN | MISENSOR_MIRROR_EN)
-#define MISENSOR_F_EN MISENSOR_FLIP_EN
-#define MISENSOR_F_M_DIS (MISENSOR_FLIP_EN & MISENSOR_MIRROR_EN)
-
/* sensor register that control sensor read-mode and mirror */
#define MISENSOR_READ_MODE 0xC834
/* sensor ae-track status register */