drm/i915/fbc: Track plane visibility

Currently the code (ab)uses cache->vma to indicate the plane
visibility. I want to nuke that so let's add a dedicated boolean
for this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191127201222.16669-7-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index e579f78e4453e26947d69224b8491add983f66c0..957b9fb8fd9b618bc7d60c27e504effeae41d567 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -634,8 +634,9 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
        struct intel_fbc_state_cache *cache = &fbc->state_cache;
        struct drm_framebuffer *fb = plane_state->hw.fb;
 
-       cache->vma = NULL;
-       cache->flags = 0;
+       cache->plane.visible = plane_state->uapi.visible;
+       if (!cache->plane.visible)
+               return;
 
        cache->crtc.mode_flags = crtc_state->hw.adjusted_mode.flags;
        if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
@@ -649,16 +650,12 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
         */
        cache->plane.src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
        cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
-       cache->plane.visible = plane_state->uapi.visible;
        cache->plane.adjusted_x = plane_state->color_plane[0].x;
        cache->plane.adjusted_y = plane_state->color_plane[0].y;
        cache->plane.y = plane_state->uapi.src.y1 >> 16;
 
        cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;
 
-       if (!cache->plane.visible)
-               return;
-
        cache->fb.format = fb->format;
        cache->fb.stride = fb->pitches[0];
 
@@ -674,6 +671,11 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
        struct intel_fbc *fbc = &dev_priv->fbc;
        struct intel_fbc_state_cache *cache = &fbc->state_cache;
 
+       if (!cache->plane.visible) {
+               fbc->no_fbc_reason = "primary plane not visible";
+               return false;
+       }
+
        /* We don't need to use a state cache here since this information is
         * global for all CRTC.
         */
@@ -682,11 +684,6 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
                return false;
        }
 
-       if (!cache->vma) {
-               fbc->no_fbc_reason = "primary plane not visible";
-               return false;
-       }
-
        if (cache->crtc.mode_flags & DRM_MODE_FLAG_INTERLACE) {
                fbc->no_fbc_reason = "incompatible mode";
                return false;
@@ -820,6 +817,8 @@ static void intel_fbc_get_reg_params(struct intel_crtc *crtc,
        params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache);
 
        params->gen9_wa_cfb_stride = cache->gen9_wa_cfb_stride;
+
+       params->plane_visible = cache->plane.visible;
 }
 
 void intel_fbc_pre_update(struct intel_crtc *crtc,

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2e99f5d48396ef4c112ec48a1321416144c64194..0f318efb92cefc38aecb443638f8e202ffdb16a5 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -444,6 +444,7 @@ struct intel_fbc {
 
                int cfb_size;
                u16 gen9_wa_cfb_stride;
+               bool plane_visible;
        } params;
 
        const char *no_fbc_reason;