arm64: dts: qcom: Add PM8550ve pmic dtsi

Add nodes for PM8550ve in separate dtsi file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-7-abel.vesa@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/pm8550ve.dtsi b/arch/arm64/boot/dts/qcom/pm8550ve.dtsi
new file mode 100644 (file)
index 0000000..c47646a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm8550ve.dtsi
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+/ {
+       thermal-zones {
+               pm8550ve-thermal {
+                       polling-delay-passive = <100>;
+                       polling-delay = <0>;
+
+                       thermal-sensors = <&pm8550ve_temp_alarm>;
+
+                       trips {
+                               trip0 {
+                                       temperature = <95000>;
+                                       hysteresis = <0>;
+                                       type = "passive";
+                               };
+
+                               trip1 {
+                                       temperature = <115000>;
+                                       hysteresis = <0>;
+                                       type = "hot";
+                               };
+                       };
+               };
+       };
+};
+
+
+&spmi_bus {
+       pm8550ve: pmic@5 {
+               compatible = "qcom,pm8550", "qcom,spmi-pmic";
+               reg = <0x5 SPMI_USID>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               pm8550ve_temp_alarm: temp-alarm@a00 {
+                       compatible = "qcom,spmi-temp-alarm";
+                       reg = <0xa00>;
+                       interrupts = <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+                       #thermal-sensor-cells = <0>;
+               };
+
+               pm8550ve_gpios: gpio@8800 {
+                       compatible = "qcom,pm8550ve-gpio", "qcom,spmi-gpio";
+                       reg = <0x8800>;
+                       gpio-controller;
+                       gpio-ranges = <&pm8550ve_gpios 0 0 8>;
+                       #gpio-cells = <2>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+       };
+};