amvecm: optimize gamma table write
authorBencheng Jing <bencheng.jing@amlogic.com>
Thu, 29 Mar 2018 04:17:20 +0000 (12:17 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Fri, 30 Mar 2018 03:09:23 +0000 (19:09 -0800)
PD#163289: amvecm: optimize gamma table write

Change-Id: I2e97b37084c78a0dfb7109c4aeef8898c2bf94c6
Signed-off-by: Bencheng Jing <bencheng.jing@amlogic.com>
drivers/amlogic/media/enhancement/amvecm/amve.c
drivers/amlogic/media/enhancement/amvecm/arch/vpp_regs.h

index 4f5f66b..2a6ac3c 100644 (file)
@@ -3762,6 +3762,9 @@ void vpp_set_lcd_gamma_table(u16 *data, u32 rgb_mask)
        int cnt = 0;
        unsigned long flags = 0;
 
+       if (!(READ_VPP_REG(ENCL_VIDEO_EN) & 0x1))
+               return;
+
        spin_lock_irqsave(&vpp_lcd_gamma_lock, flags);
 
        WRITE_VPP_REG_BITS(L_GAMMA_CNTL_PORT,
@@ -3806,6 +3809,9 @@ void amve_write_gamma_table(u16 *data, u32 rgb_mask)
        int cnt = 0;
        unsigned long flags = 0;
 
+       if (!(READ_VPP_REG(ENCL_VIDEO_EN) & 0x1))
+               return;
+
        spin_lock_irqsave(&vpp_lcd_gamma_lock, flags);
 
        while (!(READ_VPP_REG(L_GAMMA_CNTL_PORT) & (0x1 << ADR_RDY))) {
index 6935b20..3de8fc9 100644 (file)
 #define VPP_POST2_MATRIX_PRE_OFFSET0_1 0x39ab
 #define VPP_POST2_MATRIX_PRE_OFFSET2   0x39ac
 #define VPP_POST2_MATRIX_EN_CTRL           0x39ad
+
+#define ENCL_VIDEO_EN          0x1ca0
 #endif