drm/i915/guc: don't hardcode BCS0 in guc_hang selftest
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Wed, 2 Nov 2022 21:43:10 +0000 (14:43 -0700)
committerDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Mon, 7 Nov 2022 19:28:29 +0000 (11:28 -0800)
On MTL there are no BCS engines on the media GT, so we can't always use
BCS0 in the test. There is no actual reason to use a BCS engine over an
engine of a different class, so switch to using any available engine.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Acked-by: Nirmoy Das <nirmoy.das@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221102214310.2829310-1-daniele.ceraolospurio@intel.com
drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c

index 01f8cd3..d91b58f 100644 (file)
@@ -35,11 +35,14 @@ static int intel_hang_guc(void *arg)
        struct i915_request *rq;
        intel_wakeref_t wakeref;
        struct i915_gpu_error *global = &gt->i915->gpu_error;
-       struct intel_engine_cs *engine;
+       struct intel_engine_cs *engine = intel_selftest_find_any_engine(gt);
        unsigned int reset_count;
        u32 guc_status;
        u32 old_beat;
 
+       if (!engine)
+               return 0;
+
        ctx = kernel_context(gt->i915, NULL);
        if (IS_ERR(ctx)) {
                drm_err(&gt->i915->drm, "Failed get kernel context: %ld\n", PTR_ERR(ctx));
@@ -48,14 +51,13 @@ static int intel_hang_guc(void *arg)
 
        wakeref = intel_runtime_pm_get(gt->uncore->rpm);
 
-       ce = intel_context_create(gt->engine[BCS0]);
+       ce = intel_context_create(engine);
        if (IS_ERR(ce)) {
                ret = PTR_ERR(ce);
                drm_err(&gt->i915->drm, "Failed to create spinner request: %d\n", ret);
                goto err;
        }
 
-       engine = ce->engine;
        reset_count = i915_reset_count(global);
 
        old_beat = engine->props.heartbeat_interval_ms;