drm/msm: Deprecate MSM_BO_UNCACHED harder
authorRob Clark <robdclark@chromium.org>
Mon, 13 Jun 2022 19:46:23 +0000 (12:46 -0700)
committerRob Clark <robdclark@chromium.org>
Thu, 7 Jul 2022 01:54:42 +0000 (18:54 -0700)
Handle the demotion to MSM_BO_WC at the userspace ABI level, and fix
the remaining internal MSM_BO_UNCACHED user.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/489339/
Link: https://lore.kernel.org/r/20220613194623.2588353-1-robdclark@gmail.com
drivers/gpu/drm/msm/msm_drv.c
drivers/gpu/drm/msm/msm_gem.c
drivers/gpu/drm/msm/msm_gpu.c

index 984b937..1ed4cd0 100644 (file)
@@ -678,12 +678,25 @@ static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
                struct drm_file *file)
 {
        struct drm_msm_gem_new *args = data;
+       uint32_t flags = args->flags;
 
        if (args->flags & ~MSM_BO_FLAGS) {
                DRM_ERROR("invalid flags: %08x\n", args->flags);
                return -EINVAL;
        }
 
+       /*
+        * Uncached CPU mappings are deprecated, as of:
+        *
+        * 9ef364432db4 ("drm/msm: deprecate MSM_BO_UNCACHED (map as writecombine instead)")
+        *
+        * So promote them to WC.
+        */
+       if (flags & MSM_BO_UNCACHED) {
+               flags &= ~MSM_BO_CACHED;
+               flags |= MSM_BO_WC;
+       }
+
        return msm_gem_new_handle(dev, file, args->size,
                        args->flags, &args->handle, NULL);
 }
index 520e4b7..ad7da2c 100644 (file)
@@ -129,7 +129,7 @@ static struct page **get_pages(struct drm_gem_object *obj)
                /* For non-cached buffers, ensure the new pages are clean
                 * because display controller, GPU, etc. are not coherent:
                 */
-               if (msm_obj->flags & (MSM_BO_WC|MSM_BO_UNCACHED))
+               if (msm_obj->flags & MSM_BO_WC)
                        sync_for_device(msm_obj);
 
                update_inactive(msm_obj);
@@ -160,7 +160,7 @@ static void put_pages(struct drm_gem_object *obj)
                         * pages are clean because display controller,
                         * GPU, etc. are not coherent:
                         */
-                       if (msm_obj->flags & (MSM_BO_WC|MSM_BO_UNCACHED))
+                       if (msm_obj->flags & MSM_BO_WC)
                                sync_for_cpu(msm_obj);
 
                        sg_free_table(msm_obj->sgt);
@@ -213,7 +213,7 @@ void msm_gem_put_pages(struct drm_gem_object *obj)
 
 static pgprot_t msm_gem_pgprot(struct msm_gem_object *msm_obj, pgprot_t prot)
 {
-       if (msm_obj->flags & (MSM_BO_WC|MSM_BO_UNCACHED))
+       if (msm_obj->flags & MSM_BO_WC)
                return pgprot_writecombine(prot);
        return prot;
 }
@@ -1106,7 +1106,6 @@ static int msm_gem_new_impl(struct drm_device *dev,
        struct msm_gem_object *msm_obj;
 
        switch (flags & MSM_BO_CACHE_MASK) {
-       case MSM_BO_UNCACHED:
        case MSM_BO_CACHED:
        case MSM_BO_WC:
                break;
index e1ee850..c2bfcf3 100644 (file)
@@ -918,7 +918,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
 
        memptrs = msm_gem_kernel_new(drm,
                sizeof(struct msm_rbmemptrs) * nr_rings,
-               check_apriv(gpu, MSM_BO_UNCACHED), gpu->aspace, &gpu->memptrs_bo,
+               check_apriv(gpu, MSM_BO_WC), gpu->aspace, &gpu->memptrs_bo,
                &memptrs_iova);
 
        if (IS_ERR(memptrs)) {