[AArch64] Regenerate fp16-vector-nvcast.ll check lines. NFC

diff --git a/llvm/test/CodeGen/AArch64/fp16-vector-nvcast.ll b/llvm/test/CodeGen/AArch64/fp16-vector-nvcast.ll
index 3101c16..abded81 100644 (file)
--- a/llvm/test/CodeGen/AArch64/fp16-vector-nvcast.ll
+++ b/llvm/test/CodeGen/AArch64/fp16-vector-nvcast.ll
@@ -1,44 +1,46 @@
-; RUN: llc < %s -asm-verbose=false -mtriple=aarch64-none-eabi | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-none-eabi | FileCheck %s
 
 ; Test pattern (v4f16 (AArch64NvCast (v2i32 FPR64:$src)))
 define void @nvcast_v2i32(ptr %a) #0 {
 ; CHECK-LABEL: nvcast_v2i32:
-; CHECK-NEXT: movi v[[REG:[0-9]+]].2s, #171, lsl #16
-; CHECK-NEXT: str d[[REG]], [x0]
-; CHECK-NEXT: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi v0.2s, #171, lsl #16
+; CHECK-NEXT:    str d0, [x0]
+; CHECK-NEXT:    ret
   store volatile <4 x half> <half 0xH0000, half 0xH00AB, half 0xH0000, half 0xH00AB>, ptr %a
   ret void
 }
 
-
 ; Test pattern (v4f16 (AArch64NvCast (v4i16 FPR64:$src)))
 define void @nvcast_v4i16(ptr %a) #0 {
 ; CHECK-LABEL: nvcast_v4i16:
-; CHECK-NEXT: movi v[[REG:[0-9]+]].4h, #171
-; CHECK-NEXT: str d[[REG]], [x0]
-; CHECK-NEXT: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi v0.4h, #171
+; CHECK-NEXT:    str d0, [x0]
+; CHECK-NEXT:    ret
   store volatile <4 x half> <half 0xH00AB, half 0xH00AB, half 0xH00AB, half 0xH00AB>, ptr %a
   ret void
 }
 
-
 ; Test pattern (v4f16 (AArch64NvCast (v8i8 FPR64:$src)))
 define void @nvcast_v8i8(ptr %a) #0 {
 ; CHECK-LABEL: nvcast_v8i8:
-; CHECK-NEXT: movi v[[REG:[0-9]+]].8b, #171
-; CHECK-NEXT: str d[[REG]], [x0]
-; CHECK-NEXT: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi v0.8b, #171
+; CHECK-NEXT:    str d0, [x0]
+; CHECK-NEXT:    ret
   store volatile <4 x half> <half 0xHABAB, half 0xHABAB, half 0xHABAB, half 0xHABAB>, ptr %a
   ret void
 }
 
-
 ; Test pattern (v4f16 (AArch64NvCast (f64 FPR64:$src)))
 define void @nvcast_f64(ptr %a) #0 {
 ; CHECK-LABEL: nvcast_f64:
-; CHECK-NEXT: movi d[[REG:[0-9]+]], #0000000000000000
-; CHECK-NEXT: str d[[REG]], [x0]
-; CHECK-NEXT: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi d0, #0000000000000000
+; CHECK-NEXT:    str d0, [x0]
+; CHECK-NEXT:    ret
   store volatile <4 x half> zeroinitializer, ptr %a
   ret void
 }
@@ -46,42 +48,43 @@ define void @nvcast_f64(ptr %a) #0 {
 ; Test pattern (v8f16 (AArch64NvCast (v4i32 FPR128:$src)))
 define void @nvcast_v4i32(ptr %a) #0 {
 ; CHECK-LABEL: nvcast_v4i32:
-; CHECK-NEXT: movi v[[REG:[0-9]+]].4s, #171, lsl #16
-; CHECK-NEXT: str q[[REG]], [x0]
-; CHECK-NEXT: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi v0.4s, #171, lsl #16
+; CHECK-NEXT:    str q0, [x0]
+; CHECK-NEXT:    ret
   store volatile <8 x half> <half 0xH0000, half 0xH00AB, half 0xH0000, half 0xH00AB, half 0xH0000, half 0xH00AB, half 0xH0000, half 0xH00AB>, ptr %a
   ret void
 }
 
-
 ; Test pattern (v8f16 (AArch64NvCast (v8i16 FPR128:$src)))
 define void @nvcast_v8i16(ptr %a) #0 {
 ; CHECK-LABEL: nvcast_v8i16:
-; CHECK-NEXT: movi v[[REG:[0-9]+]].8h, #171
-; CHECK-NEXT: str q[[REG]], [x0]
-; CHECK-NEXT: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi v0.8h, #171
+; CHECK-NEXT:    str q0, [x0]
+; CHECK-NEXT:    ret
   store volatile <8 x half> <half 0xH00AB, half 0xH00AB, half 0xH00AB, half 0xH00AB, half 0xH00AB, half 0xH00AB, half 0xH00AB, half 0xH00AB>, ptr %a
   ret void
 }
 
-
 ; Test pattern (v8f16 (AArch64NvCast (v16i8 FPR128:$src)))
 define void @nvcast_v16i8(ptr %a) #0 {
 ; CHECK-LABEL: nvcast_v16i8:
-; CHECK-NEXT: movi v[[REG:[0-9]+]].16b, #171
-; CHECK-NEXT: str q[[REG]], [x0]
-; CHECK-NEXT: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi v0.16b, #171
+; CHECK-NEXT:    str q0, [x0]
+; CHECK-NEXT:    ret
   store volatile <8 x half> <half 0xHABAB, half 0xHABAB, half 0xHABAB, half 0xHABAB, half 0xHABAB, half 0xHABAB, half 0xHABAB, half 0xHABAB>, ptr %a
   ret void
 }
 
-
 ; Test pattern (v8f16 (AArch64NvCast (v2i64 FPR128:$src)))
 define void @nvcast_v2i64(ptr %a) #0 {
 ; CHECK-LABEL: nvcast_v2i64:
-; CHECK-NEXT: movi v[[REG:[0-9]+]].2d, #0000000000000000
-; CHECK-NEXT: str q[[REG]], [x0]
-; CHECK-NEXT: ret
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi v0.2d, #0000000000000000
+; CHECK-NEXT:    str q0, [x0]
+; CHECK-NEXT:    ret
   store volatile <8 x half> zeroinitializer, ptr %a
   ret void
 }