armv8/fsl-lsch2: make the workaround for PIN MUX erratum A010539 robust
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Wed, 25 Apr 2018 06:25:42 +0000 (14:25 +0800)
committerYork Sun <york.sun@nxp.com>
Wed, 9 May 2018 14:17:51 +0000 (09:17 -0500)
Mask HRESET_B after cleared the the RCW_SRC, because in the workaround
we override the RCW_SRC and if HRESET_B is issued after the override
then SoC cannot find valid RCW as the RCW_SRC was overwritten and
result in hang. So we need to mask HRESET_B in case user asserts it,
and the PORESET_B should be asserted which leads to resampling of
cfg_rcw_src pins and loading of correct RCW_SRC.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/soc.c

index 06fdd17..bfd6639 100644 (file)
@@ -517,6 +517,7 @@ static void erratum_a010539(void)
        porsr1 &= ~FSL_CHASSIS2_CCSR_PORSR1_RCW_MASK;
        out_be32((void *)(CONFIG_SYS_DCSR_DCFG_ADDR + DCFG_DCSR_PORCR1),
                 porsr1);
+       out_be32((void *)(CONFIG_SYS_FSL_SCFG_ADDR + 0x1a8), 0xffffffff);
 #endif
 }