armv8: dts: fsl-lx2160a: add flash node under dspi to qds dts
authorZhao Qiang <qiang.zhao@nxp.com>
Mon, 8 Jun 2020 03:28:24 +0000 (11:28 +0800)
committerPriyanka Jain <priyanka.jain@nxp.com>
Mon, 27 Jul 2020 08:46:28 +0000 (14:16 +0530)
Add flash node under dspi into fsl-lx2160a-qds.dtsi

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/dts/fsl-lx2160a-qds.dtsi

index 129cf82..96c9800 100644 (file)
        phy-connection-type = "rgmii-id";
 };
 
+&dspi0 {
+       bus-num = <0>;
+       status = "okay";
+
+       dflash0: n25q128a {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
+       };
+       dflash1: sst25wf040b {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <1>;
+       };
+       dflash2: en25s64 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <2>;
+       };
+};
+
+&dspi1 {
+       bus-num = <0>;
+       status = "okay";
+
+       dflash3: n25q128a {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
+       };
+       dflash4: sst25wf040b {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <1>;
+       };
+       dflash5: en25s64 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <2>;
+       };
+};
+
+&dspi2 {
+       bus-num = <0>;
+       status = "okay";
+
+       dflash6: n25q128a {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
+       };
+       dflash7: sst25wf040b {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <1>;
+       };
+       dflash8: en25s64 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <3000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <2>;
+       };
+};
+
 &emdio1 {
        status = "okay";
 };