For 'reg->order == __riscv_xlen' the term 'BIT(reg->order)' is undefined.
Addresses-Coverity-ID:
1529706 ("Bad bit shift operation")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
if (reg->order == __riscv_xlen && reg->base != 0)
return FALSE;
- if (reg->base & (BIT(reg->order) - 1))
+ if (reg->order < __riscv_xlen && (reg->base & (BIT(reg->order) - 1)))
return FALSE;
return TRUE;