+2006-01-11 Nick Clifton <nickc@redhat.com>
+
+ Fixes for building on 64-bit hosts:
+ * config/tc-avr.c (mod_index): New union to allow conversion
+ between pointers and integers.
+ (md_begin, avr_ldi_expression): Use it.
+ * config/tc-i370.c (md_assemble): Add cast for argument to print
+ statement.
+ * config/tc-tic54x.c (subsym_substitute): Likewise.
+ * config/tc-mn10200.c (md_assemble): Use a union to convert the
+ opindex field of fr_cgen structure into a pointer so that it can
+ be stored in a frag.
+ * config/tc-mn10300.c (md_assemble): Likewise.
+ * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
+ types.
+ * config/tc-v850.c: Replace uses of (int) casts with correct
+ types.
+
2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
PR gas/2117
/* tc-avr.c -- Assembler code for the ATMEL AVR
- Copyright 1999, 2000, 2001, 2002, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by Denis Chertykov <denisc@overta.ru>
{"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0},
};
+/* A union used to store indicies into the exp_mod[] array
+ in a hash table which expects void * data types. */
+typedef union
+{
+ void * ptr;
+ int index;
+} mod_index;
+
/* Opcode hash table. */
static struct hash_control *avr_hash;
avr_mod_hash = hash_new ();
for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
- hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10));
+ {
+ mod_index m;
+
+ m.index = i + 10;
+ hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
+ }
bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
}
if (op[0])
{
- mod = (int) hash_find (avr_mod_hash, op);
+ mod_index m;
+
+ m.ptr = hash_find (avr_mod_hash, op);
+ mod = m.index;
if (mod)
{
/* tc-frv.c -- Assembler for the Fujitsu FRV.
- Copyright 2002, 2003, 2004, 2005 Free Software Foundation.
+ Copyright 2002, 2003, 2004, 2005, 2006 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
for (this_insn = this_chain->insn_list; this_insn; this_insn = this_insn->next)
{
if (this_insn->type == VLIW_LABEL_TYPE)
- fprintf (stderr, "Label Value: %d\n", (int) this_insn->sym);
+ fprintf (stderr, "Label Value: %p\n", this_insn->sym);
else if (this_insn->type == VLIW_BRANCH_TYPE)
- fprintf (stderr, "%s to %d\n", this_insn->insn->base->name, (int) this_insn->sym);
+ fprintf (stderr, "%s to %p\n", this_insn->insn->base->name, this_insn->sym);
else if (this_insn->type == VLIW_BRANCH_HAS_NOPS)
- fprintf (stderr, "nop'd %s to %d\n", this_insn->insn->base->name, (int) this_insn->sym);
+ fprintf (stderr, "nop'd %s to %p\n", this_insn->insn->base->name, this_insn->sym);
else if (this_insn->type == VLIW_NOP_TYPE)
fprintf (stderr, "Nop\n");
else
/* tc-i370.c -- Assembler for the IBM 360/370/390 instruction set.
Loosely based on the ppc files by Linas Vepstas <linas@linas.org> 1998, 99
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005 Free Software Foundation, Inc.
+ 2004, 2005, 2006 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler.
if (! register_name (&ex))
as_bad ("expecting a register for operand %d",
- opindex_ptr - opcode->operands + 1);
+ (int) (opindex_ptr - opcode->operands + 1));
}
/* Check for an address constant expression. */
/* tc-mn10200.c -- Assembler code for the Matsushita 10200
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
- 2005 Free Software Foundation, Inc.
+ 2005, 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
/* Write out the instruction. */
if (relaxable && fc > 0)
{
+ /* On a 64-bit host the size of an 'int' is not the same
+ as the size of a pointer, so we need a union to convert
+ the opindex field of the fr_cgen structure into a char *
+ so that it can be stored in the frag. We do not have
+ to worry about loosing accuracy as we are not going to
+ be even close to the 32bit limit of the int. */
+ union
+ {
+ int opindex;
+ char * ptr;
+ }
+ opindex_converter;
int type;
/* bCC */
else
type = 3;
+ opindex_converter.opindex = fixups[0].opindex;
f = frag_var (rs_machine_dependent, 8, 8 - size, type,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *)fixups[0].opindex);
+ opindex_converter.ptr);
number_to_chars_bigendian (f, insn, size);
if (8 - size > 4)
{
/* tc-mn10300.c -- Assembler code for the Matsushita 10300
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
if (relaxable && fc > 0)
{
+ /* On a 64-bit host the size of an 'int' is not the same
+ as the size of a pointer, so we need a union to convert
+ the opindex field of the fr_cgen structure into a char *
+ so that it can be stored in the frag. We do not have
+ to worry about loosing accuracy as we are not going to
+ be even close to the 32bit limit of the int. */
+ union
+ {
+ int opindex;
+ char * ptr;
+ }
+ opindex_converter;
int type;
/* We want to anchor the line info to the previous frag (if
else
type = 3;
+ opindex_converter.opindex = fixups[0].opindex;
f = frag_var (rs_machine_dependent, 8, 8 - size, type,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *)fixups[0].opindex);
+ opindex_converter.ptr);
/* This is pretty hokey. We basically just care about the
opcode, so we have to write out the first word big endian.
/* tc-tic54x.c -- Assembly code for the Texas Instruments TMS320C54X
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
Contributed by Timothy Wall (twall@cygnus.com)
if (beg < 1)
{
as_bad (_("Invalid subscript (use 1 to %d)"),
- strlen (value));
+ (int) strlen (value));
break;
}
if (*input_line_pointer == ',')
if (beg + len > strlen (value))
{
as_bad (_("Invalid length (use 0 to %d"),
- strlen (value) - beg);
+ (int) strlen (value) - beg);
break;
}
}
/* tc-v850.c -- Assembler code for the NEC V850
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2006 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
asection *sec,
fragS *fragP)
{
+ /* This code performs some nasty type punning between the
+ fr_opcode field of the frag structure (a char *) and the
+ fx_r_type field of the fix structure (a bfd_reloc_code_real_type)
+ On a 64bit host this causes problems because these two fields
+ are not the same size, but since we know that we are only
+ ever storing small integers in the fields, it is safe to use
+ a union to convert between them. */
+ union u
+ {
+ bfd_reloc_code_real_type fx_r_type;
+ char * fr_opcode;
+ }
+ opcode_converter;
subseg_change (sec, 0);
+ opcode_converter.fr_opcode = fragP->fr_opcode;
+
/* In range conditional or unconditional branch. */
if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
{
fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
- fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
+ fragP->fr_offset, 1,
+ BFD_RELOC_UNUSED + opcode_converter.fx_r_type);
fragP->fr_fix += 2;
}
/* Out of range conditional branch. Emit a branch around a jump. */
target. */
md_number_to_chars ((char *) buffer + 2, 0x00000780, 4);
fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
- fragP->fr_offset, 1, BFD_RELOC_UNUSED +
- (int) fragP->fr_opcode + 1);
+ fragP->fr_offset, 1,
+ BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1);
fragP->fr_fix += 6;
}
/* Out of range unconditional branch. Emit a jump. */
{
md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
- fragP->fr_offset, 1, BFD_RELOC_UNUSED +
- (int) fragP->fr_opcode + 1);
+ fragP->fr_offset, 1,
+ BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1);
fragP->fr_fix += 4;
}
else
if (relaxable && fc > 0)
{
+ /* On a 64-bit host the size of an 'int' is not the same
+ as the size of a pointer, so we need a union to convert
+ the opindex field of the fr_cgen structure into a char *
+ so that it can be stored in the frag. We do not have
+ to worry about loosing accuracy as we are not going to
+ be even close to the 32bit limit of the int. */
+ union
+ {
+ int opindex;
+ char * ptr;
+ }
+ opindex_converter;
+
+ opindex_converter.opindex = fixups[0].opindex;
insn_size = 2;
fc = 0;
f = frag_var (rs_machine_dependent, 4, 2, 2,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *) fixups[0].opindex);
+ opindex_converter.ptr);
md_number_to_chars (f, insn, insn_size);
md_number_to_chars (f + 2, 0, 2);
}
f = frag_var (rs_machine_dependent, 6, 4, 0,
fixups[0].exp.X_add_symbol,
fixups[0].exp.X_add_number,
- (char *) fixups[0].opindex);
+ opindex_converter.ptr);
md_number_to_chars (f, insn, insn_size);
md_number_to_chars (f + 2, 0, 4);
}
+2006-01-11 Nick Clifton <nickc@redhat.com>
+
+ * gas/tic54x/address.d: Work with 64bit hosts.
+ * gas/tic54x/addrfar.d: Likewise.
+ * gas/tic54x/align.d: Likewise.
+ * gas/tic54x/all-opcodes.d: Likewise.
+ * gas/tic54x/asg.d: Likewise.
+ * gas/tic54x/cons.d: Likewise.
+ * gas/tic54x/consfar.d: Likewise.
+ * gas/tic54x/extaddr.d: Likewise.
+ * gas/tic54x/field.d: Likewise.
+ * gas/tic54x/labels.d: Likewise.
+ * gas/tic54x/loop.d: Likewise.
+ * gas/tic54x/lp.d: Likewise.
+ * gas/tic54x/macro.d: Likewise.
+ * gas/tic54x/math.d: Likewise.
+ * gas/tic54x/opcodes.d: Likewise.
+ * gas/tic54x/sections.d: Likewise.
+ * gas/tic54x/set.d: Likewise.
+ * gas/tic54x/struct.d: Likewise.
+ * gas/tic54x/subsym.d: Likewise.
+
2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
PR gas/2117
Disassembly of section .text:
-00000000 <_addressing>:
+0+00 <_addressing>:
0: 1801.*
1: 1881.*
2: 1989.*
Disassembly of section .text:
-00000000 <_addressing>:
+0+000 <_addressing>:
0: 1801.*
1: 1881.*
2: 1989.*
.*: +file format .*c54x.*
Sections:
-Idx Name Size VMA LMA File off Algn
- 0 .text 00000089 00000000 00000000 0000.... 2..7
+Idx Name Size VMA + LMA + File off Algn
+ 0 .text 00000089 0+000 0+000 0000.... 2..7
CONTENTS, ALLOC, LOAD, ....
- 1 .data 00000005 00000000 00000000 0000.... 2..1
+ 1 .data 00000005 0+000 0+000 0000.... 2..1
CONTENTS, ALLOC, LOAD, DATA
- 2 .bss 00000000 00000000 00000000 0000.... 2..0
+ 2 .bss 00000000 0+000 0+000 0000.... 2..0
ALLOC
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 4160.*
1: 0001.*
2: 0002.*
...
-00000004 <even>:
+0+004 <even>:
4: 0003.*
...
6: 0061.*
7: 0062.*
8: 0063.*
a: 0065.*
...
10: 0008.*
11: 0000.*
12: 0001.*
18: 0007.*
...
80: 0004.*
81: 0000.*
82: 0001.*
Disassembly of section .text:
-00000000 <start>:
+0+000 <start>:
0: e300.*
1: e304.*
2: e308.*
357ff: 6629.*
35800: 1df8.*
35801: 662a.*
-00035802 <testend>:
+0+035802 <testend>:
35802: f073.*
35803: 5802.*
.*35803: ARELEXT16.*
Disassembly of section .text:
-00000000 <L1>:
+0+000 <L1>:
0: f000.*
1: 0064.*
-00000002 <L2>:
+0+002 <L2>:
2: 1090.*
-00000003 <L3>:
+0+003 <L3>:
3: 1090.*
-00000004 <newlabel>:
+0+004 <newlabel>:
4: f000.*
5: 0000.*
6: f000.*
70: 0063.*
71: 0064.*
-00000072 <end>:
+0+072 <end>:
72: 0100.*
Disassembly of section .text:
-00000000 <binary>:
+0+000 <binary>:
0: 0003.*
1: 0004.*
-00000002 <octal>:
+0+002 <octal>:
2: 0009.*
3: 000a.*
4: 000b.*
-00000005 <hex>:
+0+005 <hex>:
5: 000f.*
6: 0010.*
-00000007 <field>:
+0+007 <field>:
7: 6440.*
8: 0123.*
9: 4000.*
a: 0000.*
b: 1234.*
-0000000c <byte>:
+0+00c <byte>:
c: 00aa.*
d: 00bb.*
-0000000e <word>:
+0+00e <word>:
e: 0ccc.*
-0000000f <xlong>:
+0+00f <xlong>:
f: 0eee.*
10: efff.*
...
-00000012 <long>:
+0+012 <long>:
12: eeee.*
13: ffff.*
-00000014 <int>:
+0+014 <int>:
14: dddd.*
-00000015 <xfloat>:
+0+015 <xfloat>:
15: 3fff.*
16: ffac.*
...
-00000018 <float>:
+0+018 <float>:
18: 3fff.*
19: ffac.*
-0000001a <string>:
+0+01a <string>:
1a: 0061.*
1b: 0062.*
1c: 0063.*
24: 0067.*
25: 0030.*
26: 6162.*
27: 6364.*
28: 6162.*
2a: 6566.*
2b: 6700.*
-0000002c <DAT1>:
+0+02c <DAT1>:
2c: 0000.*
2d: abcd.*
2e: 0000.*
32: 0000.*
33: 006f.*
-00000034 <xlong.0>:
+0+034 <xlong.0>:
34: 0000.*
35: 002c.*
36: aabb.*
37: ccdd.*
-00000038 <DAT2>:
+0+038 <DAT2>:
38: 0000.*
...
-0000003a <DAT3>:
+0+03a <DAT3>:
3a: 1234.*
3b: 5678.*
3c: 0000.*
Disassembly of section .text:
-00000000 <binary>:
+0+000 <binary>:
0: 0003.*
1: 0004.*
-00000002 <octal>:
+0+002 <octal>:
2: 0009.*
3: 000a.*
4: 000b.*
-00000005 <hex>:
+0+005 <hex>:
5: 000f.*
6: 0010.*
-00000007 <field>:
+0+007 <field>:
7: 6440.*
8: 0123.*
9: 4000.*
a: 0000.*
b: 1234.*
-0000000c <byte>:
+0+00c <byte>:
c: 00aa.*
d: 00bb.*
-0000000e <word>:
+0+00e <word>:
e: 0ccc.*
-0000000f <xlong>:
+0+00f <xlong>:
f: 0eee.*
10: efff.*
...
-00000012 <long>:
+0+012 <long>:
12: eeee.*
13: ffff.*
-00000014 <int>:
+0+014 <int>:
14: dddd.*
-00000015 <xfloat>:
+0+015 <xfloat>:
15: 3fff.*
16: ffac.*
...
-00000018 <float>:
+0+018 <float>:
18: 3fff.*
19: ffac.*
-0000001a <string>:
+0+01a <string>:
1a: 0061.*
1b: 0062.*
1c: 0063.*
24: 0067.*
25: 0030.*
26: 6162.*
27: 6364.*
28: 6162.*
2a: 6566.*
2b: 6700.*
-0000002c <DAT1>:
+0+02c <DAT1>:
2c: 0000.*
2d: abcd.*
2e: 0000.*
32: 0000.*
33: 006f.*
-00000034 <xlong.0>:
+0+034 <xlong.0>:
34: 0000.*
.*34: ARELEXT.*
35: 002c.*
36: aabb.*
37: ccdd.*
-00000038 <DAT2>:
+0+038 <DAT2>:
38: 0000.*
...
-0000003a <DAT3>:
+0+03a <DAT3>:
3a: 1234.*
3b: 5678.*
3c: 0000.*
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: f062.*
1: 0000.*
.*1: RELEXTMS7.*
.*3: RELEXT16.*
4: f4e2.*
-00000005 <start>:
+0+005 <start>:
5: f881.*
6: 0080.*
.*5: ARELEXT.*
20: f495.*
...
-00010080 <end>:
+0+010080 <end>:
10080: f881.*
10081: 0080.*
.*10080: ARELEXT.*
Disassembly of section .text:
-00000000 <f1>:
+0+000 <f1>:
0: 2af0.*
1: 5600.*
-00000001 <f2>:
+0+001 <f2>:
1: 5600.*
-00000002 <f4>:
+0+002 <f4>:
2: 0001.*
-00000003 <f5>:
+0+003 <f5>:
3: 0000.*
4: 4321.*
-00000005 <f6>:
+0+005 <f6>:
5: 000f.*
-00000006 <f7>:
+0+006 <f7>:
6: 6000.*
7: 008a.*
-00000007 <f8>:
+0+007 <f8>:
7: 008a.*
Disassembly of section .text:
-00000000 <label1>:
+0+000 <label1>:
0: 1000.*
1: 0800.*
2: f843.*
5: f073.*
6: 0008.*
-00000007 <\$1.*>:
+0+007 <\$1.*>:
7: 1000.*
-00000008 <\$2.*>:
+0+008 <\$2.*>:
8: 0000.*
9: f843.*
a: 000c.*
b: 8000.*
-0000000c <\$1.*>:
+0+00c <\$1.*>:
c: f495.*
d: f495.*
-0000000e <lab.*>:
+0+00e <lab.*>:
e: f000.*
f: 0001.*
10: f073.*
11: 000e.*
-00000012 <lab.*>:
+0+012 <lab.*>:
12: f845.*
13: 0012.*
-00000014 <lab.*>:
+0+014 <lab.*>:
14: f000.*
15: 0003.*
16: f073.*
17: 0014.*
-00000018 <lab.*>:
+0+018 <lab.*>:
18: f000.*
19: 0004.*
1a: f073.*
1b: 0018.*
1c: f073.*
1d: 0014.*
Disassembly of section new_sect:
-00000000 <new_section>:
+0+000 <new_section>:
0: f495.*
-00000001 <lab.7>:
+0+001 <lab.7>:
1: f000.*
2: 0005.*
3: f495.*
5: f073.*
6: 0001.*
-00000007 <lab.8>:
+0+007 <lab.8>:
7: f000.*
8: 0006.*
9: f495.*
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
...
-00000001 <label>:
+0+001 <label>:
1: 0000.*
2: 0001.*
3: 0002.*
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: f49f.*
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: f000.*
1: 0000.*
2: f300.*
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 3fc9.*
1: 0fd8.*
...
Disassembly of section .text:
-00000000 <_opcodes>:
+0+000 <_opcodes>:
0: e39a abdst \*ar3\+,\*ar4\+
1: f485 abs a
2: f585 abs a,b
.*: +file format .*c54x.*
Sections:
-Idx Name Size VMA LMA File off Algn
- 0 .text 0000001b 00000000 00000000 0000.... 2..0
+Idx Name Size VMA + LMA + File off Algn
+ 0 .text 0000001b 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, RELOC, CODE
- 1 .data 00000007 00000000 00000000 0000.... 2..0
+ 1 .data 00000007 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, DATA
- 2 .bss 00000014 00000000 00000000 0000.... 2..0
+ 2 .bss 00000014 0+000 0+000 0000.... 2..0
ALLOC
- 3 newvars 00000017 00000000 00000000 0000.... 2..1
+ 3 newvars 00000017 0+000 0+000 0000.... 2..1
ALLOC, BLOCK
- 4 vectors 00000002 00000000 00000000 0000.... 2..0
+ 4 vectors 00000002 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, CODE, BLOCK
- 5 clink 00000002 00000000 00000000 0000.... 2..0
+ 5 clink 00000002 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, DATA, CLINK
- 6 blksect 00000002 00000000 00000000 0000.... 2..0
+ 6 blksect 00000002 0+000 0+000 0000.... 2..0
CONTENTS, ALLOC, LOAD, DATA, BLOCK
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 1234.*
1: 100f.*
2: f010.*
3: 0001.*
4: f842.*
5: 0002.*
-00000006 <mpy>:
+0+006 <mpy>:
6: 110a.*
-00000007 <mloop>:
+0+007 <mloop>:
7: f166.*
8: 000a.*
9: f868.*
a: 0007.*
-0000000b <space>:
+0+00b <space>:
...
-00000012 <bes>:
+0+012 <bes>:
...
-00000013 <spacep>:
+0+013 <spacep>:
13: 000b.*
-00000014 <besp>:
+0+014 <besp>:
14: 0012.*
...
-00000016 <endpk1>:
+0+016 <endpk1>:
16: 0000.*
...
-00000018 <endpk2>:
+0+018 <endpk2>:
...
...
-0000001a <endpk3>:
+0+01a <endpk3>:
...
Disassembly of section vectors:
-00000000 <vectors>:
+0+000 <vectors>:
0: f495.*
1: f495.*
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 7711.*
1: 0056.*
2: f000.*
3: 0035.*
-00000004 <LABEL>:
+0+004 <LABEL>:
4: 000a.*
5: 0035.*
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 0001.*
1: 0002.*
2: 8002.*
Disassembly of section .text:
-00000000 <.text>:
+0+000 <.text>:
0: 0018.*
-00000001 <label>:
+0+001 <label>:
1: 0005.*
2: 0005.*
3: 0006.*
16: 0000.*
17: 0001.*
-00000018 <x>:
+0+018 <x>:
18: 0001.*
19: 0001.*
...
projects / external / binutils.git / commitdiff