dts: r64: add r64 dts

add a separate DTS for BananaPi R64 because it has 1GB RAM and SATA-Support

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7e29b90..b2b5360 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -962,6 +962,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
 dtb-$(CONFIG_ARCH_MEDIATEK) += \
        mt7622-rfb.dtb \
        mt7623a-unielec-u7623-02-emmc.dtb \
+       mt7622-bpi-r64.dtb \
        mt7623n-bananapi-bpi-r2.dtb \
        mt7629-rfb.dtb \
        mt8512-bm1-emmc.dtb \

diff --git a/arch/arm/dts/mt7622-bpi-r64.dts b/arch/arm/dts/mt7622-bpi-r64.dts
new file mode 100644 (file)
index 0000000..768f15b
--- /dev/null
+++ b/arch/arm/dts/mt7622-bpi-r64.dts
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt7622.dtsi"
+#include "mt7622-u-boot.dtsi"
+
+/ {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       model = "mt7622-bpi-r64";
+       compatible = "mediatek,mt7622", "mediatek,mt7622-rfb";
+       chosen {
+               stdout-path = &uart0;
+               tick-timer = &timer0;
+       };
+
+       aliases {
+               spi0 = &snfi;
+       };
+
+       memory@40000000 {
+               device_type = "memory";
+               reg = <0x40000000 0x40000000>;
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+};
+
+
+&pinctrl {
+       snfi_pins: snfi-pins {
+               mux {
+                       function = "flash";
+                       groups = "snfi";
+               };
+       };
+
+       snor_pins: snor-pins {
+               mux {
+                       function = "flash";
+                       groups = "spi_nor";
+               };
+       };
+
+       uart0_pins: uart0 {
+               mux {
+                       function = "uart";
+                       groups = "uart0_0_tx_rx" ;
+               };
+       };
+
+       pwm_pins: pwm1 {
+               mux {
+                       function = "pwm";
+                       groups = "pwm_ch1_0" ;
+               };
+       };
+
+       watchdog_pins: watchdog-default {
+               mux {
+                       function = "watchdog";
+                       groups = "watchdog";
+               };
+       };
+
+       mmc0_pins_default: mmc0default {
+               mux {
+                       function = "emmc";
+                       groups =  "emmc";
+               };
+
+               /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
+                * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
+                * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
+                */
+               conf-cmd-dat {
+                       pins = "NDL0", "NDL1", "NDL2",
+                              "NDL3", "NDL4", "NDL5",
+                              "NDL6", "NDL7", "NRB";
+                       input-enable;
+                       bias-pull-up;
+               };
+
+               conf-clk {
+                       pins = "NCLE";
+                       bias-pull-down;
+               };
+
+       };
+
+       mmc1_pins_default: mmc1default {
+               mux {
+                       function = "sd";
+                       groups =  "sd_0";
+               };
+               /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
+                *  "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
+                *  DAT2, DAT3, CMD, CLK for SD respectively.
+                */
+               conf-cmd-data {
+                       pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
+                              "I2S2_IN","I2S4_OUT";
+                       input-enable;
+                       drive-strength = <8>;
+                       bias-pull-up;
+               };
+               conf-clk {
+                       pins = "I2S3_OUT";
+                       drive-strength = <12>;
+                       bias-pull-down;
+               };
+               conf-cd {
+                       pins = "TXD3";
+                       bias-pull-up;
+               };
+
+       };
+};
+
+&snfi {
+       pinctrl-names = "default", "snfi";
+       pinctrl-0 = <&snor_pins>;
+       pinctrl-1 = <&snfi_pins>;
+       status = "okay";
+
+       spi-flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               u-boot,dm-pre-reloc;
+       };
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins>;
+       status = "okay";
+};
+
+&pwm {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_pins>;
+       status = "okay";
+};
+
+&mmc0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins_default>;
+       status = "okay";
+       bus-width = <8>;
+       max-frequency = <50000000>;
+       cap-sd-highspeed;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_3p3v>;
+       non-removable;
+};
+
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins_default>;
+       status = "okay";
+       bus-width = <4>;
+       max-frequency = <50000000>;
+       cap-sd-highspeed;
+       r_smpl = <1>;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_3p3v>;
+};
+
+&watchdog {
+       pinctrl-names = "default";
+       pinctrl-0 = <&watchdog_pins>;
+       status = "okay";
+};
+
+&eth {
+       status = "okay";
+       mediatek,gmac-id = <0>;
+       phy-mode = "sgmii";
+       mediatek,switch = "mt7531";
+       reset-gpios = <&gpio 54 GPIO_ACTIVE_HIGH>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};