Clarify precedence of operations involving bitwise and(&) in x64/assembler.

Review URL: http://codereview.chromium.org/131099

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2223 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/AUTHORS b/AUTHORS
index 9b198d0..bfe58a2 100644 (file)
--- a/AUTHORS
+++ b/AUTHORS
@@ -6,6 +6,7 @@
 Google Inc.
 
 Alexander Botero-Lowry <alexbl@FreeBSD.org>
+Alexandre Vassalotti <avassalotti@gmail.com>
 Craig Schlenter <craig.schlenter@gmail.com>
 Daniel Andersson <kodandersson@gmail.com>
 Daniel James <dnljms@gmail.com>

diff --git a/src/x64/assembler-x64-inl.h b/src/x64/assembler-x64-inl.h
index ec27983..60c66e6 100644 (file)
--- a/src/x64/assembler-x64-inl.h
+++ b/src/x64/assembler-x64-inl.h
@@ -123,7 +123,7 @@ void Assembler::emit_optional_rex_32(Register reg, const Operand& op) {
 
 
 void Assembler::emit_optional_rex_32(Register rm_reg) {
-  if (rm_reg.code() & 0x8 != 0) emit(0x41);
+  if (rm_reg.code() > 0x7) emit(0x41);
 }
 
 

diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc
index e89a829..55d228f 100644 (file)
--- a/src/x64/assembler-x64.cc
+++ b/src/x64/assembler-x64.cc
@@ -1021,7 +1021,7 @@ void Assembler::movq(Register dst, Handle<Object> value, RelocInfo::Mode mode) {
   last_pc_ = pc_;
   ASSERT(!Heap::InNewSpace(*value));
   emit_rex_64(dst);
-  emit(0xB8 | dst.code() & 0x7);
+  emit(0xB8 | (dst.code() & 0x7));
   if (value->IsHeapObject()) {
     emitq(reinterpret_cast<uintptr_t>(value.location()), mode);
   } else {

diff --git a/src/x64/assembler-x64.h b/src/x64/assembler-x64.h
index 6a89f8d..44a03ad 100644 (file)
--- a/src/x64/assembler-x64.h
+++ b/src/x64/assembler-x64.h
@@ -45,7 +45,7 @@ namespace internal {
 // Test whether a 64-bit value is in a specific range.
 static inline bool is_uint32(int64_t x) {
   const int64_t kUInt32Mask = V8_INT64_C(0xffffffff);
-  return x == x & kUInt32Mask;
+  return x == (x & kUInt32Mask);
 }
 
 static inline bool is_int32(int64_t x) {