arm64: dts: zynqmp: Add missing iommu IDs

Add missing iommu IDs to all IPs which have IDs assigned.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/78afdafdc60c3182318894f2808f7f337a798278.1611224800.git.michal.simek@xilinx.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 467f92c2044baa0b13c8688b9aae8b17c5d71747..66d53521ec58ef5c12a0f20f589b2ef62d5a0d5a 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -270,6 +270,8 @@
                        interrupts = <0 124 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x14e8>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                };
 
@@ -281,6 +283,8 @@
                        interrupts = <0 125 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x14e9>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                };
 
@@ -292,6 +296,8 @@
                        interrupts = <0 126 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x14ea>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                };
 
@@ -303,6 +309,8 @@
                        interrupts = <0 127 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x14eb>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                };
 
@@ -314,6 +322,8 @@
                        interrupts = <0 128 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x14ec>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                };
 
@@ -325,6 +335,8 @@
                        interrupts = <0 129 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x14ed>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                };
 
@@ -336,6 +348,8 @@
                        interrupts = <0 130 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x14ee>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                };
 
@@ -347,6 +361,8 @@
                        interrupts = <0 131 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x14ef>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                };
 
@@ -375,6 +391,8 @@
                        interrupts = <0 77 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x868>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                };
 
@@ -386,6 +404,8 @@
                        interrupts = <0 78 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x869>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                };
 
@@ -397,6 +417,8 @@
                        interrupts = <0 79 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x86a>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                };
 
@@ -408,6 +430,8 @@
                        interrupts = <0 80 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x86b>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                };
 
@@ -419,6 +443,8 @@
                        interrupts = <0 81 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x86c>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                };
 
@@ -430,6 +456,8 @@
                        interrupts = <0 82 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x86d>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                };
 
@@ -441,6 +469,8 @@
                        interrupts = <0 83 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x86e>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                };
 
@@ -452,6 +482,8 @@
                        interrupts = <0 84 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x86f>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                };
 
@@ -471,6 +503,8 @@
                        interrupts = <0 14 4>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x872>;
                        power-domains = <&zynqmp_firmware PD_NAND>;
                };
 
@@ -483,6 +517,8 @@
                        clock-names = "pclk", "hclk", "tx_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x874>;
                        power-domains = <&zynqmp_firmware PD_ETH_0>;
                };
 
@@ -495,6 +531,8 @@
                        clock-names = "pclk", "hclk", "tx_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x875>;
                        power-domains = <&zynqmp_firmware PD_ETH_1>;
                };
 
@@ -507,6 +545,8 @@
                        clock-names = "pclk", "hclk", "tx_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x876>;
                        power-domains = <&zynqmp_firmware PD_ETH_2>;
                };
 
@@ -519,6 +559,8 @@
                        clock-names = "pclk", "hclk", "tx_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x877>;
                        power-domains = <&zynqmp_firmware PD_ETH_3>;
                };
 
@@ -606,6 +648,8 @@
                              <0x0 0xc0000000 0x0 0x8000000>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x873>;
                        power-domains = <&zynqmp_firmware PD_QSPI>;
                };
 
@@ -635,6 +679,9 @@
                        interrupt-parent = <&gic>;
                        interrupts = <0 133 4>;
                        power-domains = <&zynqmp_firmware PD_SATA>;
+                       #stream-id-cells = <4>;
+                       iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
+                                <&smmu 0x4c2>, <&smmu 0x4c3>;
                };
 
                sdhci0: mmc@ff160000 {
@@ -644,6 +691,8 @@
                        interrupts = <0 48 4>;
                        reg = <0x0 0xff160000 0x0 0x1000>;
                        clock-names = "clk_xin", "clk_ahb";
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x870>;
                        #clock-cells = <1>;
                        clock-output-names = "clk_out_sd0", "clk_in_sd0";
                        power-domains = <&zynqmp_firmware PD_SD_0>;
@@ -656,6 +705,8 @@
                        interrupts = <0 49 4>;
                        reg = <0x0 0xff170000 0x0 0x1000>;
                        clock-names = "clk_xin", "clk_ahb";
+                       #stream-id-cells = <1>;
+                       iommus = <&smmu 0x871>;
                        #clock-cells = <1>;
                        clock-output-names = "clk_out_sd1", "clk_in_sd1";
                        power-domains = <&zynqmp_firmware PD_SD_1>;
@@ -664,6 +715,7 @@
                smmu: iommu@fd800000 {
                        compatible = "arm,mmu-500";
                        reg = <0x0 0xfd800000 0x0 0x20000>;
+                       #iommu-cells = <1>;
                        status = "disabled";
                        #global-interrupts = <1>;
                        interrupt-parent = <&gic>;