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arm64: dts: qcom: sm6125: fix SDHCI CQE reg names
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 26 Oct 2022 16:36:46 +0000 (12:36 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 31 Dec 2022 12:31:50 +0000 (13:31 +0100)
[ Upstream commit 3de1172624b3c4ca65730bc34333ab493510b3e1 ]

SM6125 comes with SDCC (SDHCI controller) v5, so the second range of
registers is cqhci, not core.

Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Sony Xperia 10 II
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026163646.37433-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/qcom/sm6125.dtsi patch | blob | history

diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 1fe3fa3..7818fb6 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -458,7 +458,7 @@
                sdhc_1: mmc@4744000 {
                        compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0x04744000 0x1000>, <0x04745000 0x1000>;
-                       reg-names = "hc", "core";
+                       reg-names = "hc", "cqhci";
 
                        interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
Domain: System / Kernel;