!(producer->info.outputs_written & VARYING_BIT_LAYER)) {
NIR_PASS(_, producer, radv_lower_multiview);
}
+
+ /* Lower the view index to map on the layer. */
+ NIR_PASS(_, consumer, radv_lower_view_index, producer->info.stage == MESA_SHADER_MESH);
}
if (pipeline_key->optimisations_disabled)
/* Gather info again, information such as outputs_read can be out-of-date. */
nir_shader_gather_info(stages[i].nir, nir_shader_get_entrypoint(stages[i].nir));
- radv_lower_io(device, stages[i].nir, stages[MESA_SHADER_MESH].nir);
+ radv_lower_io(device, stages[i].nir);
stages[i].feedback.duration += os_time_get_nano() - stage_start;
}
* driver_location.
*/
-static bool
-lower_view_index(nir_shader *nir, bool per_primitive)
+bool
+radv_lower_view_index(nir_shader *nir, bool per_primitive)
{
bool progress = false;
nir_function_impl *entry = nir_shader_get_entrypoint(nir);
}
void
-radv_lower_io(struct radv_device *device, nir_shader *nir, bool is_mesh_shading)
+radv_lower_io(struct radv_device *device, nir_shader *nir)
{
if (nir->info.stage == MESA_SHADER_COMPUTE)
return;
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
- NIR_PASS(_, nir, lower_view_index, is_mesh_shading);
nir_assign_io_var_locations(nir, nir_var_shader_in, &nir->num_inputs, MESA_SHADER_FRAGMENT);
}
return num_patches;
}
-void radv_lower_io(struct radv_device *device, nir_shader *nir, bool is_mesh_shading);
+void radv_lower_io(struct radv_device *device, nir_shader *nir);
bool radv_lower_io_to_mem(struct radv_device *device, struct radv_pipeline_stage *stage);
+bool radv_lower_view_index(nir_shader *nir, bool per_primitive);
+
void radv_lower_ngg(struct radv_device *device, struct radv_pipeline_stage *ngg_stage,
const struct radv_pipeline_key *pl_key);