ARM64: dts: meson-axg: describe pin DT info for I2C controller

Describe all the pin mux for the I2C controller which found in
Meson-AXG SoC.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 9ac300f..a6b83e8 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -499,6 +499,70 @@
                                                function = "spi1";
                                        };
                                };
+
+                               i2c0_pins: i2c0 {
+                                       mux {
+                                               groups = "i2c0_sck",
+                                                       "i2c0_sda";
+                                               function = "i2c0";
+                                       };
+                               };
+
+                               i2c1_z_pins: i2c1_z {
+                                       mux {
+                                               groups = "i2c1_sck_z",
+                                                       "i2c1_sda_z";
+                                               function = "i2c1";
+                                       };
+                               };
+
+                               i2c1_x_pins: i2c1_x {
+                                       mux {
+                                               groups = "i2c1_sck_x",
+                                                       "i2c1_sda_x";
+                                               function = "i2c1";
+                                       };
+                               };
+
+                               i2c2_x_pins: i2c2_x {
+                                       mux {
+                                               groups = "i2c2_sck_x",
+                                                       "i2c2_sda_x";
+                                               function = "i2c2";
+                                       };
+                               };
+
+                               i2c2_a_pins: i2c2_a {
+                                       mux {
+                                               groups = "i2c2_sck_a",
+                                                       "i2c2_sda_a";
+                                               function = "i2c2";
+                                       };
+                               };
+
+                               i2c3_a6_pins: i2c3_a6 {
+                                       mux {
+                                               groups = "i2c3_sda_a6",
+                                                       "i2c3_sck_a7";
+                                               function = "i2c3";
+                                       };
+                               };
+
+                               i2c3_a12_pins: i2c3_a12 {
+                                       mux {
+                                               groups = "i2c3_sda_a12",
+                                                       "i2c3_sck_a13";
+                                               function = "i2c3";
+                                       };
+                               };
+
+                               i2c3_a19_pins: i2c3_a19 {
+                                       mux {
+                                               groups = "i2c3_sda_a19",
+                                                       "i2c3_sck_a20";
+                                               function = "i2c3";
+                                       };
+                               };
                        };
                };