drm/i915/kbl+: Enable IPC only for symmetric memory configurations
authorMahesh Kumar <mahesh1.kumar@intel.com>
Fri, 24 Aug 2018 09:32:25 +0000 (15:02 +0530)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 13 Sep 2018 21:33:03 +0000 (14:33 -0700)
IPC may cause underflows if not used with dual channel symmetric
memory configuration. Disable IPC for non symmetric configurations in
affected platforms.
Display WA #1141

Changes Since V1:
 - Re-arrange the code.
 - update wrapper to return if memory is symmetric (Rodrigo)

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180824093225.12598-6-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_pm.c

index c293341..dbe40b2 100644 (file)
@@ -1141,21 +1141,32 @@ skl_dram_get_channel_info(struct dram_channel_info *ch, u32 val)
        return 0;
 }
 
+static bool
+intel_is_dram_symmetric(u32 val_ch0, u32 val_ch1,
+                       struct dram_channel_info *ch0)
+{
+       return (val_ch0 == val_ch1 &&
+               (ch0->s_info.size == 0 ||
+                (ch0->l_info.size == ch0->s_info.size &&
+                 ch0->l_info.width == ch0->s_info.width &&
+                 ch0->l_info.rank == ch0->s_info.rank)));
+}
+
 static int
 skl_dram_get_channels_info(struct drm_i915_private *dev_priv)
 {
        struct dram_info *dram_info = &dev_priv->dram_info;
        struct dram_channel_info ch0, ch1;
-       u32 val;
+       u32 val_ch0, val_ch1;
        int ret;
 
-       val = I915_READ(SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
-       ret = skl_dram_get_channel_info(&ch0, val);
+       val_ch0 = I915_READ(SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
+       ret = skl_dram_get_channel_info(&ch0, val_ch0);
        if (ret == 0)
                dram_info->num_channels++;
 
-       val = I915_READ(SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
-       ret = skl_dram_get_channel_info(&ch1, val);
+       val_ch1 = I915_READ(SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
+       ret = skl_dram_get_channel_info(&ch1, val_ch1);
        if (ret == 0)
                dram_info->num_channels++;
 
@@ -1185,6 +1196,12 @@ skl_dram_get_channels_info(struct drm_i915_private *dev_priv)
        if (ch0.is_16gb_dimm || ch1.is_16gb_dimm)
                dram_info->is_16gb_dimm = true;
 
+       dev_priv->dram_info.symmetric_memory = intel_is_dram_symmetric(val_ch0,
+                                                                      val_ch1,
+                                                                      &ch0);
+
+       DRM_DEBUG_KMS("memory configuration is %sSymmetric memory\n",
+                     dev_priv->dram_info.symmetric_memory ? "" : "not ");
        return 0;
 }
 
index 89366c2..ea6c6f7 100644 (file)
@@ -1956,6 +1956,7 @@ struct drm_i915_private {
                        I915_DRAM_RANK_DUAL
                } rank;
                u32 bandwidth_kbps;
+               bool symmetric_memory;
        } dram_info;
 
        struct i915_runtime_pm runtime_pm;
index ac81770..1db9b83 100644 (file)
@@ -6121,6 +6121,11 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
        if (IS_SKYLAKE(dev_priv))
                dev_priv->ipc_enabled = false;
 
+       /* Display WA #1141: SKL:all KBL:all CFL */
+       if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) &&
+           !dev_priv->dram_info.symmetric_memory)
+               dev_priv->ipc_enabled = false;
+
        val = I915_READ(DISP_ARB_CTL2);
 
        if (dev_priv->ipc_enabled)