drm/bridge/sii8620: fix CBUS bring-up sequence

In case of MHL3 CBUS is bring-up already in sii8620_got_ecbus_speed.

Change-Id: I4abafa944113528eb6cc71799a35f4215aeac428
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>

diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c
index c9341a4fe67c15393e89f2e146bbff5727176b69..d620e853670aa48e59592c51801e21b93439764c 100644 (file)
--- a/drivers/gpu/drm/bridge/sil-sii8620.c
+++ b/drivers/gpu/drm/bridge/sil-sii8620.c
@@ -451,10 +451,6 @@ static void sii8620_mr_xdevcap(struct sii8620 *ctx)
 {
        sii8620_read_buf(ctx, REG_EDID_FIFO_RD_DATA, ctx->xdevcap,
                         MHL_XDC_SIZE);
-
-       sii8620_mt_write_stat(ctx, MHL_XDS_REG(CURR_ECBUS_MODE),
-                             MHL_XDS_ECBUS_S | MHL_XDS_SLOT_MODE_8BIT);
-       sii8620_mt_rap(ctx, MHL_RAP_CBUS_MODE_UP);
 }
 
 static void sii8620_mt_read_devcap_recv(struct sii8620 *ctx,