spi: octeon_spi: Use a fixed 100MHz input clock on Octeon TX2
authorStefan Roese <sr@denx.de>
Wed, 5 Aug 2020 13:07:30 +0000 (15:07 +0200)
committerStefan Roese <sr@denx.de>
Fri, 16 Oct 2020 11:55:04 +0000 (13:55 +0200)
Octeon TX2 sets the TB100_EN bit in the config register. We need to use
a fixed 100MHz clock for this as well to work properly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
drivers/spi/octeon_spi.c

index 83fe633..7e88e55 100644 (file)
@@ -519,7 +519,10 @@ static int octeon_spi_set_speed(struct udevice *bus, uint max_hz)
        if (max_hz > OCTEON_SPI_MAX_CLOCK_HZ)
                max_hz = OCTEON_SPI_MAX_CLOCK_HZ;
 
-       clk_rate = clk_get_rate(&priv->clk);
+       if (device_is_compatible(bus, "cavium,thunderx-spi"))
+               clk_rate = 100000000;
+       else
+               clk_rate = clk_get_rate(&priv->clk);
        if (IS_ERR_VALUE(clk_rate))
                return -EINVAL;