ARM: dts: mmp2: add more TWSI controllers
authorLubomir Rintel <lkundrak@v3.sk>
Wed, 28 Nov 2018 17:53:11 +0000 (18:53 +0100)
committerOlof Johansson <olof@lixom.net>
Fri, 30 Nov 2018 23:13:14 +0000 (15:13 -0800)
I've gotten the base addresses, clocks and interrupts from an rusty and old
out-of-tree driver. I haven't actually checked against the datasheet, since
that one is reserved for the Marvell inner circle.

Tested with an accelerometer on TWSI6 on an OLPC XO 1.75 machine.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/boot/dts/mmp2.dtsi

index c5787eea57c7fd9dee26476894f86a22ff315b7e..c48d17a38d6b09ee0712ceba5a84c41cffda41f7 100644 (file)
                                status = "disabled";
                        };
 
+                       twsi3: i2c@d4032000 {
+                               compatible = "mrvl,mmp-twsi";
+                               reg = <0xd4032000 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <1>;
+                               clocks = <&soc_clocks MMP2_CLK_TWSI2>;
+                               resets = <&soc_clocks MMP2_CLK_TWSI2>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       twsi4: i2c@d4033000 {
+                               compatible = "mrvl,mmp-twsi";
+                               reg = <0xd4033000 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <2>;
+                               clocks = <&soc_clocks MMP2_CLK_TWSI3>;
+                               resets = <&soc_clocks MMP2_CLK_TWSI3>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+
+                       twsi5: i2c@d4033800 {
+                               compatible = "mrvl,mmp-twsi";
+                               reg = <0xd4033800 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <3>;
+                               clocks = <&soc_clocks MMP2_CLK_TWSI4>;
+                               resets = <&soc_clocks MMP2_CLK_TWSI4>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       twsi6: i2c@d4034000 {
+                               compatible = "mrvl,mmp-twsi";
+                               reg = <0xd4034000 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <4>;
+                               clocks = <&soc_clocks MMP2_CLK_TWSI5>;
+                               resets = <&soc_clocks MMP2_CLK_TWSI5>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
                        rtc: rtc@d4010000 {
                                compatible = "mrvl,mmp-rtc";
                                reg = <0xd4010000 0x1000>;