drm/amdgpu: Disable MCBP from soc21 for SRIOV
authorYiqing Yao <yiqing.yao@amd.com>
Fri, 28 Oct 2022 09:30:17 +0000 (17:30 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 4 Nov 2022 20:05:53 +0000 (16:05 -0400)
[why]
Start from soc21, CP does not support MCBP, so disable it.

[how]
Used amgpu_mcbp flag alone instead of checking if is in SRIOV to
enable/disable MCBP.
Only set flag to enable on asic_type prior to soc21 in SRIOV.

Signed-off-by: Yiqing Yao <yiqing.yao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

index ae10ace..522820e 100644 (file)
@@ -2397,7 +2397,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
                        adev->ip_blocks[i].status.hw = true;
 
                        /* right after GMC hw init, we create CSA */
-                       if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) {
+                       if (amdgpu_mcbp) {
                                r = amdgpu_allocate_static_csa(adev, &adev->virt.csa_obj,
                                                                AMDGPU_GEM_DOMAIN_VRAM,
                                                                AMDGPU_CSA_SIZE);
index 4e42dcb..d75e037 100644 (file)
@@ -796,7 +796,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
                dev_info->ids_flags = 0;
                if (adev->flags & AMD_IS_APU)
                        dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
-               if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
+               if (amdgpu_mcbp)
                        dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
                if (amdgpu_is_tmz(adev))
                        dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
@@ -1172,7 +1172,7 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
                goto error_vm;
        }
 
-       if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) {
+       if (amdgpu_mcbp) {
                uint64_t csa_addr = amdgpu_csa_vaddr(adev) & AMDGPU_GMC_HOLE_MASK;
 
                r = amdgpu_map_static_csa(adev, &fpriv->vm, adev->virt.csa_obj,
@@ -1236,7 +1236,7 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
        if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_VCE) != NULL)
                amdgpu_vce_free_handles(adev, file_priv);
 
-       if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) {
+       if (amdgpu_mcbp) {
                /* TODO: how to handle reserve failure */
                BUG_ON(amdgpu_bo_reserve(adev->virt.csa_obj, true));
                amdgpu_vm_bo_del(adev, fpriv->csa_va);
index c73abe5..a226a6c 100644 (file)
@@ -64,6 +64,10 @@ void amdgpu_virt_init_setting(struct amdgpu_device *adev)
        ddev->driver_features &= ~DRIVER_ATOMIC;
        adev->cg_flags = 0;
        adev->pg_flags = 0;
+
+       /* enable mcbp for sriov asic_type before soc21 */
+       amdgpu_mcbp = (adev->asic_type < CHIP_IP_DISCOVERY) ? 1 : 0;
+
 }
 
 void amdgpu_virt_kiq_reg_write_reg_wait(struct amdgpu_device *adev,
index af94ac5..ff3c127 100644 (file)
@@ -8489,7 +8489,7 @@ static void gfx_v10_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
 
        control |= ib->length_dw | (vmid << 24);
 
-       if ((amdgpu_sriov_vf(ring->adev) || amdgpu_mcbp) && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
+       if (amdgpu_mcbp && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
                control |= INDIRECT_BUFFER_PRE_ENB(1);
 
                if (flags & AMDGPU_IB_PREEMPTED)
@@ -8664,7 +8664,7 @@ static void gfx_v10_0_ring_emit_cntxcntl(struct amdgpu_ring *ring,
 {
        uint32_t dw2 = 0;
 
-       if (amdgpu_mcbp || amdgpu_sriov_vf(ring->adev))
+       if (amdgpu_mcbp)
                gfx_v10_0_ring_emit_ce_meta(ring,
                                    (!amdgpu_sriov_vf(ring->adev) && flags & AMDGPU_IB_PREEMPTED) ? true : false);
 
index f68e13b..84a76c3 100644 (file)
@@ -5326,7 +5326,7 @@ static void gfx_v11_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
 
        control |= ib->length_dw | (vmid << 24);
 
-       if ((amdgpu_sriov_vf(ring->adev) || amdgpu_mcbp) && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
+       if (amdgpu_mcbp && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
                control |= INDIRECT_BUFFER_PRE_ENB(1);
 
                if (flags & AMDGPU_IB_PREEMPTED)