This keeping this clock enabled is needed for proper GSCL power domain
on/off sequence, so add this flag to avoid core disabling it on boot.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I8b2e39c3a76fd194104eb21066d33b2f0a5a8289
GATE(CLK_ACLK550_CAM, "aclk550_cam", "mout_user_aclk550_cam",
GATE_BUS_TOP, 24, 0, 0),
GATE(CLK_ACLK432_SCALER, "aclk432_scaler", "mout_user_aclk432_scaler",
- GATE_BUS_TOP, 27, 0, 0),
+ GATE_BUS_TOP, 27, CLK_IGNORE_UNUSED, 0),
};
struct samsung_mux_clock exynos5420_mux_clks[] __initdata = {