+2012-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * sysdeps/x86_64/multiarch/memcmp-sse4.S: Load cache size into
+ R8_LP.
+
2012-05-15 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
* sysdeps/powerpc/powerpc32/power7/fpu/s_logb.c: New file. Optimized
ALIGN (4)
L(512bytesormore):
# ifdef DATA_CACHE_SIZE_HALF
- mov $DATA_CACHE_SIZE_HALF, %r8
+ mov $DATA_CACHE_SIZE_HALF, %R8_LP
# else
- mov __x86_64_data_cache_size_half(%rip), %r8
+ mov __x86_64_data_cache_size_half(%rip), %R8_LP
# endif
mov %r8, %r9
shr $1, %r8
ALIGN (4)
L(512bytesormorein2aligned):
# ifdef DATA_CACHE_SIZE_HALF
- mov $DATA_CACHE_SIZE_HALF, %r8
+ mov $DATA_CACHE_SIZE_HALF, %R8_LP
# else
- mov __x86_64_data_cache_size_half(%rip), %r8
+ mov __x86_64_data_cache_size_half(%rip), %R8_LP
# endif
mov %r8, %r9
shr $1, %r8