clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 29 Sep 2016 11:06:15 +0000 (13:06 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 30 Mar 2017 11:25:43 +0000 (13:25 +0200)
Add all R-Car H3 ES2.0 Clock Pulse Generator Core Clock Outputs, as
listed in Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3
Hardware User's Manual rev. 0.53E.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/clock/r8a7795-cpg-mssr.h

index e864aae..f047eaf 100644 (file)
 #define R8A7795_CLK_R                  45
 #define R8A7795_CLK_OSC                        46
 
+/* r8a7795 ES2.0 CPG Core Clocks */
+#define R8A7795_CLK_S0D2               47
+#define R8A7795_CLK_S0D3               48
+#define R8A7795_CLK_S0D6               49
+#define R8A7795_CLK_S0D8               50
+#define R8A7795_CLK_S0D12              51
+
 #endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */