ARM: dts: sunxi: Add missing watchdog interrupts
authorMaxime Ripard <maxime.ripard@bootlin.com>
Wed, 21 Aug 2019 14:38:34 +0000 (16:38 +0200)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Fri, 23 Aug 2019 10:02:05 +0000 (12:02 +0200)
The watchdog has an interrupt on all our SoCs, but it wasn't always listed.
Add it to the devicetree where it's missing.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
arch/arm/boot/dts/sun4i-a10.dtsi
arch/arm/boot/dts/sun5i.dtsi
arch/arm/boot/dts/sun6i-a31.dtsi
arch/arm/boot/dts/sun7i-a20.dtsi
arch/arm/boot/dts/sun8i-r40.dtsi

index 077d45c..eed9fcb 100644 (file)
                wdt: watchdog@1c20c90 {
                        compatible = "allwinner,sun4i-a10-wdt";
                        reg = <0x01c20c90 0x10>;
+                       interrupts = <24>;
                };
 
                rtc: rtc@1c20d00 {
index 4e725af..29a825f 100644 (file)
                wdt: watchdog@1c20c90 {
                        compatible = "allwinner,sun4i-a10-wdt";
                        reg = <0x01c20c90 0x10>;
+                       interrupts = <24>;
                };
 
                ir0: ir@1c21800 {
index 8176da5..cba8864 100644 (file)
                wdt1: watchdog@1c20ca0 {
                        compatible = "allwinner,sun6i-a31-wdt";
                        reg = <0x01c20ca0 0x20>;
+                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                spdif: spdif@1c21000 {
index 524c1d5..747ead9 100644 (file)
                wdt: watchdog@1c20c90 {
                        compatible = "allwinner,sun4i-a10-wdt";
                        reg = <0x01c20c90 0x10>;
+                       interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                rtc: rtc@1c20d00 {
index 09e2076..f1be554 100644 (file)
                wdt: watchdog@1c20c90 {
                        compatible = "allwinner,sun4i-a10-wdt";
                        reg = <0x01c20c90 0x10>;
+                       interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                uart0: serial@1c28000 {