Tue Oct 28 12:29:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
+ * sim-endian.h (H2T): Handle 16 byte variables.
+
+ * sim-n-core.h (sim_core_read_unaligned_N): Return a dummy when an
+ error.
+
* sim-core.c: Do not generate sim_core_*_word.
* sim-n-core.h (sim_core_trace_N): Add line_nr argument.
#define H2T(VARIABLE) \
do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = H2T_1(VARIABLE); break; \
- case 2: VARIABLE = H2T_2(VARIABLE); break; \
- case 4: VARIABLE = H2T_4(VARIABLE); break; \
- case 8: VARIABLE = H2T_8(VARIABLE); break; \
- /*case 16: VARIABLE = H2T_16(VARIABLE); break;*/ \
+ void *vp = &(VARIABLE); \
+ switch (sizeof (VARIABLE)) { \
+ case 1: *(unsigned_1*)vp = H2T_1(*(unsigned_1*)vp); break; \
+ case 2: *(unsigned_2*)vp = H2T_2(*(unsigned_2*)vp); break; \
+ case 4: *(unsigned_4*)vp = H2T_4(*(unsigned_4*)vp); break; \
+ case 8: *(unsigned_8*)vp = H2T_8(*(unsigned_8*)vp); break; \
+ case 16: *(unsigned_16*)vp = H2T_16(*(unsigned_16*)vp); break; \
} \
} while (0)
sim_engine_abort (CPU_STATE (cpu), cpu, cia,
"internal error - %s - bad switch",
XSTRING (sim_core_read_unaligned_N));
+ /* to keep some compilers happy, we return a dummy */
+ {
+ unsigned_N val[1] = { };
+ return val[0];
+ }
}
}
+Tue Oct 28 10:50:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * gen-icache.c (print_icache_extraction): Force result of atol to
+ unsigned.
+
+ * ld-insn.c (parse_function_record): Separate handling of old and
+ ney fynction records.
+ (load_insn_table): For %s record, hack function name & type after
+ it has been parsed.
+
+ * filter.h (filter_is_subset): Reverse argument names, wrong
+ order.
+
+ * ld-insn.c (load_insn_table): Move include code to.
+ (parse_include_record): New function. Check for filtering of
+ include statement by both flags and models.
+ (load_insn_table): Check for model filtering of cache and model
+ records.
+ (parse_model_data_record): Check for model & flag filtering of
+ model data records.
+ (parse_function_record): Check for model & flag filtering of
+ function records.
+
+ * ld-insn.h: Define record_filter_models_field. Add filter-models
+ field to all but instruction records.
+ (struct _function_entry, struct _cache_entry): Add models field.
+ (nr_function_fields): Make parm field mandatory.
+
Mon Oct 27 15:14:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
* igen.c (main): Change -I option to -I<directory>. Add optional
/* Common among most entries:
+ All non instruction records have the format:
+
+ <...> ::=
+ ":" <record-name>
+ ":" <filter-flags>
+ ":" <filter-models>
+ ":" ...
+
*/
enum {
record_type_field = 1,
old_record_type_field = 2,
record_filter_flags_field = 2,
+ record_filter_models_field = 3,
};
<include> ::=
":" "include"
":" <filter-flags>
+ ":" <filter-models>
":" <filename>
<nl>
;
*/
enum {
- include_record_filename_field = 3,
- nr_include_record_fields = 4,
+ include_filename_field = 4,
+ nr_include_fields,
};
<option> ::=
":" "option"
":" <filter-flags>
+ ":" <filter-models>
":" <option-name>
":" <option-value>
<nl>
enum {
- option_name_field = 3,
- option_value_field = 4,
- nr_option_fields = 5,
+ option_name_field = 4,
+ option_value_field,
+ nr_option_fields,
};
<insn-macro> ::=
<expression>
- ":" "define"
+ ":" ( "define" | "undef" )
":" <filter-flags>
- ":"
+ ":" <filter-models>
":" <name>
<nl>
;
<function-spec>
;
+ <format> ::=
+ ":" ( "%s" | ... )
+ <function-spec>
+ ;
+
<function-spec> ::=
":" <filter-flags>
+ ":" <filter-models>
":" <typedef>
":" <name>
[ ":" <parameter-list> ]
*/
enum {
- function_typedef_field = 3,
- function_name_field = 4,
- function_param_field = 5,
- nr_function_fields = 5,
+ function_typedef_field = 4,
+ function_name_field,
+ function_param_field,
+ nr_function_fields,
};
enum {
old_function_type_field = 2,
old_function_name_field = 4,
old_function_param_field = 5,
- nr_old_function_fields = 6,
+ nr_old_function_fields = 5, /* parameter-list is optional */
};
struct _function_entry {
line_ref *line;
filter *flags;
+ filter *models;
char *type;
char *name;
char *param;
<cache-macro> ::=
":" <macro-type>
":" <filter-flags>
- ":" <type>
+ ":" <filter-models>
+ ":" <typedef>
":" <name>
":" <field-name> { "," <field-name> }
":" <expression>
*/
enum {
- cache_type_field = 3,
- cache_name_field = 4,
- cache_original_fields_field = 5,
- cache_expression_field = 6,
- nr_cache_fields = 7,
+ cache_typedef_field = 4,
+ cache_name_field,
+ cache_original_fields_field,
+ cache_expression_field,
+ nr_cache_fields,
};
typedef enum {
struct _cache_entry {
line_ref *line;
filter *flags;
+ filter *models;
cache_entry_type entry_type;
char *name;
filter *original_fields;
<model-processor> ::=
":" "model"
":" <filter-flags>
+ ":" <filter-models>
":" <processor>
":" <long-processor>
":" <function-unit-data>
<model-macro> ::=
":" "model-macro"
":" <filter-flags>
+ ":" <filter-models>
<nl>
<code-block>
;
<model-data> ::=
":" "model-data"
":" <filter-flags>
+ ":" <filter-models>
<nl>
<code-block>
;
*/
enum {
- nr_model_macro_fields = 3,
- nr_model_data_fields = 3,
- nr_model_static_fields = 6,
- nr_model_internal_fields = 6,
- nr_model_function_fields = 6,
+ nr_model_macro_fields = 4,
+ nr_model_data_fields = 4,
+ nr_model_static_fields = nr_function_fields,
+ nr_model_internal_fields = nr_function_fields,
+ nr_model_function_fields = nr_function_fields,
};
typedef struct _model_data model_data;
};
enum {
- model_name_field = 3,
- model_full_name_field = 4,
- model_unit_data_field = 5,
- nr_model_processor_fields = 6,
+ model_name_field = 4,
+ model_full_name_field,
+ model_unit_data_field,
+ nr_model_processor_fields,
};
typedef struct _model_entry model_entry;
+Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * mips.igen: Add model filter field to records.
+
Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
// IGEN config - mips16
-:option:16:insn-bit-size:16
-:option:16:hi-bit-nr:15
-:option:16:insn-specifying-widths:true
-:option:16:gen-delayed-branch:false
+:option:16::insn-bit-size:16
+:option:16::hi-bit-nr:15
+:option:16::insn-specifying-widths:true
+:option:16::gen-delayed-branch:false
// IGEN config - mips32/64..
-:option:32:insn-bit-size:32
-:option:32:hi-bit-nr:31
-:option:32:insn-specifying-widths:true
-:option:32:gen-delayed-branch:false
+:option:32::insn-bit-size:32
+:option:32::hi-bit-nr:31
+:option:32::insn-specifying-widths:true
+:option:32::gen-delayed-branch:false
// Generate separate simulators for each target
-// :option::multi-sim:true
+// :option:::multi-sim:true
// Models known by this simulator
-:model::mipsI:mipsI:
-:model::mipsII:mipsII:
-:model::mipsIII:mipsIII:
-:model::mipsIV:mipsIV:
-:model::mips16:mips16:
+:model:::mipsI:mipsI:
+:model:::mipsII:mipsII:
+:model:::mipsIII:mipsIII:
+:model:::mipsIV:mipsIV:
+:model:::mips16:mips16:
// start-sanitize-r5900
-:model::r5900:r5900:
+:model:::r5900:r5900:
// end-sanitize-r5900
-:model::r3900:r3900:
+:model:::r3900:r3900:
// start-sanitize-tx19
-:model::tx19:tx19:
+:model:::tx19:tx19:
// end-sanitize-tx19
// start-sanitize-vr5400
-:model::vr5400:vr5400:
+:model:::vr5400:vr5400:
// end-sanitize-vr5400
// Pseudo instructions known by IGEN
-:internal:::illegal
+:internal::::illegal:
{
sim_io_eprintf (SD, "Illegal instruction at address 0x%lx\n",
(unsigned long) CIA);
//
-:%s:::FMT:int fmt
+:%s::::FMT:int fmt
{
switch (fmt)
{
}
}
-:%s:::TF:int tf
+:%s::::TF:int tf
{
if (tf)
return "t";
return "f";
}
-:%s:::ND:int nd
+:%s::::ND:int nd
{
if (nd)
return "l";
return "";
}
-:%s:::COND:int cond
+:%s::::COND:int cond
{
switch (cond)
{
// end-sanitize-r5900
\f
-:include::m16.igen
+:include:::m16.igen
// start-sanitize-vr5400
-:include::vr5400.igen
+:include::vr5400:vr5400.igen
// end-sanitize-vr5400
// start-sanitize-r5900
-:include::r5900.igen
+:include::r5900:r5900.igen
// end-sanitize-r5900
\f
// start-sanitize-cygnus-never
+Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * v850.igen: Add model filter field to records.
+
Fri Oct 17 17:26:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
* alu.h (ALU32_END): Use ALU32_RESULT.
// The following is called when ever an illegal instruction is encountered.
-::internal::illegal
+:internal::::illegal:
sim_io_eprintf (SD, "0x%lx: illegal instruction\n", (unsigned long) cia.ip);
sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIGILL);
// The following is called when ever an FP op is attempted with FPU disabled.
-::internal::fp_unavailable
+:internal::::fp_unavailable:
sim_io_eprintf (SD, "0x%lx: floating-point unavailable\n", (unsigned long) cia.ip);
sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIGFPE);
// Handle a branch instruction
-instruction_address::function::do_branch:int annul, address_word target, int rLink_p, unsigned32 *rLink
+:function:::instruction_address:do_branch:int annul, address_word target, int rLink_p, unsigned32 *rLink
instruction_address nia;
if (annul)
{
return nia;
// Signed Integer Add - add source1, source2, dest
-void::function::do_add:unsigned32 *rDest, signed32 source1, signed32 source2
+:function:::void:do_add:unsigned32 *rDest, signed32 source1, signed32 source2
unsigned32 result;
ALU_BEGIN (source1);
ALU_ADD (source2);
// Unsigned Integer Add - addu source1, source2, dest
-void::function::do_addu:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
+:function:::void:do_addu:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
unsigned32 result = source1 + source2;
TRACE_ALU3 (MY_INDEX, result, source1, source2);
*rDest = result;
do_addu (_SD, rDest, LongSignedImmediate, vSource2);
-void::function::do_and:signed32 *rDest, signed32 source1, signed32 source2
+:function:::void:do_and:signed32 *rDest, signed32 source1, signed32 source2
unsigned32 result = source1 & source2;
TRACE_ALU3 (MY_INDEX, result, source1, source2);
*rDest = result;
// bbo[.a]
-instruction_address::function::do_bbo:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
+:function:::instruction_address:do_bbo:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
int jump_p;
address_word target = cia.ip + 4 * offset;
if (MASKED32 (source, bitnum, bitnum))
jump_p = 0;
TRACE_COND_BR(MY_INDEX, jump_p, bitnum, target);
return nia;
-const char *::function::str_A:int A
+:%s::::A:int A
if (A)
return ".a";
else
// bbz[.a]
-instruction_address::function::do_bbz:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
+:function:::instruction_address:do_bbz:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
int jump_p;
address_word target = cia.ip + 4 * offset;
if (!MASKED32 (source, bitnum, bitnum))
// bcnd[.a]
-instruction_address::function::do_bcnd:instruction_address nia, int Cond, unsigned32 source, int annul, unsigned32 offset
+:function:::instruction_address:do_bcnd:instruction_address nia, int Cond, unsigned32 source, int annul, unsigned32 offset
int condition;
int size = EXTRACTED32 (Cond, 31 - 27, 30 - 27);
int code = EXTRACTED32 (Cond, 29 - 27, 27 - 27);
// brcr
-sim_cia::function::do_brcr:instruction_address nia, int cr
+:function:::sim_cia:do_brcr:instruction_address nia, int cr
if (cr >= 0x4000 || !(CPU)->is_user_mode)
{
unsigned32 control = CR (cr);
// bsr[.a]
-instruction_address::function::do_bsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset
+:function:::instruction_address:do_bsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset
address_word target = cia.ip + 4 * offset;
nia = do_branch (_SD, annul, target, 1, rLink);
TRACE_UCOND_BR (MY_INDEX, target);
// cmnd
-void::function::do_cmnd:signed32 source
+:function:::void:do_cmnd:signed32 source
int Reset = EXTRACTED32 (source, 31, 31);
int Halt = EXTRACTED32 (source, 30, 30);
int Unhalt = EXTRACTED32 (source, 29, 29);
do_cmnd (_SD, LongUnsignedImmediate);
// cmp
-unsigned32::function::cmp_vals:signed32 s1, unsigned32 u1, signed32 s2, unsigned32 u2
+:function:::unsigned32:cmp_vals:signed32 s1, unsigned32 u1, signed32 s2, unsigned32 u2
unsigned32 field = 0;
if (s1 == s2) field |= 0x001;
if (s1 != s2) field |= 0x002;
if (u1 < u2) field |= 0x100;
if (u1 >= u2) field |= 0x200;
return field;
-void::function::do_cmp:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
+:function:::void:do_cmp:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
unsigned32 field = 0;
field |= cmp_vals (_SD, source1, source1, source2, source2) << 20;
field |= cmp_vals (_SD, (signed16)source1, (unsigned16)source1,
// dcache
-const char *::function::str_F:int F
+:%s::::F:int F
if (F)
return "f";
else
+Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * v850.igen: Add model filter field to records.
+
+Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com>
* sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
projects / external / binutils.git / commitdiff