src/test/ResizeTestHelper.hpp
src/test/SoftmaxTest.cpp
src/test/SoftmaxTestHelper.hpp
+ src/test/SpaceDepthTest.cpp
+ src/test/SpaceDepthTestHelper.hpp
src/test/SplitTest.cpp
src/test/SplitTestHelper.hpp
src/test/TestUtils.hpp
* CONV_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
+* DEPTH_TO_SPACE
+
* DEPTHWISE_CONV_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
* DEQUANTIZE
* SOFTMAX
+* SPACE_TO_DEPTH
+
* SPLIT
* SPLIT_V
#pragma once
-#include <armnn/utility/IgnoreUnused.hpp>
-
#include <tensorflow/lite/builtin_ops.h>
#include <tensorflow/lite/c/builtin_op_data.h>
#include <tensorflow/lite/c/common.h>
int nodeIndex,
int32_t operatorCode)
{
- armnn::IgnoreUnused(delegateData,
- tfLiteContext,
- tfLiteNode,
- nodeIndex,
- operatorCode);
+ TF_LITE_ENSURE_STATUS(ValidateNumInputs(tfLiteContext, tfLiteNode, 1, nodeIndex));
+ TF_LITE_ENSURE_STATUS(ValidateNumOutputs(tfLiteContext, tfLiteNode, 1, nodeIndex));
+
+ const TfLiteTensor* tfLiteTensors = tfLiteContext->tensors;
+ const TfLiteTensor& tfLiteInputTensor = tfLiteTensors[tfLiteNode->inputs->data[0]];
+ if (!IsValid(tfLiteContext, tfLiteInputTensor, operatorCode, nodeIndex))
+ {
+ return kTfLiteError;
+ }
+
+ const TfLiteTensor& tfLiteOutputTensor = tfLiteTensors[tfLiteNode->outputs->data[0]];
+ if (!IsValid(tfLiteContext, tfLiteOutputTensor, operatorCode, nodeIndex))
+ {
+ return kTfLiteError;
+ }
+
+ const armnn::TensorInfo& inputTensorInfo = GetTensorInfoForTfLiteTensor(tfLiteInputTensor);
+ const armnn::TensorInfo& outputTensorInfo = GetTensorInfoForTfLiteTensor(tfLiteOutputTensor);
+
+ armnn::SpaceToDepthDescriptor descriptor;
+ auto* params = reinterpret_cast<TfLiteSpaceToDepthParams*>(tfLiteNode->builtin_data);
+ descriptor.m_BlockSize = params->block_size;
+
+ bool isSupported = false;
+ auto validateFunc = [&](const armnn::TensorInfo& outInfo, bool& isSupported)
+ {
+ FORWARD_LAYER_SUPPORT_FUNC(__func__,
+ tfLiteContext,
+ IsSpaceToDepthSupported,
+ delegateData.m_Backends,
+ isSupported,
+ inputTensorInfo,
+ outInfo,
+ descriptor);
+ };
+
+ if (!delegateData.m_Network)
+ {
+ validateFunc(outputTensorInfo, isSupported);
+ return isSupported ? kTfLiteOk : kTfLiteError;
+ }
+
+ // Add a SpaceToDepth layer
+ armnn::IConnectableLayer* layer = delegateData.m_Network->AddSpaceToDepthLayer(descriptor);
+ ARMNN_ASSERT(layer != nullptr);
+
+ armnn::IOutputSlot& outputSlot = layer->GetOutputSlot(0);
+ outputSlot.SetTensorInfo(outputTensorInfo);
- return kTfLiteError;
+ // Connect
+ return Connect(layer, tfLiteNode, delegateData);
}
TfLiteStatus VisitDepthToSpaceOperator(DelegateData& delegateData,
int nodeIndex,
int32_t operatorCode)
{
- armnn::IgnoreUnused(delegateData,
- tfLiteContext,
- tfLiteNode,
- nodeIndex,
- operatorCode);
+ TF_LITE_ENSURE_STATUS(ValidateNumInputs(tfLiteContext, tfLiteNode, 1, nodeIndex));
+ TF_LITE_ENSURE_STATUS(ValidateNumOutputs(tfLiteContext, tfLiteNode, 1, nodeIndex));
+
+ const TfLiteTensor* tfLiteTensors = tfLiteContext->tensors;
+ const TfLiteTensor& tfLiteInputTensor = tfLiteTensors[tfLiteNode->inputs->data[0]];
+ if (!IsValid(tfLiteContext, tfLiteInputTensor, operatorCode, nodeIndex))
+ {
+ return kTfLiteError;
+ }
+
+ const TfLiteTensor& tfLiteOutputTensor = tfLiteTensors[tfLiteNode->outputs->data[0]];
+ if (!IsValid(tfLiteContext, tfLiteOutputTensor, operatorCode, nodeIndex))
+ {
+ return kTfLiteError;
+ }
+
+ const armnn::TensorInfo& inputTensorInfo = GetTensorInfoForTfLiteTensor(tfLiteInputTensor);
+ const armnn::TensorInfo& outputTensorInfo = GetTensorInfoForTfLiteTensor(tfLiteOutputTensor);
+
+ armnn::DepthToSpaceDescriptor descriptor;
+ auto* params = reinterpret_cast<TfLiteDepthToSpaceParams*>(tfLiteNode->builtin_data);
+ descriptor.m_BlockSize = params->block_size;
+
+ bool isSupported = false;
+ auto validateFunc = [&](const armnn::TensorInfo& outInfo, bool& isSupported)
+ {
+ FORWARD_LAYER_SUPPORT_FUNC(__func__,
+ tfLiteContext,
+ IsDepthToSpaceSupported,
+ delegateData.m_Backends,
+ isSupported,
+ inputTensorInfo,
+ outInfo,
+ descriptor);
+ };
+
+ if (!delegateData.m_Network)
+ {
+ validateFunc(outputTensorInfo, isSupported);
+ return isSupported ? kTfLiteOk : kTfLiteError;
+ }
+
+ // Add a DepthToSpace layer
+ armnn::IConnectableLayer* layer = delegateData.m_Network->AddDepthToSpaceLayer(descriptor);
+ ARMNN_ASSERT(layer != nullptr);
+
+ armnn::IOutputSlot& outputSlot = layer->GetOutputSlot(0);
+ outputSlot.SetTensorInfo(outputTensorInfo);
- return kTfLiteError;
+ // Connect
+ return Connect(layer, tfLiteNode, delegateData);
}
} // namespace armnnDelegate
--- /dev/null
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "SpaceDepthTestHelper.hpp"
+
+#include <armnn_delegate.hpp>
+
+#include <flatbuffers/flatbuffers.h>
+#include <tensorflow/lite/schema/schema_generated.h>
+
+#include <doctest/doctest.h>
+
+namespace armnnDelegate
+{
+
+void DepthToSpaceFp32Test(std::vector<armnn::BackendId>& backends, int blockSize)
+{
+ // Set input data
+ std::vector<int32_t> inputShape { 1, 2, 2, 4 };
+ std::vector<int32_t> outputShape { 1, 4, 4, 1 };
+
+ std::vector<float> inputValues = { 1.f, 2.f, 3.f, 4.f,
+ 5.f, 6.f, 7.f, 8.f,
+ 9.f, 10.f, 11.f, 12.f,
+ 13.f, 14.f, 15.f, 16.f };
+
+ std::vector<float> expectedOutputValues = { 1.f, 2.f, 5.f, 6.f,
+ 3.f, 4.f, 7.f, 8.f,
+ 9.f, 10.f, 13.f, 14.f,
+ 11.f, 12.f, 15.f, 16.f };
+
+ SpaceDepthTest<float>(tflite::BuiltinOperator_DEPTH_TO_SPACE,
+ ::tflite::TensorType_FLOAT32,
+ backends,
+ inputShape,
+ outputShape,
+ inputValues,
+ expectedOutputValues,
+ blockSize);
+}
+
+void DepthToSpaceUint8Test(std::vector<armnn::BackendId>& backends, int blockSize)
+{
+ // Set input data
+ std::vector<int32_t> inputShape { 2, 1, 1, 4 };
+ std::vector<int32_t> outputShape { 2, 2, 2, 1 };
+
+ std::vector<uint8_t> inputValues = { 1, 2, 3, 4,
+ 5, 6, 7, 8 };
+
+ std::vector<uint8_t> expectedOutputValues = { 1, 2, 3, 4,
+ 5, 6, 7, 8 };
+
+ SpaceDepthTest<uint8_t>(tflite::BuiltinOperator_DEPTH_TO_SPACE,
+ ::tflite::TensorType_UINT8,
+ backends,
+ inputShape,
+ outputShape,
+ inputValues,
+ expectedOutputValues,
+ blockSize);
+}
+
+void SpaceToDepthFp32Test(std::vector<armnn::BackendId>& backends, int blockSize)
+{
+ // Set input data
+ std::vector<int32_t> inputShape { 1, 2, 2, 2 };
+ std::vector<int32_t> outputShape { 1, 1, 1, 8 };
+
+ std::vector<float> inputValues = { 1.4f, 2.3f, 3.2f, 4.1f, 5.4f, 6.3f, 7.2f, 8.1f };
+ std::vector<float> expectedOutputValues = { 1.4f, 2.3f, 3.2f, 4.1f, 5.4f, 6.3f, 7.2f, 8.1f };
+
+ SpaceDepthTest<float>(tflite::BuiltinOperator_SPACE_TO_DEPTH,
+ ::tflite::TensorType_FLOAT32,
+ backends,
+ inputShape,
+ outputShape,
+ inputValues,
+ expectedOutputValues,
+ blockSize);
+}
+
+void SpaceToDepthUint8Test(std::vector<armnn::BackendId>& backends, int blockSize)
+{
+ // Set input data
+ std::vector<int32_t> inputShape { 1, 2, 2, 1 };
+ std::vector<int32_t> outputShape { 1, 1, 1, 4 };
+
+ std::vector<uint8_t> inputValues = { 1, 2, 3, 2 };
+ std::vector<uint8_t> expectedOutputValues = { 1, 2, 3, 2 };
+
+ SpaceDepthTest<uint8_t>(tflite::BuiltinOperator_SPACE_TO_DEPTH,
+ ::tflite::TensorType_UINT8,
+ backends,
+ inputShape,
+ outputShape,
+ inputValues,
+ expectedOutputValues,
+ blockSize);
+}
+
+TEST_SUITE("DepthToSpace_CpuRefTests")
+{
+
+TEST_CASE ("DepthToSpaceFp32Test_CpuRef_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+ DepthToSpaceFp32Test(backends, 2);
+}
+
+TEST_CASE ("DepthToSpaceUint8Test_CpuRef_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+ DepthToSpaceUint8Test(backends, 2);
+}
+
+} // TEST_SUITE("DepthToSpace_CpuRefTests")
+
+
+TEST_SUITE("DepthToSpace_CpuAccTests")
+{
+
+TEST_CASE ("DepthToSpaceFp32Test_CpuAcc_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
+ DepthToSpaceFp32Test(backends, 2);
+}
+
+TEST_CASE ("DepthToSpaceUint8Test_CpuAcc_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
+ DepthToSpaceUint8Test(backends, 2);
+}
+
+} // TEST_SUITE("DepthToSpace_CpuAccTests")
+
+TEST_SUITE("DepthToSpace_GpuAccTests")
+{
+
+TEST_CASE ("DepthToSpaceFp32Test_GpuAcc_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
+ DepthToSpaceFp32Test(backends, 2);
+}
+
+TEST_CASE ("DepthToSpaceUint8Test_GpuAcc_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
+ DepthToSpaceUint8Test(backends, 2);
+}
+
+} // TEST_SUITE("DepthToSpace_GpuAccTests")
+
+TEST_SUITE("SpaceToDepth_CpuRefTests")
+{
+
+TEST_CASE ("SpaceToDepthFp32Test_CpuRef_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+ SpaceToDepthFp32Test(backends, 2);
+}
+
+TEST_CASE ("SpaceToDepthUint8Test_CpuRef_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+ SpaceToDepthUint8Test(backends, 2);
+}
+
+} // TEST_SUITE("SpaceToDepth_CpuRefTests")
+
+TEST_SUITE("SpaceToDepth_CpuAccTests")
+{
+
+TEST_CASE ("SpaceToDepthFp32Test_CpuAcc_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
+ SpaceToDepthFp32Test(backends, 2);
+}
+
+TEST_CASE ("SpaceToDepthUint8Test_CpuAcc_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
+ SpaceToDepthUint8Test(backends, 2);
+}
+
+} // TEST_SUITE("SpaceToDepth_CpuAccTests")
+
+TEST_SUITE("SpaceToDepth_GpuAccTests")
+{
+
+TEST_CASE ("SpaceToDepthFp32Test_GpuAcc_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
+ SpaceToDepthFp32Test(backends, 2);
+}
+
+TEST_CASE ("SpaceToDepthUint8Test_GpuAcc_Test")
+{
+ std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
+ SpaceToDepthUint8Test(backends, 2);
+}
+
+} // TEST_SUITE("SpaceToDepth_GpuAccTests")
+
+} // namespace armnnDelegate
--- /dev/null
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include "TestUtils.hpp"
+
+#include <armnn_delegate.hpp>
+
+#include <flatbuffers/flatbuffers.h>
+#include <tensorflow/lite/interpreter.h>
+#include <tensorflow/lite/kernels/register.h>
+#include <tensorflow/lite/model.h>
+#include <tensorflow/lite/schema/schema_generated.h>
+#include <tensorflow/lite/version.h>
+
+#include <doctest/doctest.h>
+
+namespace
+{
+std::vector<char> CreateSpaceDepthTfLiteModel(tflite::BuiltinOperator spaceDepthOperatorCode,
+ tflite::TensorType tensorType,
+ const std::vector <int32_t>& inputTensorShape,
+ const std::vector <int32_t>& outputTensorShape,
+ int32_t blockSize)
+{
+ using namespace tflite;
+ flatbuffers::FlatBufferBuilder flatBufferBuilder;
+
+ auto quantizationParameters =
+ CreateQuantizationParameters(flatBufferBuilder,
+ 0,
+ 0,
+ flatBufferBuilder.CreateVector<float>({ 1.0f }),
+ flatBufferBuilder.CreateVector<int64_t>({ 0 }));
+
+ std::vector<flatbuffers::Offset<tflite::Buffer>> buffers;
+ buffers.push_back(CreateBuffer(flatBufferBuilder, flatBufferBuilder.CreateVector({})));
+
+ std::array<flatbuffers::Offset<Tensor>, 2> tensors;
+ tensors[0] = CreateTensor(flatBufferBuilder,
+ flatBufferBuilder.CreateVector<int32_t>(inputTensorShape.data(),
+ inputTensorShape.size()),
+ tensorType,
+ 0,
+ flatBufferBuilder.CreateString("input"),
+ quantizationParameters);
+ tensors[1] = CreateTensor(flatBufferBuilder,
+ flatBufferBuilder.CreateVector<int32_t>(outputTensorShape.data(),
+ outputTensorShape.size()),
+ tensorType,
+ 0,
+ flatBufferBuilder.CreateString("output"),
+ quantizationParameters);
+
+ const std::vector<int32_t> operatorInputs({0});
+ const std::vector<int32_t> operatorOutputs({1});
+
+ flatbuffers::Offset<Operator> spaceDepthOperator;
+ flatbuffers::Offset<flatbuffers::String> modelDescription;
+ flatbuffers::Offset<OperatorCode> operatorCode;
+
+ switch (spaceDepthOperatorCode)
+ {
+ case tflite::BuiltinOperator_SPACE_TO_DEPTH:
+ spaceDepthOperator =
+ CreateOperator(flatBufferBuilder,
+ 0,
+ flatBufferBuilder.CreateVector<int32_t>(operatorInputs.data(), operatorInputs.size()),
+ flatBufferBuilder.CreateVector<int32_t>(operatorOutputs.data(), operatorOutputs.size()),
+ BuiltinOptions_SpaceToDepthOptions,
+ CreateSpaceToDepthOptions(flatBufferBuilder, blockSize).Union());
+ modelDescription = flatBufferBuilder.CreateString("ArmnnDelegate: SPACE_TO_DEPTH Operator Model");
+ operatorCode = CreateOperatorCode(flatBufferBuilder,
+ tflite::BuiltinOperator_SPACE_TO_DEPTH);
+ break;
+ case tflite::BuiltinOperator_DEPTH_TO_SPACE:
+ spaceDepthOperator =
+ CreateOperator(flatBufferBuilder,
+ 0,
+ flatBufferBuilder.CreateVector<int32_t>(operatorInputs.data(), operatorInputs.size()),
+ flatBufferBuilder.CreateVector<int32_t>(operatorOutputs.data(), operatorOutputs.size()),
+ BuiltinOptions_DepthToSpaceOptions,
+ CreateDepthToSpaceOptions(flatBufferBuilder, blockSize).Union());
+ flatBufferBuilder.CreateString("ArmnnDelegate: DEPTH_TO_SPACE Operator Model");
+ operatorCode = CreateOperatorCode(flatBufferBuilder,
+ tflite::BuiltinOperator_DEPTH_TO_SPACE);
+ break;
+ default:
+ break;
+ }
+ const std::vector<int32_t> subgraphInputs({0});
+ const std::vector<int32_t> subgraphOutputs({1});
+ flatbuffers::Offset<SubGraph> subgraph =
+ CreateSubGraph(flatBufferBuilder,
+ flatBufferBuilder.CreateVector(tensors.data(), tensors.size()),
+ flatBufferBuilder.CreateVector<int32_t>(subgraphInputs.data(), subgraphInputs.size()),
+ flatBufferBuilder.CreateVector<int32_t>(subgraphOutputs.data(), subgraphOutputs.size()),
+ flatBufferBuilder.CreateVector(&spaceDepthOperator, 1));
+ flatbuffers::Offset<Model> flatbufferModel =
+ CreateModel(flatBufferBuilder,
+ TFLITE_SCHEMA_VERSION,
+ flatBufferBuilder.CreateVector(&operatorCode, 1),
+ flatBufferBuilder.CreateVector(&subgraph, 1),
+ modelDescription,
+ flatBufferBuilder.CreateVector(buffers.data(), buffers.size()));
+ flatBufferBuilder.Finish(flatbufferModel);
+ return std::vector<char>(flatBufferBuilder.GetBufferPointer(),
+ flatBufferBuilder.GetBufferPointer() + flatBufferBuilder.GetSize());
+}
+
+template <typename T>
+void SpaceDepthTest(tflite::BuiltinOperator spaceDepthOperatorCode,
+ tflite::TensorType tensorType,
+ std::vector<armnn::BackendId>& backends,
+ std::vector<int32_t>& inputShape,
+ std::vector<int32_t>& outputShape,
+ std::vector<T>& inputValues,
+ std::vector<T>& expectedOutputValues,
+ int32_t blockSize = 2)
+{
+ using namespace tflite;
+ std::vector<char> modelBuffer = CreateSpaceDepthTfLiteModel(spaceDepthOperatorCode,
+ tensorType,
+ inputShape,
+ outputShape,
+ blockSize);
+
+ const Model* tfLiteModel = GetModel(modelBuffer.data());
+ // Create TfLite Interpreters
+ std::unique_ptr<Interpreter> armnnDelegateInterpreter;
+ CHECK(InterpreterBuilder(tfLiteModel, ::tflite::ops::builtin::BuiltinOpResolver())
+ (&armnnDelegateInterpreter) == kTfLiteOk);
+ CHECK(armnnDelegateInterpreter != nullptr);
+ CHECK(armnnDelegateInterpreter->AllocateTensors() == kTfLiteOk);
+
+ std::unique_ptr<Interpreter> tfLiteInterpreter;
+ CHECK(InterpreterBuilder(tfLiteModel, ::tflite::ops::builtin::BuiltinOpResolver())
+ (&tfLiteInterpreter) == kTfLiteOk);
+ CHECK(tfLiteInterpreter != nullptr);
+ CHECK(tfLiteInterpreter->AllocateTensors() == kTfLiteOk);
+
+ // Create the ArmNN Delegate
+ armnnDelegate::DelegateOptions delegateOptions(backends);
+ std::unique_ptr<TfLiteDelegate, decltype(&armnnDelegate::TfLiteArmnnDelegateDelete)>
+ theArmnnDelegate(armnnDelegate::TfLiteArmnnDelegateCreate(delegateOptions),
+ armnnDelegate::TfLiteArmnnDelegateDelete);
+ CHECK(theArmnnDelegate != nullptr);
+ // Modify armnnDelegateInterpreter to use armnnDelegate
+ CHECK(armnnDelegateInterpreter->ModifyGraphWithDelegate(theArmnnDelegate.get()) == kTfLiteOk);
+
+ // Set input data
+ armnnDelegate::FillInput<T>(tfLiteInterpreter, 0, inputValues);
+ armnnDelegate::FillInput<T>(armnnDelegateInterpreter, 0, inputValues);
+
+ // Run EnqueWorkload
+ CHECK(tfLiteInterpreter->Invoke() == kTfLiteOk);
+ CHECK(armnnDelegateInterpreter->Invoke() == kTfLiteOk);
+
+ // Compare output data
+ armnnDelegate::CompareOutputData(tfLiteInterpreter, armnnDelegateInterpreter, outputShape, expectedOutputValues);
+}
+
+} // anonymous namespace
projects / platform / upstream / armnn.git / commitdiff