; MIPS32-NEXT: addu $1, $2, $25
; MIPS32-NEXT: lw $1, %got(y)($1)
; MIPS32-NEXT: addiu $2, $zero, -4
-; MIPS32-NEXT: and $3, $1, $2
+; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: andi $1, $1, 3
-; MIPS32-NEXT: sll $1, $1, 3
-; MIPS32-NEXT: ori $2, $zero, 255
-; MIPS32-NEXT: sllv $5, $2, $1
+; MIPS32-NEXT: sll $3, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $5, $1, $3
; MIPS32-NEXT: nor $6, $zero, $5
-; MIPS32-NEXT: sllv $4, $4, $1
+; MIPS32-NEXT: sllv $4, $4, $3
; MIPS32-NEXT: $BB8_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32-NEXT: ll $7, 0($3)
+; MIPS32-NEXT: ll $7, 0($2)
; MIPS32-NEXT: addu $8, $7, $4
; MIPS32-NEXT: and $8, $8, $5
; MIPS32-NEXT: and $9, $7, $6
; MIPS32-NEXT: or $9, $9, $8
-; MIPS32-NEXT: sc $9, 0($3)
+; MIPS32-NEXT: sc $9, 0($2)
; MIPS32-NEXT: beqz $9, $BB8_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $2, $7, $5
-; MIPS32-NEXT: srlv $2, $2, $1
-; MIPS32-NEXT: sll $2, $2, 24
-; MIPS32-NEXT: sra $2, $2, 24
+; MIPS32-NEXT: and $1, $7, $5
+; MIPS32-NEXT: srlv $1, $1, $3
+; MIPS32-NEXT: sll $1, $1, 24
+; MIPS32-NEXT: sra $1, $1, 24
; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sll $1, $1, 24
; MIPS32-NEXT: jr $ra
-; MIPS32-NEXT: nop
+; MIPS32-NEXT: sra $2, $1, 24
;
; MIPS32O0-LABEL: AtomicLoadAdd8:
; MIPS32O0: # %bb.0: # %entry
; MIPS32R2-NEXT: addu $1, $2, $25
; MIPS32R2-NEXT: lw $1, %got(y)($1)
; MIPS32R2-NEXT: addiu $2, $zero, -4
-; MIPS32R2-NEXT: and $3, $1, $2
+; MIPS32R2-NEXT: and $2, $1, $2
; MIPS32R2-NEXT: andi $1, $1, 3
-; MIPS32R2-NEXT: sll $1, $1, 3
-; MIPS32R2-NEXT: ori $2, $zero, 255
-; MIPS32R2-NEXT: sllv $5, $2, $1
+; MIPS32R2-NEXT: sll $3, $1, 3
+; MIPS32R2-NEXT: ori $1, $zero, 255
+; MIPS32R2-NEXT: sllv $5, $1, $3
; MIPS32R2-NEXT: nor $6, $zero, $5
-; MIPS32R2-NEXT: sllv $4, $4, $1
+; MIPS32R2-NEXT: sllv $4, $4, $3
; MIPS32R2-NEXT: $BB8_1: # %entry
; MIPS32R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R2-NEXT: ll $7, 0($3)
+; MIPS32R2-NEXT: ll $7, 0($2)
; MIPS32R2-NEXT: addu $8, $7, $4
; MIPS32R2-NEXT: and $8, $8, $5
; MIPS32R2-NEXT: and $9, $7, $6
; MIPS32R2-NEXT: or $9, $9, $8
-; MIPS32R2-NEXT: sc $9, 0($3)
+; MIPS32R2-NEXT: sc $9, 0($2)
; MIPS32R2-NEXT: beqz $9, $BB8_1
; MIPS32R2-NEXT: nop
; MIPS32R2-NEXT: # %bb.2: # %entry
-; MIPS32R2-NEXT: and $2, $7, $5
-; MIPS32R2-NEXT: srlv $2, $2, $1
-; MIPS32R2-NEXT: seb $2, $2
+; MIPS32R2-NEXT: and $1, $7, $5
+; MIPS32R2-NEXT: srlv $1, $1, $3
+; MIPS32R2-NEXT: seb $1, $1
; MIPS32R2-NEXT: # %bb.3: # %entry
; MIPS32R2-NEXT: jr $ra
-; MIPS32R2-NEXT: nop
+; MIPS32R2-NEXT: seb $2, $1
;
; MIPS32R6-LABEL: AtomicLoadAdd8:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: addu $1, $2, $25
; MIPS32R6-NEXT: lw $1, %got(y)($1)
; MIPS32R6-NEXT: addiu $2, $zero, -4
-; MIPS32R6-NEXT: and $3, $1, $2
+; MIPS32R6-NEXT: and $2, $1, $2
; MIPS32R6-NEXT: andi $1, $1, 3
-; MIPS32R6-NEXT: sll $1, $1, 3
-; MIPS32R6-NEXT: ori $2, $zero, 255
-; MIPS32R6-NEXT: sllv $5, $2, $1
+; MIPS32R6-NEXT: sll $3, $1, 3
+; MIPS32R6-NEXT: ori $1, $zero, 255
+; MIPS32R6-NEXT: sllv $5, $1, $3
; MIPS32R6-NEXT: nor $6, $zero, $5
-; MIPS32R6-NEXT: sllv $4, $4, $1
+; MIPS32R6-NEXT: sllv $4, $4, $3
; MIPS32R6-NEXT: $BB8_1: # %entry
; MIPS32R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R6-NEXT: ll $7, 0($3)
+; MIPS32R6-NEXT: ll $7, 0($2)
; MIPS32R6-NEXT: addu $8, $7, $4
; MIPS32R6-NEXT: and $8, $8, $5
; MIPS32R6-NEXT: and $9, $7, $6
; MIPS32R6-NEXT: or $9, $9, $8
-; MIPS32R6-NEXT: sc $9, 0($3)
+; MIPS32R6-NEXT: sc $9, 0($2)
; MIPS32R6-NEXT: beqzc $9, $BB8_1
; MIPS32R6-NEXT: # %bb.2: # %entry
-; MIPS32R6-NEXT: and $2, $7, $5
-; MIPS32R6-NEXT: srlv $2, $2, $1
-; MIPS32R6-NEXT: seb $2, $2
+; MIPS32R6-NEXT: and $1, $7, $5
+; MIPS32R6-NEXT: srlv $1, $1, $3
+; MIPS32R6-NEXT: seb $1, $1
; MIPS32R6-NEXT: # %bb.3: # %entry
-; MIPS32R6-NEXT: jrc $ra
+; MIPS32R6-NEXT: jr $ra
+; MIPS32R6-NEXT: seb $2, $1
;
; MIPS32R6O0-LABEL: AtomicLoadAdd8:
; MIPS32R6O0: # %bb.0: # %entry
; MIPS32R6O0-NEXT: # %bb.3: # %entry
; MIPS32R6O0-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32R6O0-NEXT: # %bb.4: # %entry
-; MIPS32R6O0-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: lw $1, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: seb $2, $1
; MIPS32R6O0-NEXT: addiu $sp, $sp, 8
; MIPS32R6O0-NEXT: jrc $ra
;
; MIPS4-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd8)))
; MIPS4-NEXT: ld $1, %got_disp(y)($1)
; MIPS4-NEXT: daddiu $2, $zero, -4
-; MIPS4-NEXT: and $3, $1, $2
+; MIPS4-NEXT: and $2, $1, $2
; MIPS4-NEXT: andi $1, $1, 3
-; MIPS4-NEXT: sll $1, $1, 3
-; MIPS4-NEXT: ori $2, $zero, 255
-; MIPS4-NEXT: sllv $5, $2, $1
+; MIPS4-NEXT: sll $3, $1, 3
+; MIPS4-NEXT: ori $1, $zero, 255
+; MIPS4-NEXT: sllv $5, $1, $3
; MIPS4-NEXT: nor $6, $zero, $5
-; MIPS4-NEXT: sllv $4, $4, $1
+; MIPS4-NEXT: sllv $4, $4, $3
; MIPS4-NEXT: .LBB8_1: # %entry
; MIPS4-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS4-NEXT: ll $7, 0($3)
+; MIPS4-NEXT: ll $7, 0($2)
; MIPS4-NEXT: addu $8, $7, $4
; MIPS4-NEXT: and $8, $8, $5
; MIPS4-NEXT: and $9, $7, $6
; MIPS4-NEXT: or $9, $9, $8
-; MIPS4-NEXT: sc $9, 0($3)
+; MIPS4-NEXT: sc $9, 0($2)
; MIPS4-NEXT: beqz $9, .LBB8_1
; MIPS4-NEXT: nop
; MIPS4-NEXT: # %bb.2: # %entry
-; MIPS4-NEXT: and $2, $7, $5
-; MIPS4-NEXT: srlv $2, $2, $1
-; MIPS4-NEXT: sll $2, $2, 24
-; MIPS4-NEXT: sra $2, $2, 24
+; MIPS4-NEXT: and $1, $7, $5
+; MIPS4-NEXT: srlv $1, $1, $3
+; MIPS4-NEXT: sll $1, $1, 24
+; MIPS4-NEXT: sra $1, $1, 24
; MIPS4-NEXT: # %bb.3: # %entry
+; MIPS4-NEXT: sll $1, $1, 24
; MIPS4-NEXT: jr $ra
-; MIPS4-NEXT: nop
+; MIPS4-NEXT: sra $2, $1, 24
;
; MIPS64-LABEL: AtomicLoadAdd8:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd8)))
; MIPS64-NEXT: ld $1, %got_disp(y)($1)
; MIPS64-NEXT: daddiu $2, $zero, -4
-; MIPS64-NEXT: and $3, $1, $2
+; MIPS64-NEXT: and $2, $1, $2
; MIPS64-NEXT: andi $1, $1, 3
-; MIPS64-NEXT: sll $1, $1, 3
-; MIPS64-NEXT: ori $2, $zero, 255
-; MIPS64-NEXT: sllv $5, $2, $1
+; MIPS64-NEXT: sll $3, $1, 3
+; MIPS64-NEXT: ori $1, $zero, 255
+; MIPS64-NEXT: sllv $5, $1, $3
; MIPS64-NEXT: nor $6, $zero, $5
-; MIPS64-NEXT: sllv $4, $4, $1
+; MIPS64-NEXT: sllv $4, $4, $3
; MIPS64-NEXT: .LBB8_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64-NEXT: ll $7, 0($3)
+; MIPS64-NEXT: ll $7, 0($2)
; MIPS64-NEXT: addu $8, $7, $4
; MIPS64-NEXT: and $8, $8, $5
; MIPS64-NEXT: and $9, $7, $6
; MIPS64-NEXT: or $9, $9, $8
-; MIPS64-NEXT: sc $9, 0($3)
+; MIPS64-NEXT: sc $9, 0($2)
; MIPS64-NEXT: beqz $9, .LBB8_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $2, $7, $5
-; MIPS64-NEXT: srlv $2, $2, $1
-; MIPS64-NEXT: sll $2, $2, 24
-; MIPS64-NEXT: sra $2, $2, 24
+; MIPS64-NEXT: and $1, $7, $5
+; MIPS64-NEXT: srlv $1, $1, $3
+; MIPS64-NEXT: sll $1, $1, 24
+; MIPS64-NEXT: sra $1, $1, 24
; MIPS64-NEXT: # %bb.3: # %entry
+; MIPS64-NEXT: sll $1, $1, 24
; MIPS64-NEXT: jr $ra
-; MIPS64-NEXT: nop
+; MIPS64-NEXT: sra $2, $1, 24
;
; MIPS64R2-LABEL: AtomicLoadAdd8:
; MIPS64R2: # %bb.0: # %entry
; MIPS64R2-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd8)))
; MIPS64R2-NEXT: ld $1, %got_disp(y)($1)
; MIPS64R2-NEXT: daddiu $2, $zero, -4
-; MIPS64R2-NEXT: and $3, $1, $2
+; MIPS64R2-NEXT: and $2, $1, $2
; MIPS64R2-NEXT: andi $1, $1, 3
-; MIPS64R2-NEXT: sll $1, $1, 3
-; MIPS64R2-NEXT: ori $2, $zero, 255
-; MIPS64R2-NEXT: sllv $5, $2, $1
+; MIPS64R2-NEXT: sll $3, $1, 3
+; MIPS64R2-NEXT: ori $1, $zero, 255
+; MIPS64R2-NEXT: sllv $5, $1, $3
; MIPS64R2-NEXT: nor $6, $zero, $5
-; MIPS64R2-NEXT: sllv $4, $4, $1
+; MIPS64R2-NEXT: sllv $4, $4, $3
; MIPS64R2-NEXT: .LBB8_1: # %entry
; MIPS64R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R2-NEXT: ll $7, 0($3)
+; MIPS64R2-NEXT: ll $7, 0($2)
; MIPS64R2-NEXT: addu $8, $7, $4
; MIPS64R2-NEXT: and $8, $8, $5
; MIPS64R2-NEXT: and $9, $7, $6
; MIPS64R2-NEXT: or $9, $9, $8
-; MIPS64R2-NEXT: sc $9, 0($3)
+; MIPS64R2-NEXT: sc $9, 0($2)
; MIPS64R2-NEXT: beqz $9, .LBB8_1
; MIPS64R2-NEXT: nop
; MIPS64R2-NEXT: # %bb.2: # %entry
-; MIPS64R2-NEXT: and $2, $7, $5
-; MIPS64R2-NEXT: srlv $2, $2, $1
-; MIPS64R2-NEXT: seb $2, $2
+; MIPS64R2-NEXT: and $1, $7, $5
+; MIPS64R2-NEXT: srlv $1, $1, $3
+; MIPS64R2-NEXT: seb $1, $1
; MIPS64R2-NEXT: # %bb.3: # %entry
; MIPS64R2-NEXT: jr $ra
-; MIPS64R2-NEXT: nop
+; MIPS64R2-NEXT: seb $2, $1
;
; MIPS64R6-LABEL: AtomicLoadAdd8:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd8)))
; MIPS64R6-NEXT: ld $1, %got_disp(y)($1)
; MIPS64R6-NEXT: daddiu $2, $zero, -4
-; MIPS64R6-NEXT: and $3, $1, $2
+; MIPS64R6-NEXT: and $2, $1, $2
; MIPS64R6-NEXT: andi $1, $1, 3
-; MIPS64R6-NEXT: sll $1, $1, 3
-; MIPS64R6-NEXT: ori $2, $zero, 255
-; MIPS64R6-NEXT: sllv $5, $2, $1
+; MIPS64R6-NEXT: sll $3, $1, 3
+; MIPS64R6-NEXT: ori $1, $zero, 255
+; MIPS64R6-NEXT: sllv $5, $1, $3
; MIPS64R6-NEXT: nor $6, $zero, $5
-; MIPS64R6-NEXT: sllv $4, $4, $1
+; MIPS64R6-NEXT: sllv $4, $4, $3
; MIPS64R6-NEXT: .LBB8_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R6-NEXT: ll $7, 0($3)
+; MIPS64R6-NEXT: ll $7, 0($2)
; MIPS64R6-NEXT: addu $8, $7, $4
; MIPS64R6-NEXT: and $8, $8, $5
; MIPS64R6-NEXT: and $9, $7, $6
; MIPS64R6-NEXT: or $9, $9, $8
-; MIPS64R6-NEXT: sc $9, 0($3)
+; MIPS64R6-NEXT: sc $9, 0($2)
; MIPS64R6-NEXT: beqzc $9, .LBB8_1
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $2, $7, $5
-; MIPS64R6-NEXT: srlv $2, $2, $1
-; MIPS64R6-NEXT: seb $2, $2
+; MIPS64R6-NEXT: and $1, $7, $5
+; MIPS64R6-NEXT: srlv $1, $1, $3
+; MIPS64R6-NEXT: seb $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
-; MIPS64R6-NEXT: jrc $ra
+; MIPS64R6-NEXT: jr $ra
+; MIPS64R6-NEXT: seb $2, $1
;
; MIPS64R6O0-LABEL: AtomicLoadAdd8:
; MIPS64R6O0: # %bb.0: # %entry
; MIPS64R6O0-NEXT: # %bb.3: # %entry
; MIPS64R6O0-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6O0-NEXT: # %bb.4: # %entry
-; MIPS64R6O0-NEXT: lw $2, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: seb $2, $1
; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16
; MIPS64R6O0-NEXT: jrc $ra
;
; MM32-NEXT: addu $2, $2, $25
; MM32-NEXT: lw $1, %got(y)($2)
; MM32-NEXT: addiu $2, $zero, -4
-; MM32-NEXT: and $3, $1, $2
+; MM32-NEXT: and $2, $1, $2
; MM32-NEXT: andi $1, $1, 3
-; MM32-NEXT: sll $1, $1, 3
-; MM32-NEXT: ori $2, $zero, 255
-; MM32-NEXT: sllv $5, $2, $1
+; MM32-NEXT: sll $3, $1, 3
+; MM32-NEXT: ori $1, $zero, 255
+; MM32-NEXT: sllv $5, $1, $3
; MM32-NEXT: nor $6, $zero, $5
-; MM32-NEXT: sllv $4, $4, $1
+; MM32-NEXT: sllv $4, $4, $3
; MM32-NEXT: $BB8_1: # %entry
; MM32-NEXT: # =>This Inner Loop Header: Depth=1
-; MM32-NEXT: ll $7, 0($3)
+; MM32-NEXT: ll $7, 0($2)
; MM32-NEXT: addu $8, $7, $4
; MM32-NEXT: and $8, $8, $5
; MM32-NEXT: and $9, $7, $6
; MM32-NEXT: or $9, $9, $8
-; MM32-NEXT: sc $9, 0($3)
+; MM32-NEXT: sc $9, 0($2)
; MM32-NEXT: beqzc $9, $BB8_1
; MM32-NEXT: # %bb.2: # %entry
-; MM32-NEXT: and $2, $7, $5
-; MM32-NEXT: srlv $2, $2, $1
-; MM32-NEXT: seb $2, $2
+; MM32-NEXT: and $1, $7, $5
+; MM32-NEXT: srlv $1, $1, $3
+; MM32-NEXT: seb $1, $1
; MM32-NEXT: # %bb.3: # %entry
-; MM32-NEXT: jrc $ra
+; MM32-NEXT: jr $ra
+; MM32-NEXT: seb $2, $1
;
; O1-LABEL: AtomicLoadAdd8:
; O1: # %bb.0: # %entry
; O1-NEXT: addu $1, $2, $25
; O1-NEXT: lw $1, %got(y)($1)
; O1-NEXT: addiu $2, $zero, -4
-; O1-NEXT: and $3, $1, $2
+; O1-NEXT: and $2, $1, $2
; O1-NEXT: andi $1, $1, 3
-; O1-NEXT: sll $1, $1, 3
-; O1-NEXT: ori $2, $zero, 255
-; O1-NEXT: sllv $5, $2, $1
+; O1-NEXT: sll $3, $1, 3
+; O1-NEXT: ori $1, $zero, 255
+; O1-NEXT: sllv $5, $1, $3
; O1-NEXT: nor $6, $zero, $5
-; O1-NEXT: sllv $4, $4, $1
+; O1-NEXT: sllv $4, $4, $3
; O1-NEXT: $BB8_1: # %entry
; O1-NEXT: # =>This Inner Loop Header: Depth=1
-; O1-NEXT: ll $7, 0($3)
+; O1-NEXT: ll $7, 0($2)
; O1-NEXT: addu $8, $7, $4
; O1-NEXT: and $8, $8, $5
; O1-NEXT: and $9, $7, $6
; O1-NEXT: or $9, $9, $8
-; O1-NEXT: sc $9, 0($3)
+; O1-NEXT: sc $9, 0($2)
; O1-NEXT: beqz $9, $BB8_1
; O1-NEXT: nop
; O1-NEXT: # %bb.2: # %entry
-; O1-NEXT: and $2, $7, $5
-; O1-NEXT: srlv $2, $2, $1
-; O1-NEXT: sll $2, $2, 24
-; O1-NEXT: sra $2, $2, 24
+; O1-NEXT: and $1, $7, $5
+; O1-NEXT: srlv $1, $1, $3
+; O1-NEXT: sll $1, $1, 24
+; O1-NEXT: sra $1, $1, 24
; O1-NEXT: # %bb.3: # %entry
+; O1-NEXT: sll $1, $1, 24
; O1-NEXT: jr $ra
-; O1-NEXT: nop
+; O1-NEXT: sra $2, $1, 24
;
; O2-LABEL: AtomicLoadAdd8:
; O2: # %bb.0: # %entry
; O2-NEXT: addu $1, $2, $25
; O2-NEXT: lw $1, %got(y)($1)
; O2-NEXT: addiu $2, $zero, -4
-; O2-NEXT: and $3, $1, $2
+; O2-NEXT: and $2, $1, $2
; O2-NEXT: andi $1, $1, 3
-; O2-NEXT: sll $1, $1, 3
-; O2-NEXT: ori $2, $zero, 255
-; O2-NEXT: sllv $5, $2, $1
+; O2-NEXT: sll $3, $1, 3
+; O2-NEXT: ori $1, $zero, 255
+; O2-NEXT: sllv $5, $1, $3
; O2-NEXT: nor $6, $zero, $5
-; O2-NEXT: sllv $4, $4, $1
+; O2-NEXT: sllv $4, $4, $3
; O2-NEXT: $BB8_1: # %entry
; O2-NEXT: # =>This Inner Loop Header: Depth=1
-; O2-NEXT: ll $7, 0($3)
+; O2-NEXT: ll $7, 0($2)
; O2-NEXT: addu $8, $7, $4
; O2-NEXT: and $8, $8, $5
; O2-NEXT: and $9, $7, $6
; O2-NEXT: or $9, $9, $8
-; O2-NEXT: sc $9, 0($3)
+; O2-NEXT: sc $9, 0($2)
; O2-NEXT: beqz $9, $BB8_1
; O2-NEXT: nop
; O2-NEXT: # %bb.2: # %entry
-; O2-NEXT: and $2, $7, $5
-; O2-NEXT: srlv $2, $2, $1
-; O2-NEXT: sll $2, $2, 24
-; O2-NEXT: sra $2, $2, 24
+; O2-NEXT: and $1, $7, $5
+; O2-NEXT: srlv $1, $1, $3
+; O2-NEXT: sll $1, $1, 24
+; O2-NEXT: sra $1, $1, 24
; O2-NEXT: # %bb.3: # %entry
+; O2-NEXT: sll $1, $1, 24
; O2-NEXT: jr $ra
-; O2-NEXT: nop
+; O2-NEXT: sra $2, $1, 24
;
; O3-LABEL: AtomicLoadAdd8:
; O3: # %bb.0: # %entry
; O3-NEXT: addu $1, $2, $25
; O3-NEXT: addiu $2, $zero, -4
; O3-NEXT: lw $1, %got(y)($1)
-; O3-NEXT: and $3, $1, $2
+; O3-NEXT: and $2, $1, $2
; O3-NEXT: andi $1, $1, 3
-; O3-NEXT: ori $2, $zero, 255
-; O3-NEXT: sll $1, $1, 3
-; O3-NEXT: sllv $5, $2, $1
-; O3-NEXT: sllv $4, $4, $1
+; O3-NEXT: sll $3, $1, 3
+; O3-NEXT: ori $1, $zero, 255
+; O3-NEXT: sllv $5, $1, $3
+; O3-NEXT: sllv $4, $4, $3
; O3-NEXT: nor $6, $zero, $5
; O3-NEXT: $BB8_1: # %entry
; O3-NEXT: # =>This Inner Loop Header: Depth=1
-; O3-NEXT: ll $7, 0($3)
+; O3-NEXT: ll $7, 0($2)
; O3-NEXT: addu $8, $7, $4
; O3-NEXT: and $8, $8, $5
; O3-NEXT: and $9, $7, $6
; O3-NEXT: or $9, $9, $8
-; O3-NEXT: sc $9, 0($3)
+; O3-NEXT: sc $9, 0($2)
; O3-NEXT: beqz $9, $BB8_1
; O3-NEXT: nop
; O3-NEXT: # %bb.2: # %entry
-; O3-NEXT: and $2, $7, $5
-; O3-NEXT: srlv $2, $2, $1
-; O3-NEXT: sll $2, $2, 24
-; O3-NEXT: sra $2, $2, 24
+; O3-NEXT: and $1, $7, $5
+; O3-NEXT: srlv $1, $1, $3
+; O3-NEXT: sll $1, $1, 24
+; O3-NEXT: sra $1, $1, 24
; O3-NEXT: # %bb.3: # %entry
+; O3-NEXT: sll $1, $1, 24
; O3-NEXT: jr $ra
-; O3-NEXT: nop
+; O3-NEXT: sra $2, $1, 24
;
; MIPS32EB-LABEL: AtomicLoadAdd8:
; MIPS32EB: # %bb.0: # %entry
; MIPS32EB-NEXT: addu $1, $2, $25
; MIPS32EB-NEXT: lw $1, %got(y)($1)
; MIPS32EB-NEXT: addiu $2, $zero, -4
-; MIPS32EB-NEXT: and $3, $1, $2
+; MIPS32EB-NEXT: and $2, $1, $2
; MIPS32EB-NEXT: andi $1, $1, 3
; MIPS32EB-NEXT: xori $1, $1, 3
-; MIPS32EB-NEXT: sll $1, $1, 3
-; MIPS32EB-NEXT: ori $2, $zero, 255
-; MIPS32EB-NEXT: sllv $5, $2, $1
+; MIPS32EB-NEXT: sll $3, $1, 3
+; MIPS32EB-NEXT: ori $1, $zero, 255
+; MIPS32EB-NEXT: sllv $5, $1, $3
; MIPS32EB-NEXT: nor $6, $zero, $5
-; MIPS32EB-NEXT: sllv $4, $4, $1
+; MIPS32EB-NEXT: sllv $4, $4, $3
; MIPS32EB-NEXT: $BB8_1: # %entry
; MIPS32EB-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32EB-NEXT: ll $7, 0($3)
+; MIPS32EB-NEXT: ll $7, 0($2)
; MIPS32EB-NEXT: addu $8, $7, $4
; MIPS32EB-NEXT: and $8, $8, $5
; MIPS32EB-NEXT: and $9, $7, $6
; MIPS32EB-NEXT: or $9, $9, $8
-; MIPS32EB-NEXT: sc $9, 0($3)
+; MIPS32EB-NEXT: sc $9, 0($2)
; MIPS32EB-NEXT: beqz $9, $BB8_1
; MIPS32EB-NEXT: nop
; MIPS32EB-NEXT: # %bb.2: # %entry
-; MIPS32EB-NEXT: and $2, $7, $5
-; MIPS32EB-NEXT: srlv $2, $2, $1
-; MIPS32EB-NEXT: sll $2, $2, 24
-; MIPS32EB-NEXT: sra $2, $2, 24
+; MIPS32EB-NEXT: and $1, $7, $5
+; MIPS32EB-NEXT: srlv $1, $1, $3
+; MIPS32EB-NEXT: sll $1, $1, 24
+; MIPS32EB-NEXT: sra $1, $1, 24
; MIPS32EB-NEXT: # %bb.3: # %entry
+; MIPS32EB-NEXT: sll $1, $1, 24
; MIPS32EB-NEXT: jr $ra
-; MIPS32EB-NEXT: nop
+; MIPS32EB-NEXT: sra $2, $1, 24
entry:
%0 = atomicrmw add i8* @y, i8 %incr monotonic
ret i8 %0
; MIPS32-NEXT: addu $1, $2, $25
; MIPS32-NEXT: lw $1, %got(y)($1)
; MIPS32-NEXT: addiu $2, $zero, -4
-; MIPS32-NEXT: and $3, $1, $2
+; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: andi $1, $1, 3
-; MIPS32-NEXT: sll $1, $1, 3
-; MIPS32-NEXT: ori $2, $zero, 255
-; MIPS32-NEXT: sllv $5, $2, $1
+; MIPS32-NEXT: sll $3, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $5, $1, $3
; MIPS32-NEXT: nor $6, $zero, $5
-; MIPS32-NEXT: sllv $4, $4, $1
+; MIPS32-NEXT: sllv $4, $4, $3
; MIPS32-NEXT: $BB9_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32-NEXT: ll $7, 0($3)
+; MIPS32-NEXT: ll $7, 0($2)
; MIPS32-NEXT: subu $8, $7, $4
; MIPS32-NEXT: and $8, $8, $5
; MIPS32-NEXT: and $9, $7, $6
; MIPS32-NEXT: or $9, $9, $8
-; MIPS32-NEXT: sc $9, 0($3)
+; MIPS32-NEXT: sc $9, 0($2)
; MIPS32-NEXT: beqz $9, $BB9_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $2, $7, $5
-; MIPS32-NEXT: srlv $2, $2, $1
-; MIPS32-NEXT: sll $2, $2, 24
-; MIPS32-NEXT: sra $2, $2, 24
+; MIPS32-NEXT: and $1, $7, $5
+; MIPS32-NEXT: srlv $1, $1, $3
+; MIPS32-NEXT: sll $1, $1, 24
+; MIPS32-NEXT: sra $1, $1, 24
; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sll $1, $1, 24
; MIPS32-NEXT: jr $ra
-; MIPS32-NEXT: nop
+; MIPS32-NEXT: sra $2, $1, 24
;
; MIPS32O0-LABEL: AtomicLoadSub8:
; MIPS32O0: # %bb.0: # %entry
; MIPS32R2-NEXT: addu $1, $2, $25
; MIPS32R2-NEXT: lw $1, %got(y)($1)
; MIPS32R2-NEXT: addiu $2, $zero, -4
-; MIPS32R2-NEXT: and $3, $1, $2
+; MIPS32R2-NEXT: and $2, $1, $2
; MIPS32R2-NEXT: andi $1, $1, 3
-; MIPS32R2-NEXT: sll $1, $1, 3
-; MIPS32R2-NEXT: ori $2, $zero, 255
-; MIPS32R2-NEXT: sllv $5, $2, $1
+; MIPS32R2-NEXT: sll $3, $1, 3
+; MIPS32R2-NEXT: ori $1, $zero, 255
+; MIPS32R2-NEXT: sllv $5, $1, $3
; MIPS32R2-NEXT: nor $6, $zero, $5
-; MIPS32R2-NEXT: sllv $4, $4, $1
+; MIPS32R2-NEXT: sllv $4, $4, $3
; MIPS32R2-NEXT: $BB9_1: # %entry
; MIPS32R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R2-NEXT: ll $7, 0($3)
+; MIPS32R2-NEXT: ll $7, 0($2)
; MIPS32R2-NEXT: subu $8, $7, $4
; MIPS32R2-NEXT: and $8, $8, $5
; MIPS32R2-NEXT: and $9, $7, $6
; MIPS32R2-NEXT: or $9, $9, $8
-; MIPS32R2-NEXT: sc $9, 0($3)
+; MIPS32R2-NEXT: sc $9, 0($2)
; MIPS32R2-NEXT: beqz $9, $BB9_1
; MIPS32R2-NEXT: nop
; MIPS32R2-NEXT: # %bb.2: # %entry
-; MIPS32R2-NEXT: and $2, $7, $5
-; MIPS32R2-NEXT: srlv $2, $2, $1
-; MIPS32R2-NEXT: seb $2, $2
+; MIPS32R2-NEXT: and $1, $7, $5
+; MIPS32R2-NEXT: srlv $1, $1, $3
+; MIPS32R2-NEXT: seb $1, $1
; MIPS32R2-NEXT: # %bb.3: # %entry
; MIPS32R2-NEXT: jr $ra
-; MIPS32R2-NEXT: nop
+; MIPS32R2-NEXT: seb $2, $1
;
; MIPS32R6-LABEL: AtomicLoadSub8:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: addu $1, $2, $25
; MIPS32R6-NEXT: lw $1, %got(y)($1)
; MIPS32R6-NEXT: addiu $2, $zero, -4
-; MIPS32R6-NEXT: and $3, $1, $2
+; MIPS32R6-NEXT: and $2, $1, $2
; MIPS32R6-NEXT: andi $1, $1, 3
-; MIPS32R6-NEXT: sll $1, $1, 3
-; MIPS32R6-NEXT: ori $2, $zero, 255
-; MIPS32R6-NEXT: sllv $5, $2, $1
+; MIPS32R6-NEXT: sll $3, $1, 3
+; MIPS32R6-NEXT: ori $1, $zero, 255
+; MIPS32R6-NEXT: sllv $5, $1, $3
; MIPS32R6-NEXT: nor $6, $zero, $5
-; MIPS32R6-NEXT: sllv $4, $4, $1
+; MIPS32R6-NEXT: sllv $4, $4, $3
; MIPS32R6-NEXT: $BB9_1: # %entry
; MIPS32R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R6-NEXT: ll $7, 0($3)
+; MIPS32R6-NEXT: ll $7, 0($2)
; MIPS32R6-NEXT: subu $8, $7, $4
; MIPS32R6-NEXT: and $8, $8, $5
; MIPS32R6-NEXT: and $9, $7, $6
; MIPS32R6-NEXT: or $9, $9, $8
-; MIPS32R6-NEXT: sc $9, 0($3)
+; MIPS32R6-NEXT: sc $9, 0($2)
; MIPS32R6-NEXT: beqzc $9, $BB9_1
; MIPS32R6-NEXT: # %bb.2: # %entry
-; MIPS32R6-NEXT: and $2, $7, $5
-; MIPS32R6-NEXT: srlv $2, $2, $1
-; MIPS32R6-NEXT: seb $2, $2
+; MIPS32R6-NEXT: and $1, $7, $5
+; MIPS32R6-NEXT: srlv $1, $1, $3
+; MIPS32R6-NEXT: seb $1, $1
; MIPS32R6-NEXT: # %bb.3: # %entry
-; MIPS32R6-NEXT: jrc $ra
+; MIPS32R6-NEXT: jr $ra
+; MIPS32R6-NEXT: seb $2, $1
;
; MIPS32R6O0-LABEL: AtomicLoadSub8:
; MIPS32R6O0: # %bb.0: # %entry
; MIPS32R6O0-NEXT: # %bb.3: # %entry
; MIPS32R6O0-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32R6O0-NEXT: # %bb.4: # %entry
-; MIPS32R6O0-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: lw $1, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: seb $2, $1
; MIPS32R6O0-NEXT: addiu $sp, $sp, 8
; MIPS32R6O0-NEXT: jrc $ra
;
; MIPS4-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadSub8)))
; MIPS4-NEXT: ld $1, %got_disp(y)($1)
; MIPS4-NEXT: daddiu $2, $zero, -4
-; MIPS4-NEXT: and $3, $1, $2
+; MIPS4-NEXT: and $2, $1, $2
; MIPS4-NEXT: andi $1, $1, 3
-; MIPS4-NEXT: sll $1, $1, 3
-; MIPS4-NEXT: ori $2, $zero, 255
-; MIPS4-NEXT: sllv $5, $2, $1
+; MIPS4-NEXT: sll $3, $1, 3
+; MIPS4-NEXT: ori $1, $zero, 255
+; MIPS4-NEXT: sllv $5, $1, $3
; MIPS4-NEXT: nor $6, $zero, $5
-; MIPS4-NEXT: sllv $4, $4, $1
+; MIPS4-NEXT: sllv $4, $4, $3
; MIPS4-NEXT: .LBB9_1: # %entry
; MIPS4-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS4-NEXT: ll $7, 0($3)
+; MIPS4-NEXT: ll $7, 0($2)
; MIPS4-NEXT: subu $8, $7, $4
; MIPS4-NEXT: and $8, $8, $5
; MIPS4-NEXT: and $9, $7, $6
; MIPS4-NEXT: or $9, $9, $8
-; MIPS4-NEXT: sc $9, 0($3)
+; MIPS4-NEXT: sc $9, 0($2)
; MIPS4-NEXT: beqz $9, .LBB9_1
; MIPS4-NEXT: nop
; MIPS4-NEXT: # %bb.2: # %entry
-; MIPS4-NEXT: and $2, $7, $5
-; MIPS4-NEXT: srlv $2, $2, $1
-; MIPS4-NEXT: sll $2, $2, 24
-; MIPS4-NEXT: sra $2, $2, 24
+; MIPS4-NEXT: and $1, $7, $5
+; MIPS4-NEXT: srlv $1, $1, $3
+; MIPS4-NEXT: sll $1, $1, 24
+; MIPS4-NEXT: sra $1, $1, 24
; MIPS4-NEXT: # %bb.3: # %entry
+; MIPS4-NEXT: sll $1, $1, 24
; MIPS4-NEXT: jr $ra
-; MIPS4-NEXT: nop
+; MIPS4-NEXT: sra $2, $1, 24
;
; MIPS64-LABEL: AtomicLoadSub8:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadSub8)))
; MIPS64-NEXT: ld $1, %got_disp(y)($1)
; MIPS64-NEXT: daddiu $2, $zero, -4
-; MIPS64-NEXT: and $3, $1, $2
+; MIPS64-NEXT: and $2, $1, $2
; MIPS64-NEXT: andi $1, $1, 3
-; MIPS64-NEXT: sll $1, $1, 3
-; MIPS64-NEXT: ori $2, $zero, 255
-; MIPS64-NEXT: sllv $5, $2, $1
+; MIPS64-NEXT: sll $3, $1, 3
+; MIPS64-NEXT: ori $1, $zero, 255
+; MIPS64-NEXT: sllv $5, $1, $3
; MIPS64-NEXT: nor $6, $zero, $5
-; MIPS64-NEXT: sllv $4, $4, $1
+; MIPS64-NEXT: sllv $4, $4, $3
; MIPS64-NEXT: .LBB9_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64-NEXT: ll $7, 0($3)
+; MIPS64-NEXT: ll $7, 0($2)
; MIPS64-NEXT: subu $8, $7, $4
; MIPS64-NEXT: and $8, $8, $5
; MIPS64-NEXT: and $9, $7, $6
; MIPS64-NEXT: or $9, $9, $8
-; MIPS64-NEXT: sc $9, 0($3)
+; MIPS64-NEXT: sc $9, 0($2)
; MIPS64-NEXT: beqz $9, .LBB9_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $2, $7, $5
-; MIPS64-NEXT: srlv $2, $2, $1
-; MIPS64-NEXT: sll $2, $2, 24
-; MIPS64-NEXT: sra $2, $2, 24
+; MIPS64-NEXT: and $1, $7, $5
+; MIPS64-NEXT: srlv $1, $1, $3
+; MIPS64-NEXT: sll $1, $1, 24
+; MIPS64-NEXT: sra $1, $1, 24
; MIPS64-NEXT: # %bb.3: # %entry
+; MIPS64-NEXT: sll $1, $1, 24
; MIPS64-NEXT: jr $ra
-; MIPS64-NEXT: nop
+; MIPS64-NEXT: sra $2, $1, 24
;
; MIPS64R2-LABEL: AtomicLoadSub8:
; MIPS64R2: # %bb.0: # %entry
; MIPS64R2-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadSub8)))
; MIPS64R2-NEXT: ld $1, %got_disp(y)($1)
; MIPS64R2-NEXT: daddiu $2, $zero, -4
-; MIPS64R2-NEXT: and $3, $1, $2
+; MIPS64R2-NEXT: and $2, $1, $2
; MIPS64R2-NEXT: andi $1, $1, 3
-; MIPS64R2-NEXT: sll $1, $1, 3
-; MIPS64R2-NEXT: ori $2, $zero, 255
-; MIPS64R2-NEXT: sllv $5, $2, $1
+; MIPS64R2-NEXT: sll $3, $1, 3
+; MIPS64R2-NEXT: ori $1, $zero, 255
+; MIPS64R2-NEXT: sllv $5, $1, $3
; MIPS64R2-NEXT: nor $6, $zero, $5
-; MIPS64R2-NEXT: sllv $4, $4, $1
+; MIPS64R2-NEXT: sllv $4, $4, $3
; MIPS64R2-NEXT: .LBB9_1: # %entry
; MIPS64R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R2-NEXT: ll $7, 0($3)
+; MIPS64R2-NEXT: ll $7, 0($2)
; MIPS64R2-NEXT: subu $8, $7, $4
; MIPS64R2-NEXT: and $8, $8, $5
; MIPS64R2-NEXT: and $9, $7, $6
; MIPS64R2-NEXT: or $9, $9, $8
-; MIPS64R2-NEXT: sc $9, 0($3)
+; MIPS64R2-NEXT: sc $9, 0($2)
; MIPS64R2-NEXT: beqz $9, .LBB9_1
; MIPS64R2-NEXT: nop
; MIPS64R2-NEXT: # %bb.2: # %entry
-; MIPS64R2-NEXT: and $2, $7, $5
-; MIPS64R2-NEXT: srlv $2, $2, $1
-; MIPS64R2-NEXT: seb $2, $2
+; MIPS64R2-NEXT: and $1, $7, $5
+; MIPS64R2-NEXT: srlv $1, $1, $3
+; MIPS64R2-NEXT: seb $1, $1
; MIPS64R2-NEXT: # %bb.3: # %entry
; MIPS64R2-NEXT: jr $ra
-; MIPS64R2-NEXT: nop
+; MIPS64R2-NEXT: seb $2, $1
;
; MIPS64R6-LABEL: AtomicLoadSub8:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadSub8)))
; MIPS64R6-NEXT: ld $1, %got_disp(y)($1)
; MIPS64R6-NEXT: daddiu $2, $zero, -4
-; MIPS64R6-NEXT: and $3, $1, $2
+; MIPS64R6-NEXT: and $2, $1, $2
; MIPS64R6-NEXT: andi $1, $1, 3
-; MIPS64R6-NEXT: sll $1, $1, 3
-; MIPS64R6-NEXT: ori $2, $zero, 255
-; MIPS64R6-NEXT: sllv $5, $2, $1
+; MIPS64R6-NEXT: sll $3, $1, 3
+; MIPS64R6-NEXT: ori $1, $zero, 255
+; MIPS64R6-NEXT: sllv $5, $1, $3
; MIPS64R6-NEXT: nor $6, $zero, $5
-; MIPS64R6-NEXT: sllv $4, $4, $1
+; MIPS64R6-NEXT: sllv $4, $4, $3
; MIPS64R6-NEXT: .LBB9_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R6-NEXT: ll $7, 0($3)
+; MIPS64R6-NEXT: ll $7, 0($2)
; MIPS64R6-NEXT: subu $8, $7, $4
; MIPS64R6-NEXT: and $8, $8, $5
; MIPS64R6-NEXT: and $9, $7, $6
; MIPS64R6-NEXT: or $9, $9, $8
-; MIPS64R6-NEXT: sc $9, 0($3)
+; MIPS64R6-NEXT: sc $9, 0($2)
; MIPS64R6-NEXT: beqzc $9, .LBB9_1
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $2, $7, $5
-; MIPS64R6-NEXT: srlv $2, $2, $1
-; MIPS64R6-NEXT: seb $2, $2
+; MIPS64R6-NEXT: and $1, $7, $5
+; MIPS64R6-NEXT: srlv $1, $1, $3
+; MIPS64R6-NEXT: seb $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
-; MIPS64R6-NEXT: jrc $ra
+; MIPS64R6-NEXT: jr $ra
+; MIPS64R6-NEXT: seb $2, $1
;
; MIPS64R6O0-LABEL: AtomicLoadSub8:
; MIPS64R6O0: # %bb.0: # %entry
; MIPS64R6O0-NEXT: # %bb.3: # %entry
; MIPS64R6O0-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6O0-NEXT: # %bb.4: # %entry
-; MIPS64R6O0-NEXT: lw $2, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: seb $2, $1
; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16
; MIPS64R6O0-NEXT: jrc $ra
;
; MM32-NEXT: addu $2, $2, $25
; MM32-NEXT: lw $1, %got(y)($2)
; MM32-NEXT: addiu $2, $zero, -4
-; MM32-NEXT: and $3, $1, $2
+; MM32-NEXT: and $2, $1, $2
; MM32-NEXT: andi $1, $1, 3
-; MM32-NEXT: sll $1, $1, 3
-; MM32-NEXT: ori $2, $zero, 255
-; MM32-NEXT: sllv $5, $2, $1
-; MM32-NEXT: nor $6, $zero, $5
-; MM32-NEXT: sllv $4, $4, $1
+; MM32-NEXT: sll $3, $1, 3
+; MM32-NEXT: ori $1, $zero, 255
+; MM32-NEXT: sllv $5, $1, $3
+; MM32-NEXT: nor $6, $zero, $5
+; MM32-NEXT: sllv $4, $4, $3
; MM32-NEXT: $BB9_1: # %entry
; MM32-NEXT: # =>This Inner Loop Header: Depth=1
-; MM32-NEXT: ll $7, 0($3)
+; MM32-NEXT: ll $7, 0($2)
; MM32-NEXT: subu $8, $7, $4
; MM32-NEXT: and $8, $8, $5
; MM32-NEXT: and $9, $7, $6
; MM32-NEXT: or $9, $9, $8
-; MM32-NEXT: sc $9, 0($3)
+; MM32-NEXT: sc $9, 0($2)
; MM32-NEXT: beqzc $9, $BB9_1
; MM32-NEXT: # %bb.2: # %entry
-; MM32-NEXT: and $2, $7, $5
-; MM32-NEXT: srlv $2, $2, $1
-; MM32-NEXT: seb $2, $2
+; MM32-NEXT: and $1, $7, $5
+; MM32-NEXT: srlv $1, $1, $3
+; MM32-NEXT: seb $1, $1
; MM32-NEXT: # %bb.3: # %entry
-; MM32-NEXT: jrc $ra
+; MM32-NEXT: jr $ra
+; MM32-NEXT: seb $2, $1
;
; O1-LABEL: AtomicLoadSub8:
; O1: # %bb.0: # %entry
; O1-NEXT: addu $1, $2, $25
; O1-NEXT: lw $1, %got(y)($1)
; O1-NEXT: addiu $2, $zero, -4
-; O1-NEXT: and $3, $1, $2
+; O1-NEXT: and $2, $1, $2
; O1-NEXT: andi $1, $1, 3
-; O1-NEXT: sll $1, $1, 3
-; O1-NEXT: ori $2, $zero, 255
-; O1-NEXT: sllv $5, $2, $1
+; O1-NEXT: sll $3, $1, 3
+; O1-NEXT: ori $1, $zero, 255
+; O1-NEXT: sllv $5, $1, $3
; O1-NEXT: nor $6, $zero, $5
-; O1-NEXT: sllv $4, $4, $1
+; O1-NEXT: sllv $4, $4, $3
; O1-NEXT: $BB9_1: # %entry
; O1-NEXT: # =>This Inner Loop Header: Depth=1
-; O1-NEXT: ll $7, 0($3)
+; O1-NEXT: ll $7, 0($2)
; O1-NEXT: subu $8, $7, $4
; O1-NEXT: and $8, $8, $5
; O1-NEXT: and $9, $7, $6
; O1-NEXT: or $9, $9, $8
-; O1-NEXT: sc $9, 0($3)
+; O1-NEXT: sc $9, 0($2)
; O1-NEXT: beqz $9, $BB9_1
; O1-NEXT: nop
; O1-NEXT: # %bb.2: # %entry
-; O1-NEXT: and $2, $7, $5
-; O1-NEXT: srlv $2, $2, $1
-; O1-NEXT: sll $2, $2, 24
-; O1-NEXT: sra $2, $2, 24
+; O1-NEXT: and $1, $7, $5
+; O1-NEXT: srlv $1, $1, $3
+; O1-NEXT: sll $1, $1, 24
+; O1-NEXT: sra $1, $1, 24
; O1-NEXT: # %bb.3: # %entry
+; O1-NEXT: sll $1, $1, 24
; O1-NEXT: jr $ra
-; O1-NEXT: nop
+; O1-NEXT: sra $2, $1, 24
;
; O2-LABEL: AtomicLoadSub8:
; O2: # %bb.0: # %entry
; O2-NEXT: addu $1, $2, $25
; O2-NEXT: lw $1, %got(y)($1)
; O2-NEXT: addiu $2, $zero, -4
-; O2-NEXT: and $3, $1, $2
+; O2-NEXT: and $2, $1, $2
; O2-NEXT: andi $1, $1, 3
-; O2-NEXT: sll $1, $1, 3
-; O2-NEXT: ori $2, $zero, 255
-; O2-NEXT: sllv $5, $2, $1
+; O2-NEXT: sll $3, $1, 3
+; O2-NEXT: ori $1, $zero, 255
+; O2-NEXT: sllv $5, $1, $3
; O2-NEXT: nor $6, $zero, $5
-; O2-NEXT: sllv $4, $4, $1
+; O2-NEXT: sllv $4, $4, $3
; O2-NEXT: $BB9_1: # %entry
; O2-NEXT: # =>This Inner Loop Header: Depth=1
-; O2-NEXT: ll $7, 0($3)
+; O2-NEXT: ll $7, 0($2)
; O2-NEXT: subu $8, $7, $4
; O2-NEXT: and $8, $8, $5
; O2-NEXT: and $9, $7, $6
; O2-NEXT: or $9, $9, $8
-; O2-NEXT: sc $9, 0($3)
+; O2-NEXT: sc $9, 0($2)
; O2-NEXT: beqz $9, $BB9_1
; O2-NEXT: nop
; O2-NEXT: # %bb.2: # %entry
-; O2-NEXT: and $2, $7, $5
-; O2-NEXT: srlv $2, $2, $1
-; O2-NEXT: sll $2, $2, 24
-; O2-NEXT: sra $2, $2, 24
+; O2-NEXT: and $1, $7, $5
+; O2-NEXT: srlv $1, $1, $3
+; O2-NEXT: sll $1, $1, 24
+; O2-NEXT: sra $1, $1, 24
; O2-NEXT: # %bb.3: # %entry
+; O2-NEXT: sll $1, $1, 24
; O2-NEXT: jr $ra
-; O2-NEXT: nop
+; O2-NEXT: sra $2, $1, 24
;
; O3-LABEL: AtomicLoadSub8:
; O3: # %bb.0: # %entry
; O3-NEXT: addu $1, $2, $25
; O3-NEXT: addiu $2, $zero, -4
; O3-NEXT: lw $1, %got(y)($1)
-; O3-NEXT: and $3, $1, $2
+; O3-NEXT: and $2, $1, $2
; O3-NEXT: andi $1, $1, 3
-; O3-NEXT: ori $2, $zero, 255
-; O3-NEXT: sll $1, $1, 3
-; O3-NEXT: sllv $5, $2, $1
-; O3-NEXT: sllv $4, $4, $1
+; O3-NEXT: sll $3, $1, 3
+; O3-NEXT: ori $1, $zero, 255
+; O3-NEXT: sllv $5, $1, $3
+; O3-NEXT: sllv $4, $4, $3
; O3-NEXT: nor $6, $zero, $5
; O3-NEXT: $BB9_1: # %entry
; O3-NEXT: # =>This Inner Loop Header: Depth=1
-; O3-NEXT: ll $7, 0($3)
+; O3-NEXT: ll $7, 0($2)
; O3-NEXT: subu $8, $7, $4
; O3-NEXT: and $8, $8, $5
; O3-NEXT: and $9, $7, $6
; O3-NEXT: or $9, $9, $8
-; O3-NEXT: sc $9, 0($3)
+; O3-NEXT: sc $9, 0($2)
; O3-NEXT: beqz $9, $BB9_1
; O3-NEXT: nop
; O3-NEXT: # %bb.2: # %entry
-; O3-NEXT: and $2, $7, $5
-; O3-NEXT: srlv $2, $2, $1
-; O3-NEXT: sll $2, $2, 24
-; O3-NEXT: sra $2, $2, 24
+; O3-NEXT: and $1, $7, $5
+; O3-NEXT: srlv $1, $1, $3
+; O3-NEXT: sll $1, $1, 24
+; O3-NEXT: sra $1, $1, 24
; O3-NEXT: # %bb.3: # %entry
+; O3-NEXT: sll $1, $1, 24
; O3-NEXT: jr $ra
-; O3-NEXT: nop
+; O3-NEXT: sra $2, $1, 24
;
; MIPS32EB-LABEL: AtomicLoadSub8:
; MIPS32EB: # %bb.0: # %entry
; MIPS32EB-NEXT: addu $1, $2, $25
; MIPS32EB-NEXT: lw $1, %got(y)($1)
; MIPS32EB-NEXT: addiu $2, $zero, -4
-; MIPS32EB-NEXT: and $3, $1, $2
+; MIPS32EB-NEXT: and $2, $1, $2
; MIPS32EB-NEXT: andi $1, $1, 3
; MIPS32EB-NEXT: xori $1, $1, 3
-; MIPS32EB-NEXT: sll $1, $1, 3
-; MIPS32EB-NEXT: ori $2, $zero, 255
-; MIPS32EB-NEXT: sllv $5, $2, $1
+; MIPS32EB-NEXT: sll $3, $1, 3
+; MIPS32EB-NEXT: ori $1, $zero, 255
+; MIPS32EB-NEXT: sllv $5, $1, $3
; MIPS32EB-NEXT: nor $6, $zero, $5
-; MIPS32EB-NEXT: sllv $4, $4, $1
+; MIPS32EB-NEXT: sllv $4, $4, $3
; MIPS32EB-NEXT: $BB9_1: # %entry
; MIPS32EB-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32EB-NEXT: ll $7, 0($3)
+; MIPS32EB-NEXT: ll $7, 0($2)
; MIPS32EB-NEXT: subu $8, $7, $4
; MIPS32EB-NEXT: and $8, $8, $5
; MIPS32EB-NEXT: and $9, $7, $6
; MIPS32EB-NEXT: or $9, $9, $8
-; MIPS32EB-NEXT: sc $9, 0($3)
+; MIPS32EB-NEXT: sc $9, 0($2)
; MIPS32EB-NEXT: beqz $9, $BB9_1
; MIPS32EB-NEXT: nop
; MIPS32EB-NEXT: # %bb.2: # %entry
-; MIPS32EB-NEXT: and $2, $7, $5
-; MIPS32EB-NEXT: srlv $2, $2, $1
-; MIPS32EB-NEXT: sll $2, $2, 24
-; MIPS32EB-NEXT: sra $2, $2, 24
+; MIPS32EB-NEXT: and $1, $7, $5
+; MIPS32EB-NEXT: srlv $1, $1, $3
+; MIPS32EB-NEXT: sll $1, $1, 24
+; MIPS32EB-NEXT: sra $1, $1, 24
; MIPS32EB-NEXT: # %bb.3: # %entry
+; MIPS32EB-NEXT: sll $1, $1, 24
; MIPS32EB-NEXT: jr $ra
-; MIPS32EB-NEXT: nop
+; MIPS32EB-NEXT: sra $2, $1, 24
entry:
%0 = atomicrmw sub i8* @y, i8 %incr monotonic
ret i8 %0
; MIPS32-NEXT: addu $1, $2, $25
; MIPS32-NEXT: lw $1, %got(y)($1)
; MIPS32-NEXT: addiu $2, $zero, -4
-; MIPS32-NEXT: and $3, $1, $2
+; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: andi $1, $1, 3
-; MIPS32-NEXT: sll $1, $1, 3
-; MIPS32-NEXT: ori $2, $zero, 255
-; MIPS32-NEXT: sllv $5, $2, $1
+; MIPS32-NEXT: sll $3, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $5, $1, $3
; MIPS32-NEXT: nor $6, $zero, $5
-; MIPS32-NEXT: sllv $4, $4, $1
+; MIPS32-NEXT: sllv $4, $4, $3
; MIPS32-NEXT: $BB10_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32-NEXT: ll $7, 0($3)
+; MIPS32-NEXT: ll $7, 0($2)
; MIPS32-NEXT: and $8, $7, $4
; MIPS32-NEXT: nor $8, $zero, $8
; MIPS32-NEXT: and $8, $8, $5
; MIPS32-NEXT: and $9, $7, $6
; MIPS32-NEXT: or $9, $9, $8
-; MIPS32-NEXT: sc $9, 0($3)
+; MIPS32-NEXT: sc $9, 0($2)
; MIPS32-NEXT: beqz $9, $BB10_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $2, $7, $5
-; MIPS32-NEXT: srlv $2, $2, $1
-; MIPS32-NEXT: sll $2, $2, 24
-; MIPS32-NEXT: sra $2, $2, 24
+; MIPS32-NEXT: and $1, $7, $5
+; MIPS32-NEXT: srlv $1, $1, $3
+; MIPS32-NEXT: sll $1, $1, 24
+; MIPS32-NEXT: sra $1, $1, 24
; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sll $1, $1, 24
; MIPS32-NEXT: jr $ra
-; MIPS32-NEXT: nop
+; MIPS32-NEXT: sra $2, $1, 24
;
; MIPS32O0-LABEL: AtomicLoadNand8:
; MIPS32O0: # %bb.0: # %entry
; MIPS32R2-NEXT: addu $1, $2, $25
; MIPS32R2-NEXT: lw $1, %got(y)($1)
; MIPS32R2-NEXT: addiu $2, $zero, -4
-; MIPS32R2-NEXT: and $3, $1, $2
+; MIPS32R2-NEXT: and $2, $1, $2
; MIPS32R2-NEXT: andi $1, $1, 3
-; MIPS32R2-NEXT: sll $1, $1, 3
-; MIPS32R2-NEXT: ori $2, $zero, 255
-; MIPS32R2-NEXT: sllv $5, $2, $1
+; MIPS32R2-NEXT: sll $3, $1, 3
+; MIPS32R2-NEXT: ori $1, $zero, 255
+; MIPS32R2-NEXT: sllv $5, $1, $3
; MIPS32R2-NEXT: nor $6, $zero, $5
-; MIPS32R2-NEXT: sllv $4, $4, $1
+; MIPS32R2-NEXT: sllv $4, $4, $3
; MIPS32R2-NEXT: $BB10_1: # %entry
; MIPS32R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R2-NEXT: ll $7, 0($3)
+; MIPS32R2-NEXT: ll $7, 0($2)
; MIPS32R2-NEXT: and $8, $7, $4
; MIPS32R2-NEXT: nor $8, $zero, $8
; MIPS32R2-NEXT: and $8, $8, $5
; MIPS32R2-NEXT: and $9, $7, $6
; MIPS32R2-NEXT: or $9, $9, $8
-; MIPS32R2-NEXT: sc $9, 0($3)
+; MIPS32R2-NEXT: sc $9, 0($2)
; MIPS32R2-NEXT: beqz $9, $BB10_1
; MIPS32R2-NEXT: nop
; MIPS32R2-NEXT: # %bb.2: # %entry
-; MIPS32R2-NEXT: and $2, $7, $5
-; MIPS32R2-NEXT: srlv $2, $2, $1
-; MIPS32R2-NEXT: seb $2, $2
+; MIPS32R2-NEXT: and $1, $7, $5
+; MIPS32R2-NEXT: srlv $1, $1, $3
+; MIPS32R2-NEXT: seb $1, $1
; MIPS32R2-NEXT: # %bb.3: # %entry
; MIPS32R2-NEXT: jr $ra
-; MIPS32R2-NEXT: nop
+; MIPS32R2-NEXT: seb $2, $1
;
; MIPS32R6-LABEL: AtomicLoadNand8:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: addu $1, $2, $25
; MIPS32R6-NEXT: lw $1, %got(y)($1)
; MIPS32R6-NEXT: addiu $2, $zero, -4
-; MIPS32R6-NEXT: and $3, $1, $2
+; MIPS32R6-NEXT: and $2, $1, $2
; MIPS32R6-NEXT: andi $1, $1, 3
-; MIPS32R6-NEXT: sll $1, $1, 3
-; MIPS32R6-NEXT: ori $2, $zero, 255
-; MIPS32R6-NEXT: sllv $5, $2, $1
+; MIPS32R6-NEXT: sll $3, $1, 3
+; MIPS32R6-NEXT: ori $1, $zero, 255
+; MIPS32R6-NEXT: sllv $5, $1, $3
; MIPS32R6-NEXT: nor $6, $zero, $5
-; MIPS32R6-NEXT: sllv $4, $4, $1
+; MIPS32R6-NEXT: sllv $4, $4, $3
; MIPS32R6-NEXT: $BB10_1: # %entry
; MIPS32R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R6-NEXT: ll $7, 0($3)
+; MIPS32R6-NEXT: ll $7, 0($2)
; MIPS32R6-NEXT: and $8, $7, $4
; MIPS32R6-NEXT: nor $8, $zero, $8
; MIPS32R6-NEXT: and $8, $8, $5
; MIPS32R6-NEXT: and $9, $7, $6
; MIPS32R6-NEXT: or $9, $9, $8
-; MIPS32R6-NEXT: sc $9, 0($3)
+; MIPS32R6-NEXT: sc $9, 0($2)
; MIPS32R6-NEXT: beqzc $9, $BB10_1
; MIPS32R6-NEXT: # %bb.2: # %entry
-; MIPS32R6-NEXT: and $2, $7, $5
-; MIPS32R6-NEXT: srlv $2, $2, $1
-; MIPS32R6-NEXT: seb $2, $2
+; MIPS32R6-NEXT: and $1, $7, $5
+; MIPS32R6-NEXT: srlv $1, $1, $3
+; MIPS32R6-NEXT: seb $1, $1
; MIPS32R6-NEXT: # %bb.3: # %entry
-; MIPS32R6-NEXT: jrc $ra
+; MIPS32R6-NEXT: jr $ra
+; MIPS32R6-NEXT: seb $2, $1
;
; MIPS32R6O0-LABEL: AtomicLoadNand8:
; MIPS32R6O0: # %bb.0: # %entry
; MIPS32R6O0-NEXT: # %bb.3: # %entry
; MIPS32R6O0-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32R6O0-NEXT: # %bb.4: # %entry
-; MIPS32R6O0-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: lw $1, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: seb $2, $1
; MIPS32R6O0-NEXT: addiu $sp, $sp, 8
; MIPS32R6O0-NEXT: jrc $ra
;
; MIPS4-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadNand8)))
; MIPS4-NEXT: ld $1, %got_disp(y)($1)
; MIPS4-NEXT: daddiu $2, $zero, -4
-; MIPS4-NEXT: and $3, $1, $2
+; MIPS4-NEXT: and $2, $1, $2
; MIPS4-NEXT: andi $1, $1, 3
-; MIPS4-NEXT: sll $1, $1, 3
-; MIPS4-NEXT: ori $2, $zero, 255
-; MIPS4-NEXT: sllv $5, $2, $1
+; MIPS4-NEXT: sll $3, $1, 3
+; MIPS4-NEXT: ori $1, $zero, 255
+; MIPS4-NEXT: sllv $5, $1, $3
; MIPS4-NEXT: nor $6, $zero, $5
-; MIPS4-NEXT: sllv $4, $4, $1
+; MIPS4-NEXT: sllv $4, $4, $3
; MIPS4-NEXT: .LBB10_1: # %entry
; MIPS4-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS4-NEXT: ll $7, 0($3)
+; MIPS4-NEXT: ll $7, 0($2)
; MIPS4-NEXT: and $8, $7, $4
; MIPS4-NEXT: nor $8, $zero, $8
; MIPS4-NEXT: and $8, $8, $5
; MIPS4-NEXT: and $9, $7, $6
; MIPS4-NEXT: or $9, $9, $8
-; MIPS4-NEXT: sc $9, 0($3)
+; MIPS4-NEXT: sc $9, 0($2)
; MIPS4-NEXT: beqz $9, .LBB10_1
; MIPS4-NEXT: nop
; MIPS4-NEXT: # %bb.2: # %entry
-; MIPS4-NEXT: and $2, $7, $5
-; MIPS4-NEXT: srlv $2, $2, $1
-; MIPS4-NEXT: sll $2, $2, 24
-; MIPS4-NEXT: sra $2, $2, 24
+; MIPS4-NEXT: and $1, $7, $5
+; MIPS4-NEXT: srlv $1, $1, $3
+; MIPS4-NEXT: sll $1, $1, 24
+; MIPS4-NEXT: sra $1, $1, 24
; MIPS4-NEXT: # %bb.3: # %entry
+; MIPS4-NEXT: sll $1, $1, 24
; MIPS4-NEXT: jr $ra
-; MIPS4-NEXT: nop
+; MIPS4-NEXT: sra $2, $1, 24
;
; MIPS64-LABEL: AtomicLoadNand8:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadNand8)))
; MIPS64-NEXT: ld $1, %got_disp(y)($1)
; MIPS64-NEXT: daddiu $2, $zero, -4
-; MIPS64-NEXT: and $3, $1, $2
+; MIPS64-NEXT: and $2, $1, $2
; MIPS64-NEXT: andi $1, $1, 3
-; MIPS64-NEXT: sll $1, $1, 3
-; MIPS64-NEXT: ori $2, $zero, 255
-; MIPS64-NEXT: sllv $5, $2, $1
+; MIPS64-NEXT: sll $3, $1, 3
+; MIPS64-NEXT: ori $1, $zero, 255
+; MIPS64-NEXT: sllv $5, $1, $3
; MIPS64-NEXT: nor $6, $zero, $5
-; MIPS64-NEXT: sllv $4, $4, $1
+; MIPS64-NEXT: sllv $4, $4, $3
; MIPS64-NEXT: .LBB10_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64-NEXT: ll $7, 0($3)
+; MIPS64-NEXT: ll $7, 0($2)
; MIPS64-NEXT: and $8, $7, $4
; MIPS64-NEXT: nor $8, $zero, $8
; MIPS64-NEXT: and $8, $8, $5
; MIPS64-NEXT: and $9, $7, $6
; MIPS64-NEXT: or $9, $9, $8
-; MIPS64-NEXT: sc $9, 0($3)
+; MIPS64-NEXT: sc $9, 0($2)
; MIPS64-NEXT: beqz $9, .LBB10_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $2, $7, $5
-; MIPS64-NEXT: srlv $2, $2, $1
-; MIPS64-NEXT: sll $2, $2, 24
-; MIPS64-NEXT: sra $2, $2, 24
+; MIPS64-NEXT: and $1, $7, $5
+; MIPS64-NEXT: srlv $1, $1, $3
+; MIPS64-NEXT: sll $1, $1, 24
+; MIPS64-NEXT: sra $1, $1, 24
; MIPS64-NEXT: # %bb.3: # %entry
+; MIPS64-NEXT: sll $1, $1, 24
; MIPS64-NEXT: jr $ra
-; MIPS64-NEXT: nop
+; MIPS64-NEXT: sra $2, $1, 24
;
; MIPS64R2-LABEL: AtomicLoadNand8:
; MIPS64R2: # %bb.0: # %entry
; MIPS64R2-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadNand8)))
; MIPS64R2-NEXT: ld $1, %got_disp(y)($1)
; MIPS64R2-NEXT: daddiu $2, $zero, -4
-; MIPS64R2-NEXT: and $3, $1, $2
+; MIPS64R2-NEXT: and $2, $1, $2
; MIPS64R2-NEXT: andi $1, $1, 3
-; MIPS64R2-NEXT: sll $1, $1, 3
-; MIPS64R2-NEXT: ori $2, $zero, 255
-; MIPS64R2-NEXT: sllv $5, $2, $1
+; MIPS64R2-NEXT: sll $3, $1, 3
+; MIPS64R2-NEXT: ori $1, $zero, 255
+; MIPS64R2-NEXT: sllv $5, $1, $3
; MIPS64R2-NEXT: nor $6, $zero, $5
-; MIPS64R2-NEXT: sllv $4, $4, $1
+; MIPS64R2-NEXT: sllv $4, $4, $3
; MIPS64R2-NEXT: .LBB10_1: # %entry
; MIPS64R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R2-NEXT: ll $7, 0($3)
+; MIPS64R2-NEXT: ll $7, 0($2)
; MIPS64R2-NEXT: and $8, $7, $4
; MIPS64R2-NEXT: nor $8, $zero, $8
; MIPS64R2-NEXT: and $8, $8, $5
; MIPS64R2-NEXT: and $9, $7, $6
; MIPS64R2-NEXT: or $9, $9, $8
-; MIPS64R2-NEXT: sc $9, 0($3)
+; MIPS64R2-NEXT: sc $9, 0($2)
; MIPS64R2-NEXT: beqz $9, .LBB10_1
; MIPS64R2-NEXT: nop
; MIPS64R2-NEXT: # %bb.2: # %entry
-; MIPS64R2-NEXT: and $2, $7, $5
-; MIPS64R2-NEXT: srlv $2, $2, $1
-; MIPS64R2-NEXT: seb $2, $2
+; MIPS64R2-NEXT: and $1, $7, $5
+; MIPS64R2-NEXT: srlv $1, $1, $3
+; MIPS64R2-NEXT: seb $1, $1
; MIPS64R2-NEXT: # %bb.3: # %entry
; MIPS64R2-NEXT: jr $ra
-; MIPS64R2-NEXT: nop
+; MIPS64R2-NEXT: seb $2, $1
;
; MIPS64R6-LABEL: AtomicLoadNand8:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadNand8)))
; MIPS64R6-NEXT: ld $1, %got_disp(y)($1)
; MIPS64R6-NEXT: daddiu $2, $zero, -4
-; MIPS64R6-NEXT: and $3, $1, $2
+; MIPS64R6-NEXT: and $2, $1, $2
; MIPS64R6-NEXT: andi $1, $1, 3
-; MIPS64R6-NEXT: sll $1, $1, 3
-; MIPS64R6-NEXT: ori $2, $zero, 255
-; MIPS64R6-NEXT: sllv $5, $2, $1
+; MIPS64R6-NEXT: sll $3, $1, 3
+; MIPS64R6-NEXT: ori $1, $zero, 255
+; MIPS64R6-NEXT: sllv $5, $1, $3
; MIPS64R6-NEXT: nor $6, $zero, $5
-; MIPS64R6-NEXT: sllv $4, $4, $1
+; MIPS64R6-NEXT: sllv $4, $4, $3
; MIPS64R6-NEXT: .LBB10_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R6-NEXT: ll $7, 0($3)
+; MIPS64R6-NEXT: ll $7, 0($2)
; MIPS64R6-NEXT: and $8, $7, $4
; MIPS64R6-NEXT: nor $8, $zero, $8
; MIPS64R6-NEXT: and $8, $8, $5
; MIPS64R6-NEXT: and $9, $7, $6
; MIPS64R6-NEXT: or $9, $9, $8
-; MIPS64R6-NEXT: sc $9, 0($3)
+; MIPS64R6-NEXT: sc $9, 0($2)
; MIPS64R6-NEXT: beqzc $9, .LBB10_1
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $2, $7, $5
-; MIPS64R6-NEXT: srlv $2, $2, $1
-; MIPS64R6-NEXT: seb $2, $2
+; MIPS64R6-NEXT: and $1, $7, $5
+; MIPS64R6-NEXT: srlv $1, $1, $3
+; MIPS64R6-NEXT: seb $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
-; MIPS64R6-NEXT: jrc $ra
+; MIPS64R6-NEXT: jr $ra
+; MIPS64R6-NEXT: seb $2, $1
;
; MIPS64R6O0-LABEL: AtomicLoadNand8:
; MIPS64R6O0: # %bb.0: # %entry
; MIPS64R6O0-NEXT: # %bb.3: # %entry
; MIPS64R6O0-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6O0-NEXT: # %bb.4: # %entry
-; MIPS64R6O0-NEXT: lw $2, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: seb $2, $1
; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16
; MIPS64R6O0-NEXT: jrc $ra
;
; MM32-NEXT: addu $2, $2, $25
; MM32-NEXT: lw $1, %got(y)($2)
; MM32-NEXT: addiu $2, $zero, -4
-; MM32-NEXT: and $3, $1, $2
+; MM32-NEXT: and $2, $1, $2
; MM32-NEXT: andi $1, $1, 3
-; MM32-NEXT: sll $1, $1, 3
-; MM32-NEXT: ori $2, $zero, 255
-; MM32-NEXT: sllv $5, $2, $1
+; MM32-NEXT: sll $3, $1, 3
+; MM32-NEXT: ori $1, $zero, 255
+; MM32-NEXT: sllv $5, $1, $3
; MM32-NEXT: nor $6, $zero, $5
-; MM32-NEXT: sllv $4, $4, $1
+; MM32-NEXT: sllv $4, $4, $3
; MM32-NEXT: $BB10_1: # %entry
; MM32-NEXT: # =>This Inner Loop Header: Depth=1
-; MM32-NEXT: ll $7, 0($3)
+; MM32-NEXT: ll $7, 0($2)
; MM32-NEXT: and $8, $7, $4
; MM32-NEXT: nor $8, $zero, $8
; MM32-NEXT: and $8, $8, $5
; MM32-NEXT: and $9, $7, $6
; MM32-NEXT: or $9, $9, $8
-; MM32-NEXT: sc $9, 0($3)
+; MM32-NEXT: sc $9, 0($2)
; MM32-NEXT: beqzc $9, $BB10_1
; MM32-NEXT: # %bb.2: # %entry
-; MM32-NEXT: and $2, $7, $5
-; MM32-NEXT: srlv $2, $2, $1
-; MM32-NEXT: seb $2, $2
+; MM32-NEXT: and $1, $7, $5
+; MM32-NEXT: srlv $1, $1, $3
+; MM32-NEXT: seb $1, $1
; MM32-NEXT: # %bb.3: # %entry
-; MM32-NEXT: jrc $ra
+; MM32-NEXT: jr $ra
+; MM32-NEXT: seb $2, $1
;
; O1-LABEL: AtomicLoadNand8:
; O1: # %bb.0: # %entry
; O1-NEXT: addu $1, $2, $25
; O1-NEXT: lw $1, %got(y)($1)
; O1-NEXT: addiu $2, $zero, -4
-; O1-NEXT: and $3, $1, $2
+; O1-NEXT: and $2, $1, $2
; O1-NEXT: andi $1, $1, 3
-; O1-NEXT: sll $1, $1, 3
-; O1-NEXT: ori $2, $zero, 255
-; O1-NEXT: sllv $5, $2, $1
+; O1-NEXT: sll $3, $1, 3
+; O1-NEXT: ori $1, $zero, 255
+; O1-NEXT: sllv $5, $1, $3
; O1-NEXT: nor $6, $zero, $5
-; O1-NEXT: sllv $4, $4, $1
+; O1-NEXT: sllv $4, $4, $3
; O1-NEXT: $BB10_1: # %entry
; O1-NEXT: # =>This Inner Loop Header: Depth=1
-; O1-NEXT: ll $7, 0($3)
+; O1-NEXT: ll $7, 0($2)
; O1-NEXT: and $8, $7, $4
; O1-NEXT: nor $8, $zero, $8
; O1-NEXT: and $8, $8, $5
; O1-NEXT: and $9, $7, $6
; O1-NEXT: or $9, $9, $8
-; O1-NEXT: sc $9, 0($3)
+; O1-NEXT: sc $9, 0($2)
; O1-NEXT: beqz $9, $BB10_1
; O1-NEXT: nop
; O1-NEXT: # %bb.2: # %entry
-; O1-NEXT: and $2, $7, $5
-; O1-NEXT: srlv $2, $2, $1
-; O1-NEXT: sll $2, $2, 24
-; O1-NEXT: sra $2, $2, 24
+; O1-NEXT: and $1, $7, $5
+; O1-NEXT: srlv $1, $1, $3
+; O1-NEXT: sll $1, $1, 24
+; O1-NEXT: sra $1, $1, 24
; O1-NEXT: # %bb.3: # %entry
+; O1-NEXT: sll $1, $1, 24
; O1-NEXT: jr $ra
-; O1-NEXT: nop
+; O1-NEXT: sra $2, $1, 24
;
; O2-LABEL: AtomicLoadNand8:
; O2: # %bb.0: # %entry
; O2-NEXT: addu $1, $2, $25
; O2-NEXT: lw $1, %got(y)($1)
; O2-NEXT: addiu $2, $zero, -4
-; O2-NEXT: and $3, $1, $2
+; O2-NEXT: and $2, $1, $2
; O2-NEXT: andi $1, $1, 3
-; O2-NEXT: sll $1, $1, 3
-; O2-NEXT: ori $2, $zero, 255
-; O2-NEXT: sllv $5, $2, $1
+; O2-NEXT: sll $3, $1, 3
+; O2-NEXT: ori $1, $zero, 255
+; O2-NEXT: sllv $5, $1, $3
; O2-NEXT: nor $6, $zero, $5
-; O2-NEXT: sllv $4, $4, $1
+; O2-NEXT: sllv $4, $4, $3
; O2-NEXT: $BB10_1: # %entry
; O2-NEXT: # =>This Inner Loop Header: Depth=1
-; O2-NEXT: ll $7, 0($3)
+; O2-NEXT: ll $7, 0($2)
; O2-NEXT: and $8, $7, $4
; O2-NEXT: nor $8, $zero, $8
; O2-NEXT: and $8, $8, $5
; O2-NEXT: and $9, $7, $6
; O2-NEXT: or $9, $9, $8
-; O2-NEXT: sc $9, 0($3)
+; O2-NEXT: sc $9, 0($2)
; O2-NEXT: beqz $9, $BB10_1
; O2-NEXT: nop
; O2-NEXT: # %bb.2: # %entry
-; O2-NEXT: and $2, $7, $5
-; O2-NEXT: srlv $2, $2, $1
-; O2-NEXT: sll $2, $2, 24
-; O2-NEXT: sra $2, $2, 24
+; O2-NEXT: and $1, $7, $5
+; O2-NEXT: srlv $1, $1, $3
+; O2-NEXT: sll $1, $1, 24
+; O2-NEXT: sra $1, $1, 24
; O2-NEXT: # %bb.3: # %entry
+; O2-NEXT: sll $1, $1, 24
; O2-NEXT: jr $ra
-; O2-NEXT: nop
+; O2-NEXT: sra $2, $1, 24
;
; O3-LABEL: AtomicLoadNand8:
; O3: # %bb.0: # %entry
; O3-NEXT: addu $1, $2, $25
; O3-NEXT: addiu $2, $zero, -4
; O3-NEXT: lw $1, %got(y)($1)
-; O3-NEXT: and $3, $1, $2
+; O3-NEXT: and $2, $1, $2
; O3-NEXT: andi $1, $1, 3
-; O3-NEXT: ori $2, $zero, 255
-; O3-NEXT: sll $1, $1, 3
-; O3-NEXT: sllv $5, $2, $1
-; O3-NEXT: sllv $4, $4, $1
+; O3-NEXT: sll $3, $1, 3
+; O3-NEXT: ori $1, $zero, 255
+; O3-NEXT: sllv $5, $1, $3
+; O3-NEXT: sllv $4, $4, $3
; O3-NEXT: nor $6, $zero, $5
; O3-NEXT: $BB10_1: # %entry
; O3-NEXT: # =>This Inner Loop Header: Depth=1
-; O3-NEXT: ll $7, 0($3)
+; O3-NEXT: ll $7, 0($2)
; O3-NEXT: and $8, $7, $4
; O3-NEXT: nor $8, $zero, $8
; O3-NEXT: and $8, $8, $5
; O3-NEXT: and $9, $7, $6
; O3-NEXT: or $9, $9, $8
-; O3-NEXT: sc $9, 0($3)
+; O3-NEXT: sc $9, 0($2)
; O3-NEXT: beqz $9, $BB10_1
; O3-NEXT: nop
; O3-NEXT: # %bb.2: # %entry
-; O3-NEXT: and $2, $7, $5
-; O3-NEXT: srlv $2, $2, $1
-; O3-NEXT: sll $2, $2, 24
-; O3-NEXT: sra $2, $2, 24
+; O3-NEXT: and $1, $7, $5
+; O3-NEXT: srlv $1, $1, $3
+; O3-NEXT: sll $1, $1, 24
+; O3-NEXT: sra $1, $1, 24
; O3-NEXT: # %bb.3: # %entry
+; O3-NEXT: sll $1, $1, 24
; O3-NEXT: jr $ra
-; O3-NEXT: nop
+; O3-NEXT: sra $2, $1, 24
;
; MIPS32EB-LABEL: AtomicLoadNand8:
; MIPS32EB: # %bb.0: # %entry
; MIPS32EB-NEXT: addu $1, $2, $25
; MIPS32EB-NEXT: lw $1, %got(y)($1)
; MIPS32EB-NEXT: addiu $2, $zero, -4
-; MIPS32EB-NEXT: and $3, $1, $2
+; MIPS32EB-NEXT: and $2, $1, $2
; MIPS32EB-NEXT: andi $1, $1, 3
; MIPS32EB-NEXT: xori $1, $1, 3
-; MIPS32EB-NEXT: sll $1, $1, 3
-; MIPS32EB-NEXT: ori $2, $zero, 255
-; MIPS32EB-NEXT: sllv $5, $2, $1
+; MIPS32EB-NEXT: sll $3, $1, 3
+; MIPS32EB-NEXT: ori $1, $zero, 255
+; MIPS32EB-NEXT: sllv $5, $1, $3
; MIPS32EB-NEXT: nor $6, $zero, $5
-; MIPS32EB-NEXT: sllv $4, $4, $1
+; MIPS32EB-NEXT: sllv $4, $4, $3
; MIPS32EB-NEXT: $BB10_1: # %entry
; MIPS32EB-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32EB-NEXT: ll $7, 0($3)
+; MIPS32EB-NEXT: ll $7, 0($2)
; MIPS32EB-NEXT: and $8, $7, $4
; MIPS32EB-NEXT: nor $8, $zero, $8
; MIPS32EB-NEXT: and $8, $8, $5
; MIPS32EB-NEXT: and $9, $7, $6
; MIPS32EB-NEXT: or $9, $9, $8
-; MIPS32EB-NEXT: sc $9, 0($3)
+; MIPS32EB-NEXT: sc $9, 0($2)
; MIPS32EB-NEXT: beqz $9, $BB10_1
; MIPS32EB-NEXT: nop
; MIPS32EB-NEXT: # %bb.2: # %entry
-; MIPS32EB-NEXT: and $2, $7, $5
-; MIPS32EB-NEXT: srlv $2, $2, $1
-; MIPS32EB-NEXT: sll $2, $2, 24
-; MIPS32EB-NEXT: sra $2, $2, 24
+; MIPS32EB-NEXT: and $1, $7, $5
+; MIPS32EB-NEXT: srlv $1, $1, $3
+; MIPS32EB-NEXT: sll $1, $1, 24
+; MIPS32EB-NEXT: sra $1, $1, 24
; MIPS32EB-NEXT: # %bb.3: # %entry
+; MIPS32EB-NEXT: sll $1, $1, 24
; MIPS32EB-NEXT: jr $ra
-; MIPS32EB-NEXT: nop
+; MIPS32EB-NEXT: sra $2, $1, 24
entry:
%0 = atomicrmw nand i8* @y, i8 %incr monotonic
ret i8 %0
; MIPS32-NEXT: addu $1, $2, $25
; MIPS32-NEXT: lw $1, %got(y)($1)
; MIPS32-NEXT: addiu $2, $zero, -4
-; MIPS32-NEXT: and $3, $1, $2
+; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: andi $1, $1, 3
-; MIPS32-NEXT: sll $1, $1, 3
-; MIPS32-NEXT: ori $2, $zero, 255
-; MIPS32-NEXT: sllv $5, $2, $1
+; MIPS32-NEXT: sll $3, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $5, $1, $3
; MIPS32-NEXT: nor $6, $zero, $5
-; MIPS32-NEXT: sllv $4, $4, $1
+; MIPS32-NEXT: sllv $4, $4, $3
; MIPS32-NEXT: $BB11_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32-NEXT: ll $7, 0($3)
+; MIPS32-NEXT: ll $7, 0($2)
; MIPS32-NEXT: and $8, $4, $5
; MIPS32-NEXT: and $9, $7, $6
; MIPS32-NEXT: or $9, $9, $8
-; MIPS32-NEXT: sc $9, 0($3)
+; MIPS32-NEXT: sc $9, 0($2)
; MIPS32-NEXT: beqz $9, $BB11_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $2, $7, $5
-; MIPS32-NEXT: srlv $2, $2, $1
-; MIPS32-NEXT: sll $2, $2, 24
-; MIPS32-NEXT: sra $2, $2, 24
+; MIPS32-NEXT: and $1, $7, $5
+; MIPS32-NEXT: srlv $1, $1, $3
+; MIPS32-NEXT: sll $1, $1, 24
+; MIPS32-NEXT: sra $1, $1, 24
; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sll $1, $1, 24
; MIPS32-NEXT: jr $ra
-; MIPS32-NEXT: nop
+; MIPS32-NEXT: sra $2, $1, 24
;
; MIPS32O0-LABEL: AtomicSwap8:
; MIPS32O0: # %bb.0: # %entry
; MIPS32R2-NEXT: addu $1, $2, $25
; MIPS32R2-NEXT: lw $1, %got(y)($1)
; MIPS32R2-NEXT: addiu $2, $zero, -4
-; MIPS32R2-NEXT: and $3, $1, $2
+; MIPS32R2-NEXT: and $2, $1, $2
; MIPS32R2-NEXT: andi $1, $1, 3
-; MIPS32R2-NEXT: sll $1, $1, 3
-; MIPS32R2-NEXT: ori $2, $zero, 255
-; MIPS32R2-NEXT: sllv $5, $2, $1
+; MIPS32R2-NEXT: sll $3, $1, 3
+; MIPS32R2-NEXT: ori $1, $zero, 255
+; MIPS32R2-NEXT: sllv $5, $1, $3
; MIPS32R2-NEXT: nor $6, $zero, $5
-; MIPS32R2-NEXT: sllv $4, $4, $1
+; MIPS32R2-NEXT: sllv $4, $4, $3
; MIPS32R2-NEXT: $BB11_1: # %entry
; MIPS32R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R2-NEXT: ll $7, 0($3)
+; MIPS32R2-NEXT: ll $7, 0($2)
; MIPS32R2-NEXT: and $8, $4, $5
; MIPS32R2-NEXT: and $9, $7, $6
; MIPS32R2-NEXT: or $9, $9, $8
-; MIPS32R2-NEXT: sc $9, 0($3)
+; MIPS32R2-NEXT: sc $9, 0($2)
; MIPS32R2-NEXT: beqz $9, $BB11_1
; MIPS32R2-NEXT: nop
; MIPS32R2-NEXT: # %bb.2: # %entry
-; MIPS32R2-NEXT: and $2, $7, $5
-; MIPS32R2-NEXT: srlv $2, $2, $1
-; MIPS32R2-NEXT: seb $2, $2
+; MIPS32R2-NEXT: and $1, $7, $5
+; MIPS32R2-NEXT: srlv $1, $1, $3
+; MIPS32R2-NEXT: seb $1, $1
; MIPS32R2-NEXT: # %bb.3: # %entry
; MIPS32R2-NEXT: jr $ra
-; MIPS32R2-NEXT: nop
+; MIPS32R2-NEXT: seb $2, $1
;
; MIPS32R6-LABEL: AtomicSwap8:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: addu $1, $2, $25
; MIPS32R6-NEXT: lw $1, %got(y)($1)
; MIPS32R6-NEXT: addiu $2, $zero, -4
-; MIPS32R6-NEXT: and $3, $1, $2
+; MIPS32R6-NEXT: and $2, $1, $2
; MIPS32R6-NEXT: andi $1, $1, 3
-; MIPS32R6-NEXT: sll $1, $1, 3
-; MIPS32R6-NEXT: ori $2, $zero, 255
-; MIPS32R6-NEXT: sllv $5, $2, $1
+; MIPS32R6-NEXT: sll $3, $1, 3
+; MIPS32R6-NEXT: ori $1, $zero, 255
+; MIPS32R6-NEXT: sllv $5, $1, $3
; MIPS32R6-NEXT: nor $6, $zero, $5
-; MIPS32R6-NEXT: sllv $4, $4, $1
+; MIPS32R6-NEXT: sllv $4, $4, $3
; MIPS32R6-NEXT: $BB11_1: # %entry
; MIPS32R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R6-NEXT: ll $7, 0($3)
+; MIPS32R6-NEXT: ll $7, 0($2)
; MIPS32R6-NEXT: and $8, $4, $5
; MIPS32R6-NEXT: and $9, $7, $6
; MIPS32R6-NEXT: or $9, $9, $8
-; MIPS32R6-NEXT: sc $9, 0($3)
+; MIPS32R6-NEXT: sc $9, 0($2)
; MIPS32R6-NEXT: beqzc $9, $BB11_1
; MIPS32R6-NEXT: # %bb.2: # %entry
-; MIPS32R6-NEXT: and $2, $7, $5
-; MIPS32R6-NEXT: srlv $2, $2, $1
-; MIPS32R6-NEXT: seb $2, $2
+; MIPS32R6-NEXT: and $1, $7, $5
+; MIPS32R6-NEXT: srlv $1, $1, $3
+; MIPS32R6-NEXT: seb $1, $1
; MIPS32R6-NEXT: # %bb.3: # %entry
-; MIPS32R6-NEXT: jrc $ra
+; MIPS32R6-NEXT: jr $ra
+; MIPS32R6-NEXT: seb $2, $1
;
; MIPS32R6O0-LABEL: AtomicSwap8:
; MIPS32R6O0: # %bb.0: # %entry
; MIPS32R6O0-NEXT: # %bb.3: # %entry
; MIPS32R6O0-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32R6O0-NEXT: # %bb.4: # %entry
-; MIPS32R6O0-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: lw $1, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: seb $2, $1
; MIPS32R6O0-NEXT: addiu $sp, $sp, 8
; MIPS32R6O0-NEXT: jrc $ra
;
; MIPS4-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicSwap8)))
; MIPS4-NEXT: ld $1, %got_disp(y)($1)
; MIPS4-NEXT: daddiu $2, $zero, -4
-; MIPS4-NEXT: and $3, $1, $2
+; MIPS4-NEXT: and $2, $1, $2
; MIPS4-NEXT: andi $1, $1, 3
-; MIPS4-NEXT: sll $1, $1, 3
-; MIPS4-NEXT: ori $2, $zero, 255
-; MIPS4-NEXT: sllv $5, $2, $1
+; MIPS4-NEXT: sll $3, $1, 3
+; MIPS4-NEXT: ori $1, $zero, 255
+; MIPS4-NEXT: sllv $5, $1, $3
; MIPS4-NEXT: nor $6, $zero, $5
-; MIPS4-NEXT: sllv $4, $4, $1
+; MIPS4-NEXT: sllv $4, $4, $3
; MIPS4-NEXT: .LBB11_1: # %entry
; MIPS4-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS4-NEXT: ll $7, 0($3)
+; MIPS4-NEXT: ll $7, 0($2)
; MIPS4-NEXT: and $8, $4, $5
; MIPS4-NEXT: and $9, $7, $6
; MIPS4-NEXT: or $9, $9, $8
-; MIPS4-NEXT: sc $9, 0($3)
+; MIPS4-NEXT: sc $9, 0($2)
; MIPS4-NEXT: beqz $9, .LBB11_1
; MIPS4-NEXT: nop
; MIPS4-NEXT: # %bb.2: # %entry
-; MIPS4-NEXT: and $2, $7, $5
-; MIPS4-NEXT: srlv $2, $2, $1
-; MIPS4-NEXT: sll $2, $2, 24
-; MIPS4-NEXT: sra $2, $2, 24
+; MIPS4-NEXT: and $1, $7, $5
+; MIPS4-NEXT: srlv $1, $1, $3
+; MIPS4-NEXT: sll $1, $1, 24
+; MIPS4-NEXT: sra $1, $1, 24
; MIPS4-NEXT: # %bb.3: # %entry
+; MIPS4-NEXT: sll $1, $1, 24
; MIPS4-NEXT: jr $ra
-; MIPS4-NEXT: nop
+; MIPS4-NEXT: sra $2, $1, 24
;
; MIPS64-LABEL: AtomicSwap8:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicSwap8)))
; MIPS64-NEXT: ld $1, %got_disp(y)($1)
; MIPS64-NEXT: daddiu $2, $zero, -4
-; MIPS64-NEXT: and $3, $1, $2
+; MIPS64-NEXT: and $2, $1, $2
; MIPS64-NEXT: andi $1, $1, 3
-; MIPS64-NEXT: sll $1, $1, 3
-; MIPS64-NEXT: ori $2, $zero, 255
-; MIPS64-NEXT: sllv $5, $2, $1
+; MIPS64-NEXT: sll $3, $1, 3
+; MIPS64-NEXT: ori $1, $zero, 255
+; MIPS64-NEXT: sllv $5, $1, $3
; MIPS64-NEXT: nor $6, $zero, $5
-; MIPS64-NEXT: sllv $4, $4, $1
+; MIPS64-NEXT: sllv $4, $4, $3
; MIPS64-NEXT: .LBB11_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64-NEXT: ll $7, 0($3)
+; MIPS64-NEXT: ll $7, 0($2)
; MIPS64-NEXT: and $8, $4, $5
; MIPS64-NEXT: and $9, $7, $6
; MIPS64-NEXT: or $9, $9, $8
-; MIPS64-NEXT: sc $9, 0($3)
+; MIPS64-NEXT: sc $9, 0($2)
; MIPS64-NEXT: beqz $9, .LBB11_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $2, $7, $5
-; MIPS64-NEXT: srlv $2, $2, $1
-; MIPS64-NEXT: sll $2, $2, 24
-; MIPS64-NEXT: sra $2, $2, 24
+; MIPS64-NEXT: and $1, $7, $5
+; MIPS64-NEXT: srlv $1, $1, $3
+; MIPS64-NEXT: sll $1, $1, 24
+; MIPS64-NEXT: sra $1, $1, 24
; MIPS64-NEXT: # %bb.3: # %entry
+; MIPS64-NEXT: sll $1, $1, 24
; MIPS64-NEXT: jr $ra
-; MIPS64-NEXT: nop
+; MIPS64-NEXT: sra $2, $1, 24
;
; MIPS64R2-LABEL: AtomicSwap8:
; MIPS64R2: # %bb.0: # %entry
; MIPS64R2-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicSwap8)))
; MIPS64R2-NEXT: ld $1, %got_disp(y)($1)
; MIPS64R2-NEXT: daddiu $2, $zero, -4
-; MIPS64R2-NEXT: and $3, $1, $2
+; MIPS64R2-NEXT: and $2, $1, $2
; MIPS64R2-NEXT: andi $1, $1, 3
-; MIPS64R2-NEXT: sll $1, $1, 3
-; MIPS64R2-NEXT: ori $2, $zero, 255
-; MIPS64R2-NEXT: sllv $5, $2, $1
+; MIPS64R2-NEXT: sll $3, $1, 3
+; MIPS64R2-NEXT: ori $1, $zero, 255
+; MIPS64R2-NEXT: sllv $5, $1, $3
; MIPS64R2-NEXT: nor $6, $zero, $5
-; MIPS64R2-NEXT: sllv $4, $4, $1
+; MIPS64R2-NEXT: sllv $4, $4, $3
; MIPS64R2-NEXT: .LBB11_1: # %entry
; MIPS64R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R2-NEXT: ll $7, 0($3)
+; MIPS64R2-NEXT: ll $7, 0($2)
; MIPS64R2-NEXT: and $8, $4, $5
; MIPS64R2-NEXT: and $9, $7, $6
; MIPS64R2-NEXT: or $9, $9, $8
-; MIPS64R2-NEXT: sc $9, 0($3)
+; MIPS64R2-NEXT: sc $9, 0($2)
; MIPS64R2-NEXT: beqz $9, .LBB11_1
; MIPS64R2-NEXT: nop
; MIPS64R2-NEXT: # %bb.2: # %entry
-; MIPS64R2-NEXT: and $2, $7, $5
-; MIPS64R2-NEXT: srlv $2, $2, $1
-; MIPS64R2-NEXT: seb $2, $2
+; MIPS64R2-NEXT: and $1, $7, $5
+; MIPS64R2-NEXT: srlv $1, $1, $3
+; MIPS64R2-NEXT: seb $1, $1
; MIPS64R2-NEXT: # %bb.3: # %entry
; MIPS64R2-NEXT: jr $ra
-; MIPS64R2-NEXT: nop
+; MIPS64R2-NEXT: seb $2, $1
;
; MIPS64R6-LABEL: AtomicSwap8:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicSwap8)))
; MIPS64R6-NEXT: ld $1, %got_disp(y)($1)
; MIPS64R6-NEXT: daddiu $2, $zero, -4
-; MIPS64R6-NEXT: and $3, $1, $2
+; MIPS64R6-NEXT: and $2, $1, $2
; MIPS64R6-NEXT: andi $1, $1, 3
-; MIPS64R6-NEXT: sll $1, $1, 3
-; MIPS64R6-NEXT: ori $2, $zero, 255
-; MIPS64R6-NEXT: sllv $5, $2, $1
+; MIPS64R6-NEXT: sll $3, $1, 3
+; MIPS64R6-NEXT: ori $1, $zero, 255
+; MIPS64R6-NEXT: sllv $5, $1, $3
; MIPS64R6-NEXT: nor $6, $zero, $5
-; MIPS64R6-NEXT: sllv $4, $4, $1
+; MIPS64R6-NEXT: sllv $4, $4, $3
; MIPS64R6-NEXT: .LBB11_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R6-NEXT: ll $7, 0($3)
+; MIPS64R6-NEXT: ll $7, 0($2)
; MIPS64R6-NEXT: and $8, $4, $5
; MIPS64R6-NEXT: and $9, $7, $6
; MIPS64R6-NEXT: or $9, $9, $8
-; MIPS64R6-NEXT: sc $9, 0($3)
+; MIPS64R6-NEXT: sc $9, 0($2)
; MIPS64R6-NEXT: beqzc $9, .LBB11_1
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $2, $7, $5
-; MIPS64R6-NEXT: srlv $2, $2, $1
-; MIPS64R6-NEXT: seb $2, $2
+; MIPS64R6-NEXT: and $1, $7, $5
+; MIPS64R6-NEXT: srlv $1, $1, $3
+; MIPS64R6-NEXT: seb $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
-; MIPS64R6-NEXT: jrc $ra
+; MIPS64R6-NEXT: jr $ra
+; MIPS64R6-NEXT: seb $2, $1
;
; MIPS64R6O0-LABEL: AtomicSwap8:
; MIPS64R6O0: # %bb.0: # %entry
; MIPS64R6O0-NEXT: # %bb.3: # %entry
; MIPS64R6O0-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6O0-NEXT: # %bb.4: # %entry
-; MIPS64R6O0-NEXT: lw $2, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: seb $2, $1
; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16
; MIPS64R6O0-NEXT: jrc $ra
;
; MM32-NEXT: addu $2, $2, $25
; MM32-NEXT: lw $1, %got(y)($2)
; MM32-NEXT: addiu $2, $zero, -4
-; MM32-NEXT: and $3, $1, $2
+; MM32-NEXT: and $2, $1, $2
; MM32-NEXT: andi $1, $1, 3
-; MM32-NEXT: sll $1, $1, 3
-; MM32-NEXT: ori $2, $zero, 255
-; MM32-NEXT: sllv $5, $2, $1
+; MM32-NEXT: sll $3, $1, 3
+; MM32-NEXT: ori $1, $zero, 255
+; MM32-NEXT: sllv $5, $1, $3
; MM32-NEXT: nor $6, $zero, $5
-; MM32-NEXT: sllv $4, $4, $1
+; MM32-NEXT: sllv $4, $4, $3
; MM32-NEXT: $BB11_1: # %entry
; MM32-NEXT: # =>This Inner Loop Header: Depth=1
-; MM32-NEXT: ll $7, 0($3)
+; MM32-NEXT: ll $7, 0($2)
; MM32-NEXT: and $8, $4, $5
; MM32-NEXT: and $9, $7, $6
; MM32-NEXT: or $9, $9, $8
-; MM32-NEXT: sc $9, 0($3)
+; MM32-NEXT: sc $9, 0($2)
; MM32-NEXT: beqzc $9, $BB11_1
; MM32-NEXT: # %bb.2: # %entry
-; MM32-NEXT: and $2, $7, $5
-; MM32-NEXT: srlv $2, $2, $1
-; MM32-NEXT: seb $2, $2
+; MM32-NEXT: and $1, $7, $5
+; MM32-NEXT: srlv $1, $1, $3
+; MM32-NEXT: seb $1, $1
; MM32-NEXT: # %bb.3: # %entry
-; MM32-NEXT: jrc $ra
+; MM32-NEXT: jr $ra
+; MM32-NEXT: seb $2, $1
;
; O1-LABEL: AtomicSwap8:
; O1: # %bb.0: # %entry
; O1-NEXT: addu $1, $2, $25
; O1-NEXT: lw $1, %got(y)($1)
; O1-NEXT: addiu $2, $zero, -4
-; O1-NEXT: and $3, $1, $2
+; O1-NEXT: and $2, $1, $2
; O1-NEXT: andi $1, $1, 3
-; O1-NEXT: sll $1, $1, 3
-; O1-NEXT: ori $2, $zero, 255
-; O1-NEXT: sllv $5, $2, $1
+; O1-NEXT: sll $3, $1, 3
+; O1-NEXT: ori $1, $zero, 255
+; O1-NEXT: sllv $5, $1, $3
; O1-NEXT: nor $6, $zero, $5
-; O1-NEXT: sllv $4, $4, $1
+; O1-NEXT: sllv $4, $4, $3
; O1-NEXT: $BB11_1: # %entry
; O1-NEXT: # =>This Inner Loop Header: Depth=1
-; O1-NEXT: ll $7, 0($3)
+; O1-NEXT: ll $7, 0($2)
; O1-NEXT: and $8, $4, $5
; O1-NEXT: and $9, $7, $6
; O1-NEXT: or $9, $9, $8
-; O1-NEXT: sc $9, 0($3)
+; O1-NEXT: sc $9, 0($2)
; O1-NEXT: beqz $9, $BB11_1
; O1-NEXT: nop
; O1-NEXT: # %bb.2: # %entry
-; O1-NEXT: and $2, $7, $5
-; O1-NEXT: srlv $2, $2, $1
-; O1-NEXT: sll $2, $2, 24
-; O1-NEXT: sra $2, $2, 24
+; O1-NEXT: and $1, $7, $5
+; O1-NEXT: srlv $1, $1, $3
+; O1-NEXT: sll $1, $1, 24
+; O1-NEXT: sra $1, $1, 24
; O1-NEXT: # %bb.3: # %entry
+; O1-NEXT: sll $1, $1, 24
; O1-NEXT: jr $ra
-; O1-NEXT: nop
+; O1-NEXT: sra $2, $1, 24
;
; O2-LABEL: AtomicSwap8:
; O2: # %bb.0: # %entry
; O2-NEXT: addu $1, $2, $25
; O2-NEXT: lw $1, %got(y)($1)
; O2-NEXT: addiu $2, $zero, -4
-; O2-NEXT: and $3, $1, $2
+; O2-NEXT: and $2, $1, $2
; O2-NEXT: andi $1, $1, 3
-; O2-NEXT: sll $1, $1, 3
-; O2-NEXT: ori $2, $zero, 255
-; O2-NEXT: sllv $5, $2, $1
+; O2-NEXT: sll $3, $1, 3
+; O2-NEXT: ori $1, $zero, 255
+; O2-NEXT: sllv $5, $1, $3
; O2-NEXT: nor $6, $zero, $5
-; O2-NEXT: sllv $4, $4, $1
+; O2-NEXT: sllv $4, $4, $3
; O2-NEXT: $BB11_1: # %entry
; O2-NEXT: # =>This Inner Loop Header: Depth=1
-; O2-NEXT: ll $7, 0($3)
+; O2-NEXT: ll $7, 0($2)
; O2-NEXT: and $8, $4, $5
; O2-NEXT: and $9, $7, $6
; O2-NEXT: or $9, $9, $8
-; O2-NEXT: sc $9, 0($3)
+; O2-NEXT: sc $9, 0($2)
; O2-NEXT: beqz $9, $BB11_1
; O2-NEXT: nop
; O2-NEXT: # %bb.2: # %entry
-; O2-NEXT: and $2, $7, $5
-; O2-NEXT: srlv $2, $2, $1
-; O2-NEXT: sll $2, $2, 24
-; O2-NEXT: sra $2, $2, 24
+; O2-NEXT: and $1, $7, $5
+; O2-NEXT: srlv $1, $1, $3
+; O2-NEXT: sll $1, $1, 24
+; O2-NEXT: sra $1, $1, 24
; O2-NEXT: # %bb.3: # %entry
+; O2-NEXT: sll $1, $1, 24
; O2-NEXT: jr $ra
-; O2-NEXT: nop
+; O2-NEXT: sra $2, $1, 24
;
; O3-LABEL: AtomicSwap8:
; O3: # %bb.0: # %entry
; O3-NEXT: addu $1, $2, $25
; O3-NEXT: addiu $2, $zero, -4
; O3-NEXT: lw $1, %got(y)($1)
-; O3-NEXT: and $3, $1, $2
+; O3-NEXT: and $2, $1, $2
; O3-NEXT: andi $1, $1, 3
-; O3-NEXT: ori $2, $zero, 255
-; O3-NEXT: sll $1, $1, 3
-; O3-NEXT: sllv $5, $2, $1
-; O3-NEXT: sllv $4, $4, $1
+; O3-NEXT: sll $3, $1, 3
+; O3-NEXT: ori $1, $zero, 255
+; O3-NEXT: sllv $5, $1, $3
+; O3-NEXT: sllv $4, $4, $3
; O3-NEXT: nor $6, $zero, $5
; O3-NEXT: $BB11_1: # %entry
; O3-NEXT: # =>This Inner Loop Header: Depth=1
-; O3-NEXT: ll $7, 0($3)
+; O3-NEXT: ll $7, 0($2)
; O3-NEXT: and $8, $4, $5
; O3-NEXT: and $9, $7, $6
; O3-NEXT: or $9, $9, $8
-; O3-NEXT: sc $9, 0($3)
+; O3-NEXT: sc $9, 0($2)
; O3-NEXT: beqz $9, $BB11_1
; O3-NEXT: nop
; O3-NEXT: # %bb.2: # %entry
-; O3-NEXT: and $2, $7, $5
-; O3-NEXT: srlv $2, $2, $1
-; O3-NEXT: sll $2, $2, 24
-; O3-NEXT: sra $2, $2, 24
+; O3-NEXT: and $1, $7, $5
+; O3-NEXT: srlv $1, $1, $3
+; O3-NEXT: sll $1, $1, 24
+; O3-NEXT: sra $1, $1, 24
; O3-NEXT: # %bb.3: # %entry
+; O3-NEXT: sll $1, $1, 24
; O3-NEXT: jr $ra
-; O3-NEXT: nop
+; O3-NEXT: sra $2, $1, 24
;
; MIPS32EB-LABEL: AtomicSwap8:
; MIPS32EB: # %bb.0: # %entry
; MIPS32EB-NEXT: addu $1, $2, $25
; MIPS32EB-NEXT: lw $1, %got(y)($1)
; MIPS32EB-NEXT: addiu $2, $zero, -4
-; MIPS32EB-NEXT: and $3, $1, $2
+; MIPS32EB-NEXT: and $2, $1, $2
; MIPS32EB-NEXT: andi $1, $1, 3
; MIPS32EB-NEXT: xori $1, $1, 3
-; MIPS32EB-NEXT: sll $1, $1, 3
-; MIPS32EB-NEXT: ori $2, $zero, 255
-; MIPS32EB-NEXT: sllv $5, $2, $1
+; MIPS32EB-NEXT: sll $3, $1, 3
+; MIPS32EB-NEXT: ori $1, $zero, 255
+; MIPS32EB-NEXT: sllv $5, $1, $3
; MIPS32EB-NEXT: nor $6, $zero, $5
-; MIPS32EB-NEXT: sllv $4, $4, $1
+; MIPS32EB-NEXT: sllv $4, $4, $3
; MIPS32EB-NEXT: $BB11_1: # %entry
; MIPS32EB-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32EB-NEXT: ll $7, 0($3)
+; MIPS32EB-NEXT: ll $7, 0($2)
; MIPS32EB-NEXT: and $8, $4, $5
; MIPS32EB-NEXT: and $9, $7, $6
; MIPS32EB-NEXT: or $9, $9, $8
-; MIPS32EB-NEXT: sc $9, 0($3)
+; MIPS32EB-NEXT: sc $9, 0($2)
; MIPS32EB-NEXT: beqz $9, $BB11_1
; MIPS32EB-NEXT: nop
; MIPS32EB-NEXT: # %bb.2: # %entry
-; MIPS32EB-NEXT: and $2, $7, $5
-; MIPS32EB-NEXT: srlv $2, $2, $1
-; MIPS32EB-NEXT: sll $2, $2, 24
-; MIPS32EB-NEXT: sra $2, $2, 24
+; MIPS32EB-NEXT: and $1, $7, $5
+; MIPS32EB-NEXT: srlv $1, $1, $3
+; MIPS32EB-NEXT: sll $1, $1, 24
+; MIPS32EB-NEXT: sra $1, $1, 24
; MIPS32EB-NEXT: # %bb.3: # %entry
+; MIPS32EB-NEXT: sll $1, $1, 24
; MIPS32EB-NEXT: jr $ra
-; MIPS32EB-NEXT: nop
+; MIPS32EB-NEXT: sra $2, $1, 24
entry:
%0 = atomicrmw xchg i8* @y, i8 %newval monotonic
ret i8 %0
; MIPS32-NEXT: addu $1, $2, $25
; MIPS32-NEXT: lw $1, %got(z)($1)
; MIPS32-NEXT: addiu $2, $zero, -4
-; MIPS32-NEXT: and $3, $1, $2
+; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: andi $1, $1, 3
-; MIPS32-NEXT: sll $1, $1, 3
-; MIPS32-NEXT: ori $2, $zero, 65535
-; MIPS32-NEXT: sllv $5, $2, $1
+; MIPS32-NEXT: sll $3, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $5, $1, $3
; MIPS32-NEXT: nor $6, $zero, $5
-; MIPS32-NEXT: sllv $4, $4, $1
+; MIPS32-NEXT: sllv $4, $4, $3
; MIPS32-NEXT: $BB14_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32-NEXT: ll $7, 0($3)
+; MIPS32-NEXT: ll $7, 0($2)
; MIPS32-NEXT: addu $8, $7, $4
; MIPS32-NEXT: and $8, $8, $5
; MIPS32-NEXT: and $9, $7, $6
; MIPS32-NEXT: or $9, $9, $8
-; MIPS32-NEXT: sc $9, 0($3)
+; MIPS32-NEXT: sc $9, 0($2)
; MIPS32-NEXT: beqz $9, $BB14_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $2, $7, $5
-; MIPS32-NEXT: srlv $2, $2, $1
-; MIPS32-NEXT: sll $2, $2, 16
-; MIPS32-NEXT: sra $2, $2, 16
+; MIPS32-NEXT: and $1, $7, $5
+; MIPS32-NEXT: srlv $1, $1, $3
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sll $1, $1, 16
; MIPS32-NEXT: jr $ra
-; MIPS32-NEXT: nop
+; MIPS32-NEXT: sra $2, $1, 16
;
; MIPS32O0-LABEL: AtomicLoadAdd16:
; MIPS32O0: # %bb.0: # %entry
; MIPS32R2-NEXT: addu $1, $2, $25
; MIPS32R2-NEXT: lw $1, %got(z)($1)
; MIPS32R2-NEXT: addiu $2, $zero, -4
-; MIPS32R2-NEXT: and $3, $1, $2
+; MIPS32R2-NEXT: and $2, $1, $2
; MIPS32R2-NEXT: andi $1, $1, 3
-; MIPS32R2-NEXT: sll $1, $1, 3
-; MIPS32R2-NEXT: ori $2, $zero, 65535
-; MIPS32R2-NEXT: sllv $5, $2, $1
+; MIPS32R2-NEXT: sll $3, $1, 3
+; MIPS32R2-NEXT: ori $1, $zero, 65535
+; MIPS32R2-NEXT: sllv $5, $1, $3
; MIPS32R2-NEXT: nor $6, $zero, $5
-; MIPS32R2-NEXT: sllv $4, $4, $1
+; MIPS32R2-NEXT: sllv $4, $4, $3
; MIPS32R2-NEXT: $BB14_1: # %entry
; MIPS32R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R2-NEXT: ll $7, 0($3)
+; MIPS32R2-NEXT: ll $7, 0($2)
; MIPS32R2-NEXT: addu $8, $7, $4
; MIPS32R2-NEXT: and $8, $8, $5
; MIPS32R2-NEXT: and $9, $7, $6
; MIPS32R2-NEXT: or $9, $9, $8
-; MIPS32R2-NEXT: sc $9, 0($3)
+; MIPS32R2-NEXT: sc $9, 0($2)
; MIPS32R2-NEXT: beqz $9, $BB14_1
; MIPS32R2-NEXT: nop
; MIPS32R2-NEXT: # %bb.2: # %entry
-; MIPS32R2-NEXT: and $2, $7, $5
-; MIPS32R2-NEXT: srlv $2, $2, $1
-; MIPS32R2-NEXT: seh $2, $2
+; MIPS32R2-NEXT: and $1, $7, $5
+; MIPS32R2-NEXT: srlv $1, $1, $3
+; MIPS32R2-NEXT: seh $1, $1
; MIPS32R2-NEXT: # %bb.3: # %entry
; MIPS32R2-NEXT: jr $ra
-; MIPS32R2-NEXT: nop
+; MIPS32R2-NEXT: seh $2, $1
;
; MIPS32R6-LABEL: AtomicLoadAdd16:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: addu $1, $2, $25
; MIPS32R6-NEXT: lw $1, %got(z)($1)
; MIPS32R6-NEXT: addiu $2, $zero, -4
-; MIPS32R6-NEXT: and $3, $1, $2
+; MIPS32R6-NEXT: and $2, $1, $2
; MIPS32R6-NEXT: andi $1, $1, 3
-; MIPS32R6-NEXT: sll $1, $1, 3
-; MIPS32R6-NEXT: ori $2, $zero, 65535
-; MIPS32R6-NEXT: sllv $5, $2, $1
+; MIPS32R6-NEXT: sll $3, $1, 3
+; MIPS32R6-NEXT: ori $1, $zero, 65535
+; MIPS32R6-NEXT: sllv $5, $1, $3
; MIPS32R6-NEXT: nor $6, $zero, $5
-; MIPS32R6-NEXT: sllv $4, $4, $1
+; MIPS32R6-NEXT: sllv $4, $4, $3
; MIPS32R6-NEXT: $BB14_1: # %entry
; MIPS32R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32R6-NEXT: ll $7, 0($3)
+; MIPS32R6-NEXT: ll $7, 0($2)
; MIPS32R6-NEXT: addu $8, $7, $4
; MIPS32R6-NEXT: and $8, $8, $5
; MIPS32R6-NEXT: and $9, $7, $6
; MIPS32R6-NEXT: or $9, $9, $8
-; MIPS32R6-NEXT: sc $9, 0($3)
+; MIPS32R6-NEXT: sc $9, 0($2)
; MIPS32R6-NEXT: beqzc $9, $BB14_1
; MIPS32R6-NEXT: # %bb.2: # %entry
-; MIPS32R6-NEXT: and $2, $7, $5
-; MIPS32R6-NEXT: srlv $2, $2, $1
-; MIPS32R6-NEXT: seh $2, $2
+; MIPS32R6-NEXT: and $1, $7, $5
+; MIPS32R6-NEXT: srlv $1, $1, $3
+; MIPS32R6-NEXT: seh $1, $1
; MIPS32R6-NEXT: # %bb.3: # %entry
-; MIPS32R6-NEXT: jrc $ra
+; MIPS32R6-NEXT: jr $ra
+; MIPS32R6-NEXT: seh $2, $1
;
; MIPS32R6O0-LABEL: AtomicLoadAdd16:
; MIPS32R6O0: # %bb.0: # %entry
; MIPS32R6O0-NEXT: # %bb.3: # %entry
; MIPS32R6O0-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32R6O0-NEXT: # %bb.4: # %entry
-; MIPS32R6O0-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: lw $1, 4($sp) # 4-byte Folded Reload
+; MIPS32R6O0-NEXT: seh $2, $1
; MIPS32R6O0-NEXT: addiu $sp, $sp, 8
; MIPS32R6O0-NEXT: jrc $ra
;
; MIPS4-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd16)))
; MIPS4-NEXT: ld $1, %got_disp(z)($1)
; MIPS4-NEXT: daddiu $2, $zero, -4
-; MIPS4-NEXT: and $3, $1, $2
+; MIPS4-NEXT: and $2, $1, $2
; MIPS4-NEXT: andi $1, $1, 3
-; MIPS4-NEXT: sll $1, $1, 3
-; MIPS4-NEXT: ori $2, $zero, 65535
-; MIPS4-NEXT: sllv $5, $2, $1
+; MIPS4-NEXT: sll $3, $1, 3
+; MIPS4-NEXT: ori $1, $zero, 65535
+; MIPS4-NEXT: sllv $5, $1, $3
; MIPS4-NEXT: nor $6, $zero, $5
-; MIPS4-NEXT: sllv $4, $4, $1
+; MIPS4-NEXT: sllv $4, $4, $3
; MIPS4-NEXT: .LBB14_1: # %entry
; MIPS4-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS4-NEXT: ll $7, 0($3)
+; MIPS4-NEXT: ll $7, 0($2)
; MIPS4-NEXT: addu $8, $7, $4
; MIPS4-NEXT: and $8, $8, $5
; MIPS4-NEXT: and $9, $7, $6
; MIPS4-NEXT: or $9, $9, $8
-; MIPS4-NEXT: sc $9, 0($3)
+; MIPS4-NEXT: sc $9, 0($2)
; MIPS4-NEXT: beqz $9, .LBB14_1
; MIPS4-NEXT: nop
; MIPS4-NEXT: # %bb.2: # %entry
-; MIPS4-NEXT: and $2, $7, $5
-; MIPS4-NEXT: srlv $2, $2, $1
-; MIPS4-NEXT: sll $2, $2, 16
-; MIPS4-NEXT: sra $2, $2, 16
+; MIPS4-NEXT: and $1, $7, $5
+; MIPS4-NEXT: srlv $1, $1, $3
+; MIPS4-NEXT: sll $1, $1, 16
+; MIPS4-NEXT: sra $1, $1, 16
; MIPS4-NEXT: # %bb.3: # %entry
+; MIPS4-NEXT: sll $1, $1, 16
; MIPS4-NEXT: jr $ra
-; MIPS4-NEXT: nop
+; MIPS4-NEXT: sra $2, $1, 16
;
; MIPS64-LABEL: AtomicLoadAdd16:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd16)))
; MIPS64-NEXT: ld $1, %got_disp(z)($1)
; MIPS64-NEXT: daddiu $2, $zero, -4
-; MIPS64-NEXT: and $3, $1, $2
+; MIPS64-NEXT: and $2, $1, $2
; MIPS64-NEXT: andi $1, $1, 3
-; MIPS64-NEXT: sll $1, $1, 3
-; MIPS64-NEXT: ori $2, $zero, 65535
-; MIPS64-NEXT: sllv $5, $2, $1
+; MIPS64-NEXT: sll $3, $1, 3
+; MIPS64-NEXT: ori $1, $zero, 65535
+; MIPS64-NEXT: sllv $5, $1, $3
; MIPS64-NEXT: nor $6, $zero, $5
-; MIPS64-NEXT: sllv $4, $4, $1
+; MIPS64-NEXT: sllv $4, $4, $3
; MIPS64-NEXT: .LBB14_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64-NEXT: ll $7, 0($3)
+; MIPS64-NEXT: ll $7, 0($2)
; MIPS64-NEXT: addu $8, $7, $4
; MIPS64-NEXT: and $8, $8, $5
; MIPS64-NEXT: and $9, $7, $6
; MIPS64-NEXT: or $9, $9, $8
-; MIPS64-NEXT: sc $9, 0($3)
+; MIPS64-NEXT: sc $9, 0($2)
; MIPS64-NEXT: beqz $9, .LBB14_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $2, $7, $5
-; MIPS64-NEXT: srlv $2, $2, $1
-; MIPS64-NEXT: sll $2, $2, 16
-; MIPS64-NEXT: sra $2, $2, 16
+; MIPS64-NEXT: and $1, $7, $5
+; MIPS64-NEXT: srlv $1, $1, $3
+; MIPS64-NEXT: sll $1, $1, 16
+; MIPS64-NEXT: sra $1, $1, 16
; MIPS64-NEXT: # %bb.3: # %entry
+; MIPS64-NEXT: sll $1, $1, 16
; MIPS64-NEXT: jr $ra
-; MIPS64-NEXT: nop
+; MIPS64-NEXT: sra $2, $1, 16
;
; MIPS64R2-LABEL: AtomicLoadAdd16:
; MIPS64R2: # %bb.0: # %entry
; MIPS64R2-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd16)))
; MIPS64R2-NEXT: ld $1, %got_disp(z)($1)
; MIPS64R2-NEXT: daddiu $2, $zero, -4
-; MIPS64R2-NEXT: and $3, $1, $2
+; MIPS64R2-NEXT: and $2, $1, $2
; MIPS64R2-NEXT: andi $1, $1, 3
-; MIPS64R2-NEXT: sll $1, $1, 3
-; MIPS64R2-NEXT: ori $2, $zero, 65535
-; MIPS64R2-NEXT: sllv $5, $2, $1
+; MIPS64R2-NEXT: sll $3, $1, 3
+; MIPS64R2-NEXT: ori $1, $zero, 65535
+; MIPS64R2-NEXT: sllv $5, $1, $3
; MIPS64R2-NEXT: nor $6, $zero, $5
-; MIPS64R2-NEXT: sllv $4, $4, $1
+; MIPS64R2-NEXT: sllv $4, $4, $3
; MIPS64R2-NEXT: .LBB14_1: # %entry
; MIPS64R2-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R2-NEXT: ll $7, 0($3)
+; MIPS64R2-NEXT: ll $7, 0($2)
; MIPS64R2-NEXT: addu $8, $7, $4
; MIPS64R2-NEXT: and $8, $8, $5
; MIPS64R2-NEXT: and $9, $7, $6
; MIPS64R2-NEXT: or $9, $9, $8
-; MIPS64R2-NEXT: sc $9, 0($3)
+; MIPS64R2-NEXT: sc $9, 0($2)
; MIPS64R2-NEXT: beqz $9, .LBB14_1
; MIPS64R2-NEXT: nop
; MIPS64R2-NEXT: # %bb.2: # %entry
-; MIPS64R2-NEXT: and $2, $7, $5
-; MIPS64R2-NEXT: srlv $2, $2, $1
-; MIPS64R2-NEXT: seh $2, $2
+; MIPS64R2-NEXT: and $1, $7, $5
+; MIPS64R2-NEXT: srlv $1, $1, $3
+; MIPS64R2-NEXT: seh $1, $1
; MIPS64R2-NEXT: # %bb.3: # %entry
; MIPS64R2-NEXT: jr $ra
-; MIPS64R2-NEXT: nop
+; MIPS64R2-NEXT: seh $2, $1
;
; MIPS64R6-LABEL: AtomicLoadAdd16:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd16)))
; MIPS64R6-NEXT: ld $1, %got_disp(z)($1)
; MIPS64R6-NEXT: daddiu $2, $zero, -4
-; MIPS64R6-NEXT: and $3, $1, $2
+; MIPS64R6-NEXT: and $2, $1, $2
; MIPS64R6-NEXT: andi $1, $1, 3
-; MIPS64R6-NEXT: sll $1, $1, 3
-; MIPS64R6-NEXT: ori $2, $zero, 65535
-; MIPS64R6-NEXT: sllv $5, $2, $1
+; MIPS64R6-NEXT: sll $3, $1, 3
+; MIPS64R6-NEXT: ori $1, $zero, 65535
+; MIPS64R6-NEXT: sllv $5, $1, $3
; MIPS64R6-NEXT: nor $6, $zero, $5
-; MIPS64R6-NEXT: sllv $4, $4, $1
+; MIPS64R6-NEXT: sllv $4, $4, $3
; MIPS64R6-NEXT: .LBB14_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS64R6-NEXT: ll $7, 0($3)
+; MIPS64R6-NEXT: ll $7, 0($2)
; MIPS64R6-NEXT: addu $8, $7, $4
; MIPS64R6-NEXT: and $8, $8, $5
; MIPS64R6-NEXT: and $9, $7, $6
; MIPS64R6-NEXT: or $9, $9, $8
-; MIPS64R6-NEXT: sc $9, 0($3)
+; MIPS64R6-NEXT: sc $9, 0($2)
; MIPS64R6-NEXT: beqzc $9, .LBB14_1
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $2, $7, $5
-; MIPS64R6-NEXT: srlv $2, $2, $1
-; MIPS64R6-NEXT: seh $2, $2
+; MIPS64R6-NEXT: and $1, $7, $5
+; MIPS64R6-NEXT: srlv $1, $1, $3
+; MIPS64R6-NEXT: seh $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
-; MIPS64R6-NEXT: jrc $ra
+; MIPS64R6-NEXT: jr $ra
+; MIPS64R6-NEXT: seh $2, $1
;
; MIPS64R6O0-LABEL: AtomicLoadAdd16:
; MIPS64R6O0: # %bb.0: # %entry
; MIPS64R6O0-NEXT: # %bb.3: # %entry
; MIPS64R6O0-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6O0-NEXT: # %bb.4: # %entry
-; MIPS64R6O0-NEXT: lw $2, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
+; MIPS64R6O0-NEXT: seh $2, $1
; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16
; MIPS64R6O0-NEXT: jrc $ra
;
; MM32-NEXT: addu $2, $2, $25
; MM32-NEXT: lw $1, %got(z)($2)
; MM32-NEXT: addiu $2, $zero, -4
-; MM32-NEXT: and $3, $1, $2
+; MM32-NEXT: and $2, $1, $2
; MM32-NEXT: andi $1, $1, 3
-; MM32-NEXT: sll $1, $1, 3
-; MM32-NEXT: ori $2, $zero, 65535
-; MM32-NEXT: sllv $5, $2, $1
+; MM32-NEXT: sll $3, $1, 3
+; MM32-NEXT: ori $1, $zero, 65535
+; MM32-NEXT: sllv $5, $1, $3
; MM32-NEXT: nor $6, $zero, $5
-; MM32-NEXT: sllv $4, $4, $1
+; MM32-NEXT: sllv $4, $4, $3
; MM32-NEXT: $BB14_1: # %entry
; MM32-NEXT: # =>This Inner Loop Header: Depth=1
-; MM32-NEXT: ll $7, 0($3)
+; MM32-NEXT: ll $7, 0($2)
; MM32-NEXT: addu $8, $7, $4
; MM32-NEXT: and $8, $8, $5
; MM32-NEXT: and $9, $7, $6
; MM32-NEXT: or $9, $9, $8
-; MM32-NEXT: sc $9, 0($3)
+; MM32-NEXT: sc $9, 0($2)
; MM32-NEXT: beqzc $9, $BB14_1
; MM32-NEXT: # %bb.2: # %entry
-; MM32-NEXT: and $2, $7, $5
-; MM32-NEXT: srlv $2, $2, $1
-; MM32-NEXT: seh $2, $2
+; MM32-NEXT: and $1, $7, $5
+; MM32-NEXT: srlv $1, $1, $3
+; MM32-NEXT: seh $1, $1
; MM32-NEXT: # %bb.3: # %entry
-; MM32-NEXT: jrc $ra
+; MM32-NEXT: jr $ra
+; MM32-NEXT: seh $2, $1
;
; O1-LABEL: AtomicLoadAdd16:
; O1: # %bb.0: # %entry
; O1-NEXT: addu $1, $2, $25
; O1-NEXT: lw $1, %got(z)($1)
; O1-NEXT: addiu $2, $zero, -4
-; O1-NEXT: and $3, $1, $2
+; O1-NEXT: and $2, $1, $2
; O1-NEXT: andi $1, $1, 3
-; O1-NEXT: sll $1, $1, 3
-; O1-NEXT: ori $2, $zero, 65535
-; O1-NEXT: sllv $5, $2, $1
+; O1-NEXT: sll $3, $1, 3
+; O1-NEXT: ori $1, $zero, 65535
+; O1-NEXT: sllv $5, $1, $3
; O1-NEXT: nor $6, $zero, $5
-; O1-NEXT: sllv $4, $4, $1
+; O1-NEXT: sllv $4, $4, $3
; O1-NEXT: $BB14_1: # %entry
; O1-NEXT: # =>This Inner Loop Header: Depth=1
-; O1-NEXT: ll $7, 0($3)
+; O1-NEXT: ll $7, 0($2)
; O1-NEXT: addu $8, $7, $4
; O1-NEXT: and $8, $8, $5
; O1-NEXT: and $9, $7, $6
; O1-NEXT: or $9, $9, $8
-; O1-NEXT: sc $9, 0($3)
+; O1-NEXT: sc $9, 0($2)
; O1-NEXT: beqz $9, $BB14_1
; O1-NEXT: nop
; O1-NEXT: # %bb.2: # %entry
-; O1-NEXT: and $2, $7, $5
-; O1-NEXT: srlv $2, $2, $1
-; O1-NEXT: sll $2, $2, 16
-; O1-NEXT: sra $2, $2, 16
+; O1-NEXT: and $1, $7, $5
+; O1-NEXT: srlv $1, $1, $3
+; O1-NEXT: sll $1, $1, 16
+; O1-NEXT: sra $1, $1, 16
; O1-NEXT: # %bb.3: # %entry
+; O1-NEXT: sll $1, $1, 16
; O1-NEXT: jr $ra
-; O1-NEXT: nop
+; O1-NEXT: sra $2, $1, 16
;
; O2-LABEL: AtomicLoadAdd16:
; O2: # %bb.0: # %entry
; O2-NEXT: addu $1, $2, $25
; O2-NEXT: lw $1, %got(z)($1)
; O2-NEXT: addiu $2, $zero, -4
-; O2-NEXT: and $3, $1, $2
+; O2-NEXT: and $2, $1, $2
; O2-NEXT: andi $1, $1, 3
-; O2-NEXT: sll $1, $1, 3
-; O2-NEXT: ori $2, $zero, 65535
-; O2-NEXT: sllv $5, $2, $1
+; O2-NEXT: sll $3, $1, 3
+; O2-NEXT: ori $1, $zero, 65535
+; O2-NEXT: sllv $5, $1, $3
; O2-NEXT: nor $6, $zero, $5
-; O2-NEXT: sllv $4, $4, $1
+; O2-NEXT: sllv $4, $4, $3
; O2-NEXT: $BB14_1: # %entry
; O2-NEXT: # =>This Inner Loop Header: Depth=1
-; O2-NEXT: ll $7, 0($3)
+; O2-NEXT: ll $7, 0($2)
; O2-NEXT: addu $8, $7, $4
; O2-NEXT: and $8, $8, $5
; O2-NEXT: and $9, $7, $6
; O2-NEXT: or $9, $9, $8
-; O2-NEXT: sc $9, 0($3)
+; O2-NEXT: sc $9, 0($2)
; O2-NEXT: beqz $9, $BB14_1
; O2-NEXT: nop
; O2-NEXT: # %bb.2: # %entry
-; O2-NEXT: and $2, $7, $5
-; O2-NEXT: srlv $2, $2, $1
-; O2-NEXT: sll $2, $2, 16
-; O2-NEXT: sra $2, $2, 16
+; O2-NEXT: and $1, $7, $5
+; O2-NEXT: srlv $1, $1, $3
+; O2-NEXT: sll $1, $1, 16
+; O2-NEXT: sra $1, $1, 16
; O2-NEXT: # %bb.3: # %entry
+; O2-NEXT: sll $1, $1, 16
; O2-NEXT: jr $ra
-; O2-NEXT: nop
+; O2-NEXT: sra $2, $1, 16
;
; O3-LABEL: AtomicLoadAdd16:
; O3: # %bb.0: # %entry
; O3-NEXT: addu $1, $2, $25
; O3-NEXT: addiu $2, $zero, -4
; O3-NEXT: lw $1, %got(z)($1)
-; O3-NEXT: and $3, $1, $2
+; O3-NEXT: and $2, $1, $2
; O3-NEXT: andi $1, $1, 3
-; O3-NEXT: ori $2, $zero, 65535
-; O3-NEXT: sll $1, $1, 3
-; O3-NEXT: sllv $5, $2, $1
-; O3-NEXT: sllv $4, $4, $1
+; O3-NEXT: sll $3, $1, 3
+; O3-NEXT: ori $1, $zero, 65535
+; O3-NEXT: sllv $5, $1, $3
+; O3-NEXT: sllv $4, $4, $3
; O3-NEXT: nor $6, $zero, $5
; O3-NEXT: $BB14_1: # %entry
; O3-NEXT: # =>This Inner Loop Header: Depth=1
-; O3-NEXT: ll $7, 0($3)
+; O3-NEXT: ll $7, 0($2)
; O3-NEXT: addu $8, $7, $4
; O3-NEXT: and $8, $8, $5
; O3-NEXT: and $9, $7, $6
; O3-NEXT: or $9, $9, $8
-; O3-NEXT: sc $9, 0($3)
+; O3-NEXT: sc $9, 0($2)
; O3-NEXT: beqz $9, $BB14_1
; O3-NEXT: nop
; O3-NEXT: # %bb.2: # %entry
-; O3-NEXT: and $2, $7, $5
-; O3-NEXT: srlv $2, $2, $1
-; O3-NEXT: sll $2, $2, 16
-; O3-NEXT: sra $2, $2, 16
+; O3-NEXT: and $1, $7, $5
+; O3-NEXT: srlv $1, $1, $3
+; O3-NEXT: sll $1, $1, 16
+; O3-NEXT: sra $1, $1, 16
; O3-NEXT: # %bb.3: # %entry
+; O3-NEXT: sll $1, $1, 16
; O3-NEXT: jr $ra
-; O3-NEXT: nop
+; O3-NEXT: sra $2, $1, 16
;
; MIPS32EB-LABEL: AtomicLoadAdd16:
; MIPS32EB: # %bb.0: # %entry
; MIPS32EB-NEXT: addu $1, $2, $25
; MIPS32EB-NEXT: lw $1, %got(z)($1)
; MIPS32EB-NEXT: addiu $2, $zero, -4
-; MIPS32EB-NEXT: and $3, $1, $2
+; MIPS32EB-NEXT: and $2, $1, $2
; MIPS32EB-NEXT: andi $1, $1, 3
; MIPS32EB-NEXT: xori $1, $1, 2
-; MIPS32EB-NEXT: sll $1, $1, 3
-; MIPS32EB-NEXT: ori $2, $zero, 65535
-; MIPS32EB-NEXT: sllv $5, $2, $1
+; MIPS32EB-NEXT: sll $3, $1, 3
+; MIPS32EB-NEXT: ori $1, $zero, 65535
+; MIPS32EB-NEXT: sllv $5, $1, $3
; MIPS32EB-NEXT: nor $6, $zero, $5
-; MIPS32EB-NEXT: sllv $4, $4, $1
+; MIPS32EB-NEXT: sllv $4, $4, $3
; MIPS32EB-NEXT: $BB14_1: # %entry
; MIPS32EB-NEXT: # =>This Inner Loop Header: Depth=1
-; MIPS32EB-NEXT: ll $7, 0($3)
+; MIPS32EB-NEXT: ll $7, 0($2)
; MIPS32EB-NEXT: addu $8, $7, $4
; MIPS32EB-NEXT: and $8, $8, $5
; MIPS32EB-NEXT: and $9, $7, $6
; MIPS32EB-NEXT: or $9, $9, $8
-; MIPS32EB-NEXT: sc $9, 0($3)
+; MIPS32EB-NEXT: sc $9, 0($2)
; MIPS32EB-NEXT: beqz $9, $BB14_1
; MIPS32EB-NEXT: nop
; MIPS32EB-NEXT: # %bb.2: # %entry
-; MIPS32EB-NEXT: and $2, $7, $5
-; MIPS32EB-NEXT: srlv $2, $2, $1
-; MIPS32EB-NEXT: sll $2, $2, 16
-; MIPS32EB-NEXT: sra $2, $2, 16
+; MIPS32EB-NEXT: and $1, $7, $5
+; MIPS32EB-NEXT: srlv $1, $1, $3
+; MIPS32EB-NEXT: sll $1, $1, 16
+; MIPS32EB-NEXT: sra $1, $1, 16
; MIPS32EB-NEXT: # %bb.3: # %entry
+; MIPS32EB-NEXT: sll $1, $1, 16
; MIPS32EB-NEXT: jr $ra
-; MIPS32EB-NEXT: nop
+; MIPS32EB-NEXT: sra $2, $1, 16
entry:
%0 = atomicrmw add i16* @z, i16 %incr monotonic
ret i16 %0
; CHECK-LABEL: ld_0_int32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
; CHECK-LABEL: ld_align16_int32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int32_t_uint8_t:
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int32_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
; CHECK-LABEL: ld_reg_int32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint8_t:
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
-; CHECK-P9-NEXT: clrldi r3, r3, 32
+; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_uint8_t:
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
-; CHECK-P8-NEXT: clrldi r3, r3, 32
+; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int32_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int32_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
; CHECK-LABEL: ld_cst_align16_int32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int32_t_uint8_t:
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
; CHECK-LABEL: ld_0_int32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
; CHECK-LABEL: ld_align16_int32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int32_t_uint16_t:
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int32_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
; CHECK-LABEL: ld_reg_int32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint16_t:
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
-; CHECK-P9-NEXT: clrldi r3, r3, 32
+; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_uint16_t:
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
-; CHECK-P8-NEXT: clrldi r3, r3, 32
+; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int32_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int32_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
; CHECK-LABEL: ld_cst_align16_int32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int32_t_uint16_t:
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
; CHECK-LABEL: ld_0_uint32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
; CHECK-LABEL: ld_align16_uint32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint8_t:
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint32_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
; CHECK-LABEL: ld_reg_uint32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
-; CHECK-P9-NEXT: clrldi r3, r3, 32
+; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
-; CHECK-P8-NEXT: clrldi r3, r3, 32
+; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint32_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint32_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
; CHECK-LABEL: ld_cst_align16_uint32_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint32_t_uint8_t:
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
; CHECK-LABEL: ld_0_uint32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
; CHECK-LABEL: ld_align16_uint32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint16_t:
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint32_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
; CHECK-LABEL: ld_reg_uint32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
-; CHECK-P9-NEXT: clrldi r3, r3, 32
+; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
-; CHECK-P8-NEXT: clrldi r3, r3, 32
+; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint32_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint32_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
; CHECK-LABEL: ld_cst_align16_uint32_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint32_t_uint16_t:
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
; CHECK-LABEL: ld_0_int64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
; CHECK-LABEL: ld_align16_int64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int64_t_uint8_t:
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int64_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
; CHECK-LABEL: ld_reg_int64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint8_t:
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
-; CHECK-P9-NEXT: clrldi r3, r3, 32
+; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_uint8_t:
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
-; CHECK-P8-NEXT: clrldi r3, r3, 32
+; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int64_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int64_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
; CHECK-LABEL: ld_cst_align16_int64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int64_t_uint8_t:
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
; CHECK-LABEL: ld_0_int64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
; CHECK-LABEL: ld_align16_int64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int64_t_uint16_t:
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_int64_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
; CHECK-LABEL: ld_reg_int64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint16_t:
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
-; CHECK-P9-NEXT: clrldi r3, r3, 32
+; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_uint16_t:
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
-; CHECK-P8-NEXT: clrldi r3, r3, 32
+; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_int64_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_int64_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
; CHECK-LABEL: ld_cst_align16_int64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_int64_t_uint16_t:
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
; CHECK-LABEL: ld_0_uint64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i8*
; CHECK-LABEL: ld_align16_uint64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 8(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint8_t:
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint64_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
; CHECK-LABEL: ld_reg_uint64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbzx r3, r3, r4
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lbz r3, 24(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lbz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
-; CHECK-P9-NEXT: clrldi r3, r3, 32
+; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
-; CHECK-P8-NEXT: clrldi r3, r3, 32
+; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lbz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint64_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lbzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint64_t_uint8_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
; CHECK-LABEL: ld_cst_align16_uint64_t_uint8_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r3, 4080(0)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lbz r3, -27108(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 56
; CHECK-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lbz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint64_t_uint8_t:
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
; CHECK-LABEL: ld_0_uint64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i16*
; CHECK-LABEL: ld_align16_uint64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 8(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint16_t:
; CHECK-PREP10-NEXT: lis r4, 1525
; CHECK-PREP10-NEXT: ori r4, r4, 56600
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
; CHECK-P10-NEXT: pli r4, 244140625
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align64_uint64_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
; CHECK-LABEL: ld_reg_uint64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhzx r3, r3, r4
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
; CHECK-NEXT: lhz r3, 24(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
; CHECK-NEXT: lhz r3, 0(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
-; CHECK-P9-NEXT: clrldi r3, r3, 32
+; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
-; CHECK-P8-NEXT: clrldi r3, r3, 32
+; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: lhz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint64_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
; CHECK-P10-NEXT: lhzx r3, r3, r4
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint64_t_uint16_t:
; CHECK-PREP10-NEXT: ori r4, r4, 19025
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
; CHECK-LABEL: ld_cst_align16_uint64_t_uint16_t:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhz r3, 4080(0)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis r3, 153
; CHECK-NEXT: lhz r3, -27108(r3)
-; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: clrldi r3, r3, 48
; CHECK-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
; CHECK-P10-NEXT: lhz r3, 0(r3)
-; CHECK-P10-NEXT: clrldi r3, r3, 32
+; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64_uint64_t_uint16_t:
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
-; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096