mtd: spi-nor: add SFDP fixups for Quad Page Program

[ Upstream commit 1799cd8540b67b88514c82f5fae1c75b986bcbd8 ]

SFDP table of some flash chips do not advertise support of Quad Input
Page Program even though it has support. Use flags and add hardware
cap for these chips.

Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com>
[tudor.ambarus@microchip.com: move pp setting in spi_nor_init_default_params]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220920184808.44876-2-sudip.mukherjee@sifive.com
Stable-dep-of: 9fd0945fe6fa ("mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s28hx SEMPER flash")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 9a7bea3..88da4a1 100644 (file)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2578,6 +2578,12 @@ static void spi_nor_init_default_params(struct spi_nor *nor)
        params->hwcaps.mask |= SNOR_HWCAPS_PP;
        spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP],
                                SPINOR_OP_PP, SNOR_PROTO_1_1_1);
+
+       if (info->flags & SPI_NOR_QUAD_PP) {
+               params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
+               spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_1_4],
+                                       SPINOR_OP_PP_1_1_4, SNOR_PROTO_1_1_4);
+       }
 }
 
 /**

diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 00bf0d0..8a846ad 100644 (file)
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -458,6 +458,7 @@ struct spi_nor_fixups {
  *   SPI_NOR_NO_ERASE:        no erase command needed.
  *   NO_CHIP_ERASE:           chip does not support chip erase.
  *   SPI_NOR_NO_FR:           can't do fastread.
+ *   SPI_NOR_QUAD_PP:         flash supports Quad Input Page Program.
  *
  * @no_sfdp_flags:  flags that indicate support that can be discovered via SFDP.
  *                  Used when SFDP tables are not defined in the flash. These
@@ -507,6 +508,7 @@ struct flash_info {
 #define SPI_NOR_NO_ERASE               BIT(6)
 #define NO_CHIP_ERASE                  BIT(7)
 #define SPI_NOR_NO_FR                  BIT(8)
+#define SPI_NOR_QUAD_PP                        BIT(9)
 
        u8 no_sfdp_flags;
 #define SPI_NOR_SKIP_SFDP              BIT(0)

diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index 89a66a1..7c8eee8 100644 (file)
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -73,6 +73,7 @@ static const struct flash_info issi_nor_parts[] = {
        { "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 512)
                NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
                FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
+               FLAGS(SPI_NOR_QUAD_PP)
                .fixups = &is25lp256_fixups },
 
        /* PMC */