@x = external dso_local local_unnamed_addr global i32, align 4
-define dso_local void @_ZN2ap2aqEv(%struct.ap* %this, i1 %c, i32 %v2) {
+define dso_local void @_ZN2ap2aqEv(ptr %this, i1 %c, i32 %v2) {
; CHECK-LABEL: @_ZN2ap2aqEv(
_ZN1yIN1z2aiE2aaIS1_EE2ahEv.exit:
br i1 %c, label %if.end, label %land.rhs
land.rhs: ; preds = %_ZN1yIN1z2aiE2aaIS1_EE2ahEv.exit
- %0 = bitcast <1 x %"struct.z::ai"*> zeroinitializer to %"struct.z::ai"*
- %retval.sroa.0.0..sroa_idx.i = getelementptr inbounds %"struct.z::ai", %"struct.z::ai"* %0, i64 0, i32 0
- %retval.sroa.0.0.copyload.i = load i32, i32* %retval.sroa.0.0..sroa_idx.i, align 4
+ %0 = bitcast <1 x ptr> zeroinitializer to ptr
+ %retval.sroa.0.0.copyload.i = load i32, ptr %0, align 4
%tobool5 = icmp eq i32 %retval.sroa.0.0.copyload.i, 0
%spec.select = select i1 %tobool5, i32 %v2, i32 0
br label %if.end
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -disable-output
-define void @test(i32* %ldo, i1 %c, i1 %d) {
+define void @test(ptr %ldo, i1 %c, i1 %d) {
bb9:
br i1 %c, label %bb11, label %bb10
bb10: ; preds = %bb9
br label %bb11
bb11: ; preds = %bb10, %bb9
- %reg330 = phi i32* [ null, %bb10 ], [ %ldo, %bb9 ] ; <i32*> [#uses=1]
+ %reg330 = phi ptr [ null, %bb10 ], [ %ldo, %bb9 ] ; <ptr> [#uses=1]
br label %bb20
bb20: ; preds = %bb20, %bb11
- store i32* %reg330, i32** null
+ store ptr %reg330, ptr null
br i1 %d, label %bb20, label %done
done: ; preds = %bb20
ret void
;
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -disable-output
-define i32 @test() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define i32 @test() personality ptr @__gxx_personality_v0 {
%A = invoke i32 @test( )
to label %Ret unwind label %Ret2 ; <i32> [#uses=1]
Ret: ; preds = %0
ret i32 %A
Ret2: ; preds = %0
- %val = landingpad { i8*, i32 }
- catch i8* null
+ %val = landingpad { ptr, i32 }
+ catch ptr null
ret i32 undef
}
; CHECK-NOT: switch
%llvm.dbg.anchor.type = type { i32, i32 }
- %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+ %llvm.dbg.compile_unit.type = type { i32, ptr, i32, ptr, ptr, ptr, i1, i1, ptr }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
-@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
-@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
-@.str2 = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
-@llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8], [55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <ptr> [#uses=1]
+@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <ptr> [#uses=1]
+@.str2 = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <ptr> [#uses=1]
+@llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, ptr @llvm.dbg.compile_units, i32 1, ptr @.str, ptr @.str1, ptr @.str2, i1 true, i1 false, ptr null }, section "llvm.metadata" ; <ptr> [#uses=1]
-declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+declare void @llvm.dbg.stoppoint(i32, i32, ptr) nounwind
; Test folding all to same dest
define i32 @test3(i1 %C) {
br i1 %C, label %Start, label %TheDest
Start: ; preds = %0
-call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+call void @llvm.dbg.stoppoint(i32 5, i32 0, ptr @llvm.dbg.compile_unit)
switch i32 3, label %TheDest [
i32 0, label %TheDest
i32 1, label %TheDest
i32 0, label %L2
]
L1: ; preds = %0
-call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+call void @llvm.dbg.stoppoint(i32 5, i32 0, ptr @llvm.dbg.compile_unit)
ret i32 0
L2: ; preds = %0
-call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+call void @llvm.dbg.stoppoint(i32 5, i32 0, ptr @llvm.dbg.compile_unit)
ret i32 1
}
i32 123, label %L1
]
L1: ; preds = %0, %0
-call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+call void @llvm.dbg.stoppoint(i32 5, i32 0, ptr @llvm.dbg.compile_unit)
ret i32 0
L2: ; preds = %0
-call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+call void @llvm.dbg.stoppoint(i32 5, i32 0, ptr @llvm.dbg.compile_unit)
ret i32 1
}
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -disable-output
; PR584
-@g_38098584 = external global i32 ; <i32*> [#uses=1]
-@g_60187400 = external global i32 ; <i32*> [#uses=1]
-@g_59182229 = external global i32 ; <i32*> [#uses=2]
+@g_38098584 = external global i32 ; <ptr> [#uses=1]
+@g_60187400 = external global i32 ; <ptr> [#uses=1]
+@g_59182229 = external global i32 ; <ptr> [#uses=2]
define i32 @_Z13func_26556482h(i8 %l_88173906) {
entry:
%tmp.14 = sext i8 %tmp.1 to i32 ; <i32> [#uses=1]
%tmp.16 = zext i8 %l_88173906 to i32 ; <i32> [#uses=1]
%tmp.17 = icmp sgt i32 %tmp.14, %tmp.16 ; <i1> [#uses=1]
- %tmp.19 = load i32, i32* @g_59182229 ; <i32> [#uses=2]
+ %tmp.19 = load i32, ptr @g_59182229 ; <i32> [#uses=2]
br i1 %tmp.17, label %cond_true, label %cond_false
cond_true: ; preds = %endif.0
%tmp.20 = icmp ne i32 %tmp.19, 1 ; <i1> [#uses=1]
%tmp.29 = icmp sgt i32 %i.1.1, 99 ; <i1> [#uses=1]
br i1 %tmp.29, label %endif.2, label %no_exit.1
no_exit.1: ; preds = %loopentry.1
- %tmp.30 = load i32, i32* @g_38098584 ; <i32> [#uses=1]
+ %tmp.30 = load i32, ptr @g_38098584 ; <i32> [#uses=1]
%tmp.31 = icmp eq i32 %tmp.30, 0 ; <i1> [#uses=1]
br i1 %tmp.31, label %else.3, label %then.3
then.3: ; preds = %no_exit.1
else.4: ; preds = %else.3
br i1 false, label %else.5, label %then.5
then.5: ; preds = %else.4
- store i32 -1004318825, i32* @g_59182229
+ store i32 -1004318825, ptr @g_59182229
br label %return
else.5: ; preds = %else.4
br label %loopentry.3
%tmp.57 = icmp eq i8 %l_88173906_addr.1, 0 ; <i1> [#uses=1]
br i1 %tmp.57, label %else.7, label %then.7
then.7: ; preds = %no_exit.3
- store i32 16239, i32* @g_60187400
+ store i32 16239, ptr @g_60187400
%inc.2 = add i32 %i.3.3, 1 ; <i32> [#uses=1]
br label %loopentry.3
else.7: ; preds = %no_exit.3
%tmp.14.i19 = icmp eq i32 0, 2 ; <i1> [#uses=1]
br i1 %tmp.14.i19, label %endif.1.i20, label %read_min.exit
endif.1.i20: ; preds = %entry
- %tmp.9.i.i = icmp eq i8* null, null ; <i1> [#uses=1]
+ %tmp.9.i.i = icmp eq ptr null, null ; <i1> [#uses=1]
br i1 %tmp.9.i.i, label %then.i12.i, label %then.i.i
then.i.i: ; preds = %endif.1.i20
ret void
then.i12.i: ; preds = %endif.1.i20
- %tmp.9.i4.i = icmp eq i8* null, null ; <i1> [#uses=1]
+ %tmp.9.i4.i = icmp eq ptr null, null ; <i1> [#uses=1]
br i1 %tmp.9.i4.i, label %endif.2.i33, label %then.i5.i
then.i5.i: ; preds = %then.i12.i
ret void
getfree.exit: ; preds = %endif.1.i, %then.1.i
ret void
endif.1: ; preds = %read_min.exit
- %tmp.27.i = getelementptr i32, i32* null, i32 0 ; <i32*> [#uses=0]
+ %tmp.27.i = getelementptr i32, ptr null, i32 0 ; <ptr> [#uses=0]
br i1 false, label %loopexit.0.i15, label %no_exit.0.i14
no_exit.0.i14: ; preds = %endif.1
ret void
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -disable-output
-define i1 @foo() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define i1 @foo() personality ptr @__gxx_personality_v0 {
%X = invoke i1 @foo( )
to label %N unwind label %F ; <i1> [#uses=1]
F: ; preds = %0
- %val = landingpad { i8*, i32 }
- catch i8* null
+ %val = landingpad { ptr, i32 }
+ catch ptr null
ret i1 false
N: ; preds = %0
br i1 %X, label %A, label %B
; RUN: opt < %s -passes=simplifycfg,instsimplify,simplifycfg -simplifycfg-require-and-preserve-domtree=1 | llvm-dis | FileCheck %s
%struct.anon = type { i32, i32, i32, i32, [1024 x i8] }
-@_zero_ = external global %struct.anon* ; <%struct.anon**> [#uses=2]
-@_one_ = external global %struct.anon* ; <%struct.anon**> [#uses=4]
-@str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=0]
+@_zero_ = external global ptr ; <ptr> [#uses=2]
+@_one_ = external global ptr ; <ptr> [#uses=4]
+@str = internal constant [4 x i8] c"%d\0A\00" ; <ptr> [#uses=0]
-declare i32 @bc_compare(%struct.anon*, %struct.anon*)
+declare i32 @bc_compare(ptr, ptr)
-declare void @free_num(%struct.anon**)
+declare void @free_num(ptr)
-declare %struct.anon* @copy_num(%struct.anon*)
+declare ptr @copy_num(ptr)
-declare void @init_num(%struct.anon**)
+declare void @init_num(ptr)
-declare %struct.anon* @new_num(i32, i32)
+declare ptr @new_num(i32, i32)
-declare void @int2num(%struct.anon**, i32)
+declare void @int2num(ptr, i32)
-declare void @bc_multiply(%struct.anon*, %struct.anon*, %struct.anon**, i32)
+declare void @bc_multiply(ptr, ptr, ptr, i32)
-declare void @bc_raise(%struct.anon*, %struct.anon*, %struct.anon**, i32)
+declare void @bc_raise(ptr, ptr, ptr, i32)
-declare i32 @bc_divide(%struct.anon*, %struct.anon*, %struct.anon**, i32)
+declare i32 @bc_divide(ptr, ptr, ptr, i32)
-declare void @bc_add(%struct.anon*, %struct.anon*, %struct.anon**)
+declare void @bc_add(ptr, ptr, ptr)
-declare i32 @_do_compare(%struct.anon*, %struct.anon*, i32, i32)
+declare i32 @_do_compare(ptr, ptr, i32, i32)
-declare i32 @printf(i8*, ...)
+declare i32 @printf(ptr, ...)
-define i32 @bc_sqrt(%struct.anon** %num, i32 %scale) {
+define i32 @bc_sqrt(ptr %num, i32 %scale) {
entry:
- %guess = alloca %struct.anon* ; <%struct.anon**> [#uses=7]
- %guess1 = alloca %struct.anon* ; <%struct.anon**> [#uses=7]
- %point5 = alloca %struct.anon* ; <%struct.anon**> [#uses=3]
- %tmp = load %struct.anon*, %struct.anon** %num ; <%struct.anon*> [#uses=1]
- %tmp1 = load %struct.anon*, %struct.anon** @_zero_ ; <%struct.anon*> [#uses=1]
- %tmp.upgrd.1 = call i32 @bc_compare( %struct.anon* %tmp, %struct.anon* %tmp1 ) ; <i32> [#uses=2]
+ %guess = alloca ptr ; <ptr> [#uses=7]
+ %guess1 = alloca ptr ; <ptr> [#uses=7]
+ %point5 = alloca ptr ; <ptr> [#uses=3]
+ %tmp = load ptr, ptr %num ; <ptr> [#uses=1]
+ %tmp1 = load ptr, ptr @_zero_ ; <ptr> [#uses=1]
+ %tmp.upgrd.1 = call i32 @bc_compare( ptr %tmp, ptr %tmp1 ) ; <i32> [#uses=2]
%tmp.upgrd.2 = icmp slt i32 %tmp.upgrd.1, 0 ; <i1> [#uses=1]
br i1 %tmp.upgrd.2, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp5 = icmp eq i32 %tmp.upgrd.1, 0 ; <i1> [#uses=1]
br i1 %tmp5, label %cond_true6, label %cond_next13
cond_true6: ; preds = %cond_false
- call void @free_num( %struct.anon** %num )
- %tmp8 = load %struct.anon*, %struct.anon** @_zero_ ; <%struct.anon*> [#uses=1]
- %tmp9 = call %struct.anon* @copy_num( %struct.anon* %tmp8 ) ; <%struct.anon*> [#uses=1]
- store %struct.anon* %tmp9, %struct.anon** %num
+ call void @free_num( ptr %num )
+ %tmp8 = load ptr, ptr @_zero_ ; <ptr> [#uses=1]
+ %tmp9 = call ptr @copy_num( ptr %tmp8 ) ; <ptr> [#uses=1]
+ store ptr %tmp9, ptr %num
ret i32 1
cond_next13: ; preds = %cond_false
- %tmp15 = load %struct.anon*, %struct.anon** %num ; <%struct.anon*> [#uses=1]
- %tmp16 = load %struct.anon*, %struct.anon** @_one_ ; <%struct.anon*> [#uses=1]
- %tmp17 = call i32 @bc_compare( %struct.anon* %tmp15, %struct.anon* %tmp16 ) ; <i32> [#uses=2]
+ %tmp15 = load ptr, ptr %num ; <ptr> [#uses=1]
+ %tmp16 = load ptr, ptr @_one_ ; <ptr> [#uses=1]
+ %tmp17 = call i32 @bc_compare( ptr %tmp15, ptr %tmp16 ) ; <i32> [#uses=2]
%tmp19 = icmp eq i32 %tmp17, 0 ; <i1> [#uses=1]
br i1 %tmp19, label %cond_true20, label %cond_next27
cond_true20: ; preds = %cond_next13
- call void @free_num( %struct.anon** %num )
- %tmp22 = load %struct.anon*, %struct.anon** @_one_ ; <%struct.anon*> [#uses=1]
- %tmp23 = call %struct.anon* @copy_num( %struct.anon* %tmp22 ) ; <%struct.anon*> [#uses=1]
- store %struct.anon* %tmp23, %struct.anon** %num
+ call void @free_num( ptr %num )
+ %tmp22 = load ptr, ptr @_one_ ; <ptr> [#uses=1]
+ %tmp23 = call ptr @copy_num( ptr %tmp22 ) ; <ptr> [#uses=1]
+ store ptr %tmp23, ptr %num
ret i32 1
cond_next27: ; preds = %cond_next13
- %tmp29 = load %struct.anon*, %struct.anon** %num ; <%struct.anon*> [#uses=1]
- %tmp30 = getelementptr %struct.anon, %struct.anon* %tmp29, i32 0, i32 2 ; <i32*> [#uses=1]
- %tmp31 = load i32, i32* %tmp30 ; <i32> [#uses=2]
+ %tmp29 = load ptr, ptr %num ; <ptr> [#uses=1]
+ %tmp30 = getelementptr %struct.anon, ptr %tmp29, i32 0, i32 2 ; <ptr> [#uses=1]
+ %tmp31 = load i32, ptr %tmp30 ; <i32> [#uses=2]
%tmp33 = icmp sge i32 %tmp31, %scale ; <i1> [#uses=1]
%max = select i1 %tmp33, i32 %tmp31, i32 %scale ; <i32> [#uses=4]
%tmp35 = add i32 %max, 2 ; <i32> [#uses=0]
- call void @init_num( %struct.anon** %guess )
- call void @init_num( %struct.anon** %guess1 )
- %tmp36 = call %struct.anon* @new_num( i32 1, i32 1 ) ; <%struct.anon*> [#uses=2]
- store %struct.anon* %tmp36, %struct.anon** %point5
- %tmp.upgrd.3 = getelementptr %struct.anon, %struct.anon* %tmp36, i32 0, i32 4, i32 1 ; <i8*> [#uses=1]
- store i8 5, i8* %tmp.upgrd.3
+ call void @init_num( ptr %guess )
+ call void @init_num( ptr %guess1 )
+ %tmp36 = call ptr @new_num( i32 1, i32 1 ) ; <ptr> [#uses=2]
+ store ptr %tmp36, ptr %point5
+ %tmp.upgrd.3 = getelementptr %struct.anon, ptr %tmp36, i32 0, i32 4, i32 1 ; <ptr> [#uses=1]
+ store i8 5, ptr %tmp.upgrd.3
%tmp39 = icmp slt i32 %tmp17, 0 ; <i1> [#uses=1]
br i1 %tmp39, label %cond_true40, label %cond_false43
cond_true40: ; preds = %cond_next27
- %tmp41 = load %struct.anon*, %struct.anon** @_one_ ; <%struct.anon*> [#uses=1]
- %tmp42 = call %struct.anon* @copy_num( %struct.anon* %tmp41 ) ; <%struct.anon*> [#uses=1]
- store %struct.anon* %tmp42, %struct.anon** %guess
+ %tmp41 = load ptr, ptr @_one_ ; <ptr> [#uses=1]
+ %tmp42 = call ptr @copy_num( ptr %tmp41 ) ; <ptr> [#uses=1]
+ store ptr %tmp42, ptr %guess
br label %bb80.outer
cond_false43: ; preds = %cond_next27
- call void @int2num( %struct.anon** %guess, i32 10 )
- %tmp45 = load %struct.anon*, %struct.anon** %num ; <%struct.anon*> [#uses=1]
- %tmp46 = getelementptr %struct.anon, %struct.anon* %tmp45, i32 0, i32 1 ; <i32*> [#uses=1]
- %tmp47 = load i32, i32* %tmp46 ; <i32> [#uses=1]
- call void @int2num( %struct.anon** %guess1, i32 %tmp47 )
- %tmp48 = load %struct.anon*, %struct.anon** %guess1 ; <%struct.anon*> [#uses=1]
- %tmp49 = load %struct.anon*, %struct.anon** %point5 ; <%struct.anon*> [#uses=1]
- call void @bc_multiply( %struct.anon* %tmp48, %struct.anon* %tmp49, %struct.anon** %guess1, i32 %max )
- %tmp51 = load %struct.anon*, %struct.anon** %guess1 ; <%struct.anon*> [#uses=1]
- %tmp52 = getelementptr %struct.anon, %struct.anon* %tmp51, i32 0, i32 2 ; <i32*> [#uses=1]
- store i32 0, i32* %tmp52
- %tmp53 = load %struct.anon*, %struct.anon** %guess ; <%struct.anon*> [#uses=1]
- %tmp54 = load %struct.anon*, %struct.anon** %guess1 ; <%struct.anon*> [#uses=1]
- call void @bc_raise( %struct.anon* %tmp53, %struct.anon* %tmp54, %struct.anon** %guess, i32 %max )
+ call void @int2num( ptr %guess, i32 10 )
+ %tmp45 = load ptr, ptr %num ; <ptr> [#uses=1]
+ %tmp46 = getelementptr %struct.anon, ptr %tmp45, i32 0, i32 1 ; <ptr> [#uses=1]
+ %tmp47 = load i32, ptr %tmp46 ; <i32> [#uses=1]
+ call void @int2num( ptr %guess1, i32 %tmp47 )
+ %tmp48 = load ptr, ptr %guess1 ; <ptr> [#uses=1]
+ %tmp49 = load ptr, ptr %point5 ; <ptr> [#uses=1]
+ call void @bc_multiply( ptr %tmp48, ptr %tmp49, ptr %guess1, i32 %max )
+ %tmp51 = load ptr, ptr %guess1 ; <ptr> [#uses=1]
+ %tmp52 = getelementptr %struct.anon, ptr %tmp51, i32 0, i32 2 ; <ptr> [#uses=1]
+ store i32 0, ptr %tmp52
+ %tmp53 = load ptr, ptr %guess ; <ptr> [#uses=1]
+ %tmp54 = load ptr, ptr %guess1 ; <ptr> [#uses=1]
+ call void @bc_raise( ptr %tmp53, ptr %tmp54, ptr %guess, i32 %max )
br label %bb80.outer
bb80.outer: ; preds = %cond_true83, %cond_false43, %cond_true40
%done.1.ph = phi i32 [ 1, %cond_true83 ], [ 0, %cond_true40 ], [ 0, %cond_false43 ] ; <i32> [#uses=1]
%tmp82 = icmp eq i32 %done.1.ph, 0 ; <i1> [#uses=1]
br i1 %tmp82, label %cond_true83, label %bb86
cond_true83: ; preds = %bb80
- %tmp71 = call i32 @_do_compare( %struct.anon* null, %struct.anon* null, i32 0, i32 1 ) ; <i32> [#uses=1]
+ %tmp71 = call i32 @_do_compare( ptr null, ptr null, i32 0, i32 1 ) ; <i32> [#uses=1]
%tmp76 = icmp eq i32 %tmp71, 0 ; <i1> [#uses=1]
br i1 %tmp76, label %bb80.outer, label %bb80
; CHECK: bb86
bb86: ; preds = %bb80
- call void @free_num( %struct.anon** %num )
- %tmp88 = load %struct.anon*, %struct.anon** %guess ; <%struct.anon*> [#uses=1]
- %tmp89 = load %struct.anon*, %struct.anon** @_one_ ; <%struct.anon*> [#uses=1]
- %tmp92 = call i32 @bc_divide( %struct.anon* %tmp88, %struct.anon* %tmp89, %struct.anon** %num, i32 %max ) ; <i32> [#uses=0]
- call void @free_num( %struct.anon** %guess )
- call void @free_num( %struct.anon** %guess1 )
- call void @free_num( %struct.anon** %point5 )
+ call void @free_num( ptr %num )
+ %tmp88 = load ptr, ptr %guess ; <ptr> [#uses=1]
+ %tmp89 = load ptr, ptr @_one_ ; <ptr> [#uses=1]
+ %tmp92 = call i32 @bc_divide( ptr %tmp88, ptr %tmp89, ptr %num, i32 %max ) ; <i32> [#uses=0]
+ call void @free_num( ptr %guess )
+ call void @free_num( ptr %guess1 )
+ call void @free_num( ptr %point5 )
ret i32 1
}
target triple = "powerpc-unknown-linux-gnu"
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.eh_status = type opaque
- %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
- %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
- %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.emit_status = type { i32, i32, ptr, ptr, ptr, i32, %struct.location_t, i32, ptr, ptr }
+ %struct.expr_status = type { i32, i32, i32, ptr, ptr, ptr }
+ %struct.function = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, %struct.CUMULATIVE_ARGS, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i8, i32, i64, ptr, ptr, ptr, ptr, ptr, i32, ptr, i32, i32, ptr, ptr, i32, i32, i32, ptr, i32, i32, i8, i8, ptr, ptr, i32, i32, i32, i32, %struct.location_t, ptr, ptr, i8, i8, i8 }
%struct.initial_value_struct = type opaque
%struct.lang_decl = type opaque
%struct.lang_type = type opaque
%struct.language_function = type opaque
- %struct.location_t = type { i8*, i32 }
- %struct.machine_function = type { i32, i32, i8*, i32, i32 }
+ %struct.location_t = type { ptr, i32 }
+ %struct.machine_function = type { i32, i32, ptr, i32, i32 }
%struct.rtunion = type { i32 }
- %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtvec_def = type { i32, [1 x ptr] }
%struct.rtx_def = type { i16, i8, i8, %struct.u }
- %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.sequence_stack = type { ptr, ptr, ptr }
%struct.temp_slot = type opaque
- %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
- %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_common = type { ptr, ptr, ptr, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, ptr, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.tree_decl_u2, ptr, ptr, i64, ptr }
%struct.tree_decl_u1 = type { i64 }
- %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_decl_u2 = type { ptr }
%struct.tree_node = type { %struct.tree_decl }
- %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* }
+ %struct.tree_type = type { %struct.tree_common, ptr, ptr, ptr, ptr, i32, i16, i8, i8, i32, ptr, ptr, %struct.rtunion, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr }
%struct.u = type { [1 x i64] }
- %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.var_refs_queue = type { ptr, i32, i32, ptr }
%struct.varasm_status = type opaque
- %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+ %struct.varray_head_tag = type { i32, i32, i32, ptr, %struct.u }
%union.tree_ann_d = type opaque
-@mode_class = external global [35 x i8] ; <[35 x i8]*> [#uses=3]
+@mode_class = external global [35 x i8] ; <ptr> [#uses=3]
define void @fold_builtin_classify() {
entry:
- %tmp63 = load i32, i32* null ; <i32> [#uses=1]
+ %tmp63 = load i32, ptr null ; <i32> [#uses=1]
switch i32 %tmp63, label %bb276 [
i32 414, label %bb145
i32 417, label %bb
bb: ; preds = %entry
ret void
bb145: ; preds = %entry
- %tmp146 = load %struct.tree_node*, %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
- %tmp148 = getelementptr %struct.tree_node, %struct.tree_node* %tmp146, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
- %tmp149 = load %struct.tree_node*, %struct.tree_node** %tmp148 ; <%struct.tree_node*> [#uses=1]
- %tmp150 = bitcast %struct.tree_node* %tmp149 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
- %tmp151 = getelementptr %struct.tree_type, %struct.tree_type* %tmp150, i32 0, i32 6 ; <i16*> [#uses=1]
- %tmp151.upgrd.1 = bitcast i16* %tmp151 to i32* ; <i32*> [#uses=1]
- %tmp152 = load i32, i32* %tmp151.upgrd.1 ; <i32> [#uses=1]
+ %tmp146 = load ptr, ptr null ; <ptr> [#uses=1]
+ %tmp148 = getelementptr %struct.tree_node, ptr %tmp146, i32 0, i32 0, i32 0, i32 1 ; <ptr> [#uses=1]
+ %tmp149 = load ptr, ptr %tmp148 ; <ptr> [#uses=1]
+ %tmp151 = getelementptr %struct.tree_type, ptr %tmp149, i32 0, i32 6 ; <ptr> [#uses=1]
+ %tmp152 = load i32, ptr %tmp151 ; <i32> [#uses=1]
%tmp154 = lshr i32 %tmp152, 16 ; <i32> [#uses=1]
%tmp154.mask = and i32 %tmp154, 127 ; <i32> [#uses=1]
%gep.upgrd.2 = zext i32 %tmp154.mask to i64 ; <i64> [#uses=1]
- %tmp155 = getelementptr [35 x i8], [35 x i8]* @mode_class, i32 0, i64 %gep.upgrd.2 ; <i8*> [#uses=1]
- %tmp156 = load i8, i8* %tmp155 ; <i8> [#uses=1]
+ %tmp155 = getelementptr [35 x i8], ptr @mode_class, i32 0, i64 %gep.upgrd.2 ; <ptr> [#uses=1]
+ %tmp156 = load i8, ptr %tmp155 ; <i8> [#uses=1]
%tmp157 = icmp eq i8 %tmp156, 4 ; <i1> [#uses=1]
br i1 %tmp157, label %cond_next241, label %cond_true158
cond_true158: ; preds = %bb145
- %tmp172 = load %struct.tree_node*, %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
- %tmp174 = getelementptr %struct.tree_node, %struct.tree_node* %tmp172, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
- %tmp175 = load %struct.tree_node*, %struct.tree_node** %tmp174 ; <%struct.tree_node*> [#uses=1]
- %tmp176 = bitcast %struct.tree_node* %tmp175 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
- %tmp177 = getelementptr %struct.tree_type, %struct.tree_type* %tmp176, i32 0, i32 6 ; <i16*> [#uses=1]
- %tmp177.upgrd.3 = bitcast i16* %tmp177 to i32* ; <i32*> [#uses=1]
- %tmp178 = load i32, i32* %tmp177.upgrd.3 ; <i32> [#uses=1]
+ %tmp172 = load ptr, ptr null ; <ptr> [#uses=1]
+ %tmp174 = getelementptr %struct.tree_node, ptr %tmp172, i32 0, i32 0, i32 0, i32 1 ; <ptr> [#uses=1]
+ %tmp175 = load ptr, ptr %tmp174 ; <ptr> [#uses=1]
+ %tmp177 = getelementptr %struct.tree_type, ptr %tmp175, i32 0, i32 6 ; <ptr> [#uses=1]
+ %tmp178 = load i32, ptr %tmp177 ; <i32> [#uses=1]
%tmp180 = lshr i32 %tmp178, 16 ; <i32> [#uses=1]
%tmp180.mask = and i32 %tmp180, 127 ; <i32> [#uses=1]
%gep.upgrd.4 = zext i32 %tmp180.mask to i64 ; <i64> [#uses=1]
- %tmp181 = getelementptr [35 x i8], [35 x i8]* @mode_class, i32 0, i64 %gep.upgrd.4 ; <i8*> [#uses=1]
- %tmp182 = load i8, i8* %tmp181 ; <i8> [#uses=1]
+ %tmp181 = getelementptr [35 x i8], ptr @mode_class, i32 0, i64 %gep.upgrd.4 ; <ptr> [#uses=1]
+ %tmp182 = load i8, ptr %tmp181 ; <i8> [#uses=1]
%tmp183 = icmp eq i8 %tmp182, 8 ; <i1> [#uses=1]
br i1 %tmp183, label %cond_next241, label %cond_true184
cond_true184: ; preds = %cond_true158
- %tmp185 = load %struct.tree_node*, %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
- %tmp187 = getelementptr %struct.tree_node, %struct.tree_node* %tmp185, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
- %tmp188 = load %struct.tree_node*, %struct.tree_node** %tmp187 ; <%struct.tree_node*> [#uses=1]
- %tmp189 = bitcast %struct.tree_node* %tmp188 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
- %tmp190 = getelementptr %struct.tree_type, %struct.tree_type* %tmp189, i32 0, i32 6 ; <i16*> [#uses=1]
- %tmp190.upgrd.5 = bitcast i16* %tmp190 to i32* ; <i32*> [#uses=1]
- %tmp191 = load i32, i32* %tmp190.upgrd.5 ; <i32> [#uses=1]
+ %tmp185 = load ptr, ptr null ; <ptr> [#uses=1]
+ %tmp187 = getelementptr %struct.tree_node, ptr %tmp185, i32 0, i32 0, i32 0, i32 1 ; <ptr> [#uses=1]
+ %tmp188 = load ptr, ptr %tmp187 ; <ptr> [#uses=1]
+ %tmp190 = getelementptr %struct.tree_type, ptr %tmp188, i32 0, i32 6 ; <ptr> [#uses=1]
+ %tmp191 = load i32, ptr %tmp190 ; <i32> [#uses=1]
%tmp193 = lshr i32 %tmp191, 16 ; <i32> [#uses=1]
%tmp193.mask = and i32 %tmp193, 127 ; <i32> [#uses=1]
%gep.upgrd.6 = zext i32 %tmp193.mask to i64 ; <i64> [#uses=1]
- %tmp194 = getelementptr [35 x i8], [35 x i8]* @mode_class, i32 0, i64 %gep.upgrd.6 ; <i8*> [#uses=1]
- %tmp195 = load i8, i8* %tmp194 ; <i8> [#uses=1]
+ %tmp194 = getelementptr [35 x i8], ptr @mode_class, i32 0, i64 %gep.upgrd.6 ; <ptr> [#uses=1]
+ %tmp195 = load i8, ptr %tmp194 ; <i8> [#uses=1]
%tmp196 = icmp eq i8 %tmp195, 4 ; <i1> [#uses=1]
br i1 %tmp196, label %cond_next241, label %cond_true197
cond_true197: ; preds = %cond_true184
ret void
cond_next241: ; preds = %cond_true184, %cond_true158, %bb145
- %tmp245 = load i32, i32* null ; <i32> [#uses=0]
+ %tmp245 = load i32, ptr null ; <i32> [#uses=0]
ret void
bb276: ; preds = %entry
ret void
; ModuleID = '2006-12-08-Ptr-ICmp-Branch.ll'
target datalayout = "e-p:32:32"
target triple = "i686-pc-linux-gnu"
- %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
- %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
- %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
- %struct.charsequence = type { i8*, i32, i32 }
- %struct.trie_s = type { [26 x %struct.trie_s*], i32 }
-@str = external global [14 x i8] ; <[14 x i8]*> [#uses=0]
-@str.upgrd.1 = external global [32 x i8] ; <[32 x i8]*> [#uses=0]
-@str.upgrd.2 = external global [12 x i8] ; <[12 x i8]*> [#uses=0]
-@C.0.2294 = external global %struct.charsequence ; <%struct.charsequence*> [#uses=3]
-@t = external global %struct.trie_s* ; <%struct.trie_s**> [#uses=0]
-@str.upgrd.3 = external global [3 x i8] ; <[3 x i8]*> [#uses=0]
-@str.upgrd.4 = external global [26 x i8] ; <[26 x i8]*> [#uses=0]
+ %struct.FILE = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i16, i8, [1 x i8], ptr, i64, ptr, ptr, ptr, ptr, i32, i32, [40 x i8] }
+ %struct._IO_FILE = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i16, i8, [1 x i8], ptr, i64, ptr, ptr, ptr, ptr, i32, i32, [40 x i8] }
+ %struct._IO_marker = type { ptr, ptr, i32 }
+ %struct.charsequence = type { ptr, i32, i32 }
+ %struct.trie_s = type { [26 x ptr], i32 }
+@str = external global [14 x i8] ; <ptr> [#uses=0]
+@str.upgrd.1 = external global [32 x i8] ; <ptr> [#uses=0]
+@str.upgrd.2 = external global [12 x i8] ; <ptr> [#uses=0]
+@C.0.2294 = external global %struct.charsequence ; <ptr> [#uses=3]
+@t = external global ptr ; <ptr> [#uses=0]
+@str.upgrd.3 = external global [3 x i8] ; <ptr> [#uses=0]
+@str.upgrd.4 = external global [26 x i8] ; <ptr> [#uses=0]
-declare void @charsequence_reset(%struct.charsequence*)
+declare void @charsequence_reset(ptr)
-declare void @free(i8*)
+declare void @free(ptr)
-declare void @charsequence_push(%struct.charsequence*, i8)
+declare void @charsequence_push(ptr, i8)
-declare i8* @charsequence_val(%struct.charsequence*)
+declare ptr @charsequence_val(ptr)
-declare i32 @_IO_getc(%struct.FILE*)
+declare i32 @_IO_getc(ptr)
declare i32 @tolower(i32)
-declare %struct.trie_s* @trie_insert(%struct.trie_s*, i8*)
+declare ptr @trie_insert(ptr, ptr)
-declare i32 @feof(%struct.FILE*)
+declare i32 @feof(ptr)
-define void @addfile(%struct.trie_s* %t, %struct.FILE* %f) {
+define void @addfile(ptr %t, ptr %f) {
entry:
- %t_addr = alloca %struct.trie_s* ; <%struct.trie_s**> [#uses=2]
- %f_addr = alloca %struct.FILE* ; <%struct.FILE**> [#uses=3]
- %c = alloca i8, align 1 ; <i8*> [#uses=7]
- %wstate = alloca i32, align 4 ; <i32*> [#uses=4]
- %cs = alloca %struct.charsequence, align 16 ; <%struct.charsequence*> [#uses=7]
- %str = alloca i8*, align 4 ; <i8**> [#uses=3]
+ %t_addr = alloca ptr ; <ptr> [#uses=2]
+ %f_addr = alloca ptr ; <ptr> [#uses=3]
+ %c = alloca i8, align 1 ; <ptr> [#uses=7]
+ %wstate = alloca i32, align 4 ; <ptr> [#uses=4]
+ %cs = alloca %struct.charsequence, align 16 ; <ptr> [#uses=7]
+ %str = alloca ptr, align 4 ; <ptr> [#uses=3]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- store %struct.trie_s* %t, %struct.trie_s** %t_addr
- store %struct.FILE* %f, %struct.FILE** %f_addr
- store i32 0, i32* %wstate
- %tmp = getelementptr %struct.charsequence, %struct.charsequence* %cs, i64 0, i32 0 ; <i8**> [#uses=1]
- %tmp1 = getelementptr %struct.charsequence, %struct.charsequence* @C.0.2294, i64 0, i32 0 ; <i8**> [#uses=1]
- %tmp.upgrd.5 = load i8*, i8** %tmp1 ; <i8*> [#uses=1]
- store i8* %tmp.upgrd.5, i8** %tmp
- %tmp.upgrd.6 = getelementptr %struct.charsequence, %struct.charsequence* %cs, i64 0, i32 1 ; <i32*> [#uses=1]
- %tmp2 = getelementptr %struct.charsequence, %struct.charsequence* @C.0.2294, i64 0, i32 1 ; <i32*> [#uses=1]
- %tmp.upgrd.7 = load i32, i32* %tmp2 ; <i32> [#uses=1]
- store i32 %tmp.upgrd.7, i32* %tmp.upgrd.6
- %tmp3 = getelementptr %struct.charsequence, %struct.charsequence* %cs, i64 0, i32 2 ; <i32*> [#uses=1]
- %tmp4 = getelementptr %struct.charsequence, %struct.charsequence* @C.0.2294, i64 0, i32 2 ; <i32*> [#uses=1]
- %tmp5 = load i32, i32* %tmp4 ; <i32> [#uses=1]
- store i32 %tmp5, i32* %tmp3
+ store ptr %t, ptr %t_addr
+ store ptr %f, ptr %f_addr
+ store i32 0, ptr %wstate
+ %tmp = getelementptr %struct.charsequence, ptr %cs, i64 0, i32 0 ; <ptr> [#uses=1]
+ %tmp1 = getelementptr %struct.charsequence, ptr @C.0.2294, i64 0, i32 0 ; <ptr> [#uses=1]
+ %tmp.upgrd.5 = load ptr, ptr %tmp1 ; <ptr> [#uses=1]
+ store ptr %tmp.upgrd.5, ptr %tmp
+ %tmp.upgrd.6 = getelementptr %struct.charsequence, ptr %cs, i64 0, i32 1 ; <ptr> [#uses=1]
+ %tmp2 = getelementptr %struct.charsequence, ptr @C.0.2294, i64 0, i32 1 ; <ptr> [#uses=1]
+ %tmp.upgrd.7 = load i32, ptr %tmp2 ; <i32> [#uses=1]
+ store i32 %tmp.upgrd.7, ptr %tmp.upgrd.6
+ %tmp3 = getelementptr %struct.charsequence, ptr %cs, i64 0, i32 2 ; <ptr> [#uses=1]
+ %tmp4 = getelementptr %struct.charsequence, ptr @C.0.2294, i64 0, i32 2 ; <ptr> [#uses=1]
+ %tmp5 = load i32, ptr %tmp4 ; <i32> [#uses=1]
+ store i32 %tmp5, ptr %tmp3
br label %bb33
bb: ; preds = %bb33
- %tmp.upgrd.8 = load %struct.FILE*, %struct.FILE** %f_addr ; <%struct.FILE*> [#uses=1]
- %tmp.upgrd.9 = call i32 @_IO_getc( %struct.FILE* %tmp.upgrd.8 ) ; <i32> [#uses=1]
+ %tmp.upgrd.8 = load ptr, ptr %f_addr ; <ptr> [#uses=1]
+ %tmp.upgrd.9 = call i32 @_IO_getc( ptr %tmp.upgrd.8 ) ; <i32> [#uses=1]
%tmp6 = call i32 @tolower( i32 %tmp.upgrd.9 ) ; <i32> [#uses=1]
%tmp6.upgrd.10 = trunc i32 %tmp6 to i8 ; <i8> [#uses=1]
- store i8 %tmp6.upgrd.10, i8* %c
- %tmp7 = load i32, i32* %wstate ; <i32> [#uses=1]
+ store i8 %tmp6.upgrd.10, ptr %c
+ %tmp7 = load i32, ptr %wstate ; <i32> [#uses=1]
%tmp.upgrd.11 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
br i1 %tmp.upgrd.11, label %cond_true, label %cond_false
cond_true: ; preds = %bb
- %tmp.upgrd.12 = load i8, i8* %c ; <i8> [#uses=1]
+ %tmp.upgrd.12 = load i8, ptr %c ; <i8> [#uses=1]
%tmp8 = icmp sle i8 %tmp.upgrd.12, 96 ; <i1> [#uses=1]
br i1 %tmp8, label %cond_true9, label %cond_next
cond_true9: ; preds = %cond_true
br label %bb16
cond_next: ; preds = %cond_true
- %tmp10 = load i8, i8* %c ; <i8> [#uses=1]
+ %tmp10 = load i8, ptr %c ; <i8> [#uses=1]
%tmp11 = icmp sgt i8 %tmp10, 122 ; <i1> [#uses=1]
br i1 %tmp11, label %cond_true12, label %cond_next13
cond_true12: ; preds = %cond_next
br label %bb16
cond_next13: ; preds = %cond_next
- %tmp14 = load i8, i8* %c ; <i8> [#uses=1]
+ %tmp14 = load i8, ptr %c ; <i8> [#uses=1]
%tmp14.upgrd.13 = sext i8 %tmp14 to i32 ; <i32> [#uses=1]
%tmp1415 = trunc i32 %tmp14.upgrd.13 to i8 ; <i8> [#uses=1]
- call void @charsequence_push( %struct.charsequence* %cs, i8 %tmp1415 )
+ call void @charsequence_push( ptr %cs, i8 %tmp1415 )
br label %bb21
bb16: ; preds = %cond_true12, %cond_true9
- %tmp17 = call i8* @charsequence_val( %struct.charsequence* %cs ) ; <i8*> [#uses=1]
- store i8* %tmp17, i8** %str
- %tmp.upgrd.14 = load %struct.trie_s*, %struct.trie_s** %t_addr ; <%struct.trie_s*> [#uses=1]
- %tmp18 = load i8*, i8** %str ; <i8*> [#uses=1]
- %tmp19 = call %struct.trie_s* @trie_insert( %struct.trie_s* %tmp.upgrd.14, i8* %tmp18 ) ; <%struct.trie_s*> [#uses=0]
- %tmp20 = load i8*, i8** %str ; <i8*> [#uses=1]
- call void @free( i8* %tmp20 )
- store i32 0, i32* %wstate
+ %tmp17 = call ptr @charsequence_val( ptr %cs ) ; <ptr> [#uses=1]
+ store ptr %tmp17, ptr %str
+ %tmp.upgrd.14 = load ptr, ptr %t_addr ; <ptr> [#uses=1]
+ %tmp18 = load ptr, ptr %str ; <ptr> [#uses=1]
+ %tmp19 = call ptr @trie_insert( ptr %tmp.upgrd.14, ptr %tmp18 ) ; <ptr> [#uses=0]
+ %tmp20 = load ptr, ptr %str ; <ptr> [#uses=1]
+ call void @free( ptr %tmp20 )
+ store i32 0, ptr %wstate
br label %bb21
bb21: ; preds = %bb16, %cond_next13
br label %cond_next32
cond_false: ; preds = %bb
- %tmp22 = load i8, i8* %c ; <i8> [#uses=1]
+ %tmp22 = load i8, ptr %c ; <i8> [#uses=1]
%tmp23 = icmp sgt i8 %tmp22, 96 ; <i1> [#uses=1]
br i1 %tmp23, label %cond_true24, label %cond_next31
cond_true24: ; preds = %cond_false
- %tmp25 = load i8, i8* %c ; <i8> [#uses=1]
+ %tmp25 = load i8, ptr %c ; <i8> [#uses=1]
%tmp26 = icmp sle i8 %tmp25, 122 ; <i1> [#uses=1]
br i1 %tmp26, label %cond_true27, label %cond_next30
cond_true27: ; preds = %cond_true24
- call void @charsequence_reset( %struct.charsequence* %cs )
- %tmp28 = load i8, i8* %c ; <i8> [#uses=1]
+ call void @charsequence_reset( ptr %cs )
+ %tmp28 = load i8, ptr %c ; <i8> [#uses=1]
%tmp28.upgrd.15 = sext i8 %tmp28 to i32 ; <i32> [#uses=1]
%tmp2829 = trunc i32 %tmp28.upgrd.15 to i8 ; <i8> [#uses=1]
- call void @charsequence_push( %struct.charsequence* %cs, i8 %tmp2829 )
- store i32 1, i32* %wstate
+ call void @charsequence_push( ptr %cs, i8 %tmp2829 )
+ store i32 1, ptr %wstate
br label %cond_next30
cond_next30: ; preds = %cond_true27, %cond_true24
br label %cond_next31
cond_next32: ; preds = %cond_next31, %bb21
br label %bb33
bb33: ; preds = %cond_next32, %entry
- %tmp34 = load %struct.FILE*, %struct.FILE** %f_addr ; <%struct.FILE*> [#uses=1]
- %tmp35 = call i32 @feof( %struct.FILE* %tmp34 ) ; <i32> [#uses=1]
+ %tmp34 = load ptr, ptr %f_addr ; <ptr> [#uses=1]
+ %tmp35 = call i32 @feof( ptr %tmp34 ) ; <i32> [#uses=1]
%tmp36 = icmp eq i32 %tmp35, 0 ; <i1> [#uses=1]
br i1 %tmp36, label %bb, label %bb37
bb37: ; preds = %bb33
; CHECK-NOT: invoke
-declare i32 @func(i8*) nounwind
+declare i32 @func(ptr) nounwind
-define i32 @test() personality i32 (...)* @__gxx_personality_v0 {
- invoke i32 @func( i8* null )
+define i32 @test() personality ptr @__gxx_personality_v0 {
+ invoke i32 @func( ptr null )
to label %Cont unwind label %Other ; <i32>:1 [#uses=0]
Cont: ; preds = %0
ret i32 0
Other: ; preds = %0
- landingpad { i8*, i32 }
- catch i8* null
+ landingpad { ptr, i32 }
+ catch ptr null
ret i32 1
}
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
-@G = weak global i32 0, align 8 ; <i32*> [#uses=2]
+@G = weak global i32 0, align 8 ; <ptr> [#uses=2]
define void @test(i32 %X, i32 %Y, i32 %Z) {
entry:
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- %tmp = load i32, i32* @G, align 8 ; <i32> [#uses=2]
+ %tmp = load i32, ptr @G, align 8 ; <i32> [#uses=2]
%tmp3 = icmp eq i32 %X, %Y ; <i1> [#uses=1]
%tmp34 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
%toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1]
cond_next: ; preds = %cond_true, %entry
; CHECK: = phi i32
%F.0 = phi i32 [ %tmp, %entry ], [ %tmp7, %cond_true ] ; <i32> [#uses=1]
- store i32 %F.0, i32* @G, align 8
+ store i32 %F.0, ptr @G, align 8
ret void
}
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
-@g_37 = common global i32 0 ; <i32*> [#uses=1]
-@.str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+@g_37 = common global i32 0 ; <ptr> [#uses=1]
+@.str = internal constant [4 x i8] c"%d\0A\00" ; <ptr> [#uses=1]
define i32 @main() nounwind {
; CHECK-LABEL: @main(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L:%.*]] = load i32, i32* @g_37, align 4
+; CHECK-NEXT: [[L:%.*]] = load i32, ptr @g_37, align 4
; CHECK-NEXT: [[CMPA:%.*]] = icmp ne i32 [[L]], 0
; CHECK-NEXT: [[CMPB:%.*]] = icmp eq i1 [[CMPA]], false
; CHECK-NEXT: [[OUTVAL_SEL:%.*]] = select i1 [[CMPA]], i32 1, i32 0
; CHECK-NEXT: [[OUTVAL_SEL_MUX:%.*]] = select i1 [[OR_COND]], i32 [[OUTVAL_SEL]], i32 2
; CHECK-NEXT: br i1 [[BRMERGE]], label [[FUNC_1_EXIT:%.*]], label [[INFLOOP:%.*]]
; CHECK: func_1.exit:
-; CHECK-NEXT: [[POUT:%.*]] = tail call i32 (i8*, ...) @printf(i8* noalias getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 [[OUTVAL_SEL_MUX]]) #[[ATTR0:[0-9]+]]
+; CHECK-NEXT: [[POUT:%.*]] = tail call i32 (ptr, ...) @printf(ptr noalias @.str, i32 [[OUTVAL_SEL_MUX]]) #[[ATTR0:[0-9]+]]
; CHECK-NEXT: ret i32 0
; CHECK: infloop:
; CHECK-NEXT: br label [[INFLOOP]]
;
entry:
- %l = load i32, i32* @g_37, align 4 ; <i32> [#uses=1]
+ %l = load i32, ptr @g_37, align 4 ; <i32> [#uses=1]
%cmpa = icmp ne i32 %l, 0 ; <i1> [#uses=3]
br i1 %cmpa, label %func_1.exit, label %mooseblock
func_1.exit: ; preds = %cowblock, %entry
%outval = phi i32 [ %cowval, %cowblock ], [ 1, %entry ] ; <i32> [#uses=1]
- %pout = tail call i32 (i8*, ...) @printf( i8* noalias getelementptr ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %outval ) nounwind ; <i32> [#uses=0]
+ %pout = tail call i32 (ptr, ...) @printf( ptr noalias @.str, i32 %outval ) nounwind ; <i32> [#uses=0]
ret i32 0
}
-declare i32 @printf(i8*, ...) nounwind
+declare i32 @printf(ptr, ...) nounwind
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -disable-output
; PR 2777
-@g_103 = common global i32 0 ; <i32*> [#uses=1]
+@g_103 = common global i32 0 ; <ptr> [#uses=1]
define i32 @func_127(i32 %p_129) nounwind {
entry:
- load i32, i32* @g_103, align 4 ; <i32>:0 [#uses=1]
+ load i32, ptr @g_103, align 4 ; <i32>:0 [#uses=1]
icmp eq i32 %0, 0 ; <i1>:1 [#uses=2]
br i1 %1, label %bb6.preheader, label %entry.return_crit_edge
; RUN: opt < %s -passes=simplifycfg
; PR2855
-define i32 @_Z1fPii(i32* %b, i32 %f) nounwind {
+define i32 @_Z1fPii(ptr %b, i32 %f) nounwind {
entry:
br label %bb
module asm "_foo: ret"
module asm ".globl _i"
module asm ".set _i, 0"
-@i = extern_weak global i32 ; <i32*> [#uses=2]
-@j = common global i32 0 ; <i32*> [#uses=1]
-@ed = common global double 0.000000e+00, align 8 ; <double*> [#uses=1]
+@i = extern_weak global i32 ; <ptr> [#uses=2]
+@j = common global i32 0 ; <ptr> [#uses=1]
+@ed = common global double 0.000000e+00, align 8 ; <ptr> [#uses=1]
define i32 @main() nounwind ssp {
; CHECK-LABEL: @main(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[BB4:%.*]]
; CHECK: bb:
-; CHECK-NEXT: br i1 icmp ne (i32* @i, i32* null), label [[BB1:%.*]], label [[BB3:%.*]]
+; CHECK-NEXT: br i1 icmp ne (ptr @i, ptr null), label [[BB1:%.*]], label [[BB3:%.*]]
; CHECK: bb1:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ [[TMP0]], [[BB1]] ], [ 0, [[BB:%.*]] ]
-; CHECK-NEXT: store i32 [[STOREMERGE]], i32* @j, align 4
+; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @j, align 4
; CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[STOREMERGE]] to double
; CHECK-NEXT: [[TMP2:%.*]] = call double @sin(double [[TMP1]]) #[[ATTR1:[0-9]+]]
; CHECK-NEXT: [[TMP3:%.*]] = fadd double [[TMP2]], [[D_0:%.*]]
; CHECK-NEXT: [[TMP5:%.*]] = icmp sgt i32 [[L_0]], 99
; CHECK-NEXT: br i1 [[TMP5]], label [[BB5:%.*]], label [[BB]]
; CHECK: bb5:
-; CHECK-NEXT: store double [[D_0]], double* @ed, align 8
+; CHECK-NEXT: store double [[D_0]], ptr @ed, align 8
; CHECK-NEXT: ret i32 0
;
entry:
br label %bb4
bb: ; preds = %bb4
- br i1 icmp ne (i32* @i, i32* null), label %bb1, label %bb2
+ br i1 icmp ne (ptr @i, ptr null), label %bb1, label %bb2
bb1: ; preds = %bb
- %0 = load i32, i32* @i, align 4 ; <i32> [#uses=1]
+ %0 = load i32, ptr @i, align 4 ; <i32> [#uses=1]
br label %bb3
bb2: ; preds = %bb
bb3: ; preds = %bb2, %bb1
%storemerge = phi i32 [ %0, %bb1 ], [ 0, %bb2 ] ; <i32> [#uses=2]
- store i32 %storemerge, i32* @j
+ store i32 %storemerge, ptr @j
%1 = sitofp i32 %storemerge to double ; <double> [#uses=1]
%2 = call double @sin(double %1) nounwind readonly ; <double> [#uses=1]
%3 = fadd double %2, %d.0 ; <double> [#uses=1]
br i1 %5, label %bb5, label %bb
bb5: ; preds = %bb4
- store double %d.0, double* @ed, align 8
+ store double %d.0, ptr @ed, align 8
ret i32 0
}
; the transformations done by SimplifyCFG, so this test is likely to rot
; quickly.
-define noalias i8* @func_29() nounwind {
+define noalias ptr @func_29() nounwind {
; CHECK: entry:
; CHECK-NEXT: unreachable
entry:
declare void @bar()
-define i32 @foo() personality i32 (i32, i64, i8*, i8*)* @__gxx_personality_v0 {
+define i32 @foo() personality ptr @__gxx_personality_v0 {
entry:
invoke void @bar()
to label %return unwind label %lpad
ret i32 0
lpad:
- %lp = landingpad { i8*, i32 }
+ %lp = landingpad { ptr, i32 }
cleanup
- resume { i8*, i32 } %lp
+ resume { ptr, i32 } %lp
}
-declare i32 @__gxx_personality_v0(i32, i64, i8*, i8*)
+declare i32 @__gxx_personality_v0(i32, i64, ptr, ptr)
; ModuleID = 't.cc'
; Function Attrs: nounwind
-define double @_Z3fooRdS_S_S_(double* dereferenceable(8) %x, double* dereferenceable(8) %y, double* dereferenceable(8) %a) #0 {
+define double @_Z3fooRdS_S_S_(ptr dereferenceable(8) %x, ptr dereferenceable(8) %y, ptr dereferenceable(8) %a) #0 {
entry:
- %0 = load double, double* %y, align 8
+ %0 = load double, ptr %y, align 8
%cmp = fcmp oeq double %0, 0.000000e+00
- %1 = load double, double* %x, align 8
+ %1 = load double, ptr %x, align 8
br i1 %cmp, label %if.then, label %if.else
; fadd (const, (fmul x, y))
; CHECK-LABEL: if.then:
; CHECK: %3 = fmul fast double %1, %2
; CHECK-NEXT: %mul = fadd fast double 1.000000e+00, %3
- %2 = load double, double* %a, align 8
+ %2 = load double, ptr %a, align 8
%3 = fmul fast double %1, %2
%mul = fadd fast double 1.000000e+00, %3
- store double %mul, double* %y, align 8
+ store double %mul, ptr %y, align 8
br label %if.end
; fsub ((fmul x, y), z)
; CHECK-LABEL: if.else:
; CHECK: %mul1 = fmul fast double %1, %2
; CHECK-NEXT: %sub1 = fsub fast double %mul1, %0
- %4 = load double, double* %a, align 8
+ %4 = load double, ptr %a, align 8
%mul1 = fmul fast double %1, %4
%sub1 = fsub fast double %mul1, %0
- %gep1 = getelementptr double, double* %y, i32 1
- store double %sub1, double* %gep1, align 8
+ %gep1 = getelementptr double, ptr %y, i32 1
+ store double %sub1, ptr %gep1, align 8
br label %if.end
if.end: ; preds = %if.else, %if.then
- %5 = load double, double* %y, align 8
+ %5 = load double, ptr %y, align 8
%cmp2 = fcmp oeq double %5, 2.000000e+00
- %6 = load double, double* %x, align 8
+ %6 = load double, ptr %x, align 8
br i1 %cmp2, label %if.then2, label %if.else2
; fsub (x, (fmul y, z))
; CHECK-LABEL: if.then2:
; CHECK: %7 = fmul fast double %5, 3.000000e+00
; CHECK-NEXT: %mul2 = fsub fast double %6, %7
- %7 = load double, double* %a, align 8
+ %7 = load double, ptr %a, align 8
%8 = fmul fast double %6, 3.0000000e+00
%mul2 = fsub fast double %7, %8
- store double %mul2, double* %y, align 8
+ store double %mul2, ptr %y, align 8
br label %if.end2
; fsub (fneg((fmul x, y)), const)
%mul3 = fmul fast double %6, 3.0000000e+00
%neg = fsub fast double 0.0000000e+00, %mul3
%sub2 = fsub fast double %neg, 3.0000000e+00
- store double %sub2, double* %y, align 8
+ store double %sub2, ptr %y, align 8
br label %if.end2
if.end2: ; preds = %if.else, %if.then
- %9 = load double, double* %x, align 8
- %10 = load double, double* %y, align 8
+ %9 = load double, ptr %x, align 8
+ %10 = load double, ptr %y, align 8
%add = fadd fast double %9, %10
- %11 = load double, double* %a, align 8
+ %11 = load double, ptr %a, align 8
%add2 = fadd fast double %add, %11
ret double %add2
}
; RUN: opt -mtriple=thumbv8a %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB
; RUN: opt -mtriple=armv8a %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s --check-prefix=CHECK --check-prefix=ARM
-define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) {
+define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[D:%.*]], 3
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_FALSE:%.*]], label [[COND_END:%.*]]
; CHECK: cond.false:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; CHECK-NEXT: br label [[COND_END]]
; CHECK: cond.end:
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.false, label %cond.end
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @foo_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) #0 {
+define i32 @foo_minsize(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) #0 {
; CHECK-LABEL: @foo_minsize(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[D:%.*]], 3
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_FALSE:%.*]], label [[COND_END:%.*]]
; CHECK: cond.false:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; CHECK-NEXT: br label [[COND_END]]
; CHECK: cond.end:
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.false, label %cond.end
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @foo_minsize_i64(i64 %a, i64 %b, i64 %c, i64 %d, i32* %input) #0 {
+define i32 @foo_minsize_i64(i64 %a, i64 %b, i64 %c, i64 %d, ptr %input) #0 {
; CHECK-LABEL: @foo_minsize_i64(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[D:%.*]], 3
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_FALSE:%.*]], label [[COND_END:%.*]]
; CHECK: cond.false:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; CHECK-NEXT: br label [[COND_END]]
; CHECK: cond.end:
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.false, label %cond.end
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @or_predicate(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) {
+define i32 @or_predicate(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
; CHECK-LABEL: @or_predicate(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 3
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; CHECK-NEXT: br label [[COND_END]]
; CHECK: cond.end:
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.end, label %cond.false
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @or_invert_predicate(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) {
+define i32 @or_invert_predicate(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
; CHECK-LABEL: @or_invert_predicate(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[D:%.*]], 3
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; CHECK-NEXT: br label [[COND_END]]
; CHECK: cond.end:
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.end, label %cond.false
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @or_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) #0 {
+define i32 @or_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) #0 {
; THUMB-LABEL: @or_predicate_minsize(
; THUMB-NEXT: entry:
; THUMB-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 3
; THUMB-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
; THUMB-NEXT: br i1 [[CMP1]], label [[COND_END]], label [[COND_FALSE:%.*]]
; THUMB: cond.false:
-; THUMB-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; THUMB-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; THUMB-NEXT: br label [[COND_END]]
; THUMB: cond.end:
; THUMB-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[LOR_LHS_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
; ARM-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
; ARM-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; ARM: cond.false:
-; ARM-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; ARM-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; ARM-NEXT: br label [[COND_END]]
; ARM: cond.end:
; ARM-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.end, label %cond.false
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @or_invert_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) #0 {
+define i32 @or_invert_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) #0 {
; THUMB-LABEL: @or_invert_predicate_minsize(
; THUMB-NEXT: entry:
; THUMB-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 3
; THUMB-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
; THUMB-NEXT: br i1 [[CMP1]], label [[COND_END]], label [[COND_FALSE:%.*]]
; THUMB: cond.false:
-; THUMB-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; THUMB-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; THUMB-NEXT: br label [[COND_END]]
; THUMB: cond.end:
; THUMB-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[LOR_LHS_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
; ARM-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
; ARM-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; ARM: cond.false:
-; ARM-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; ARM-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; ARM-NEXT: br label [[COND_END]]
; ARM: cond.end:
; ARM-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.end, label %cond.false
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @or_xor_predicate(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input, i1 %cmp) {
+define i32 @or_xor_predicate(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input, i1 %cmp) {
; CHECK-LABEL: @or_xor_predicate(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_NOT:%.*]] = xor i1 [[CMP:%.*]], true
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP_NOT]], i1 true, i1 [[CMP1]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; CHECK-NEXT: br label [[COND_END]]
; CHECK: cond.end:
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.end, label %cond.false
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @or_xor_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input, i1 %cmp) #0 {
+define i32 @or_xor_predicate_minsize(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input, i1 %cmp) #0 {
; THUMB-LABEL: @or_xor_predicate_minsize(
; THUMB-NEXT: entry:
; THUMB-NEXT: br i1 [[CMP:%.*]], label [[LOR_LHS_FALSE:%.*]], label [[COND_END:%.*]]
; THUMB-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
; THUMB-NEXT: br i1 [[CMP1]], label [[COND_END]], label [[COND_FALSE:%.*]]
; THUMB: cond.false:
-; THUMB-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; THUMB-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; THUMB-NEXT: br label [[COND_END]]
; THUMB: cond.end:
; THUMB-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[LOR_LHS_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
; ARM-NEXT: [[OR_COND:%.*]] = select i1 [[CMP_NOT]], i1 true, i1 [[CMP1]]
; ARM-NEXT: br i1 [[OR_COND]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; ARM: cond.false:
-; ARM-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; ARM-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; ARM-NEXT: br label [[COND_END]]
; ARM: cond.end:
; ARM-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.end, label %cond.false
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @and_xor(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input, i1 %cmp) {
+define i32 @and_xor(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input, i1 %cmp) {
; CHECK-LABEL: @and_xor(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_NOT:%.*]] = xor i1 [[CMP:%.*]], true
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP_NOT]], i1 [[CMP1]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[COND_FALSE:%.*]], label [[COND_END:%.*]]
; CHECK: cond.false:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; CHECK-NEXT: br label [[COND_END]]
; CHECK: cond.end:
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.false, label %cond.end
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
ret i32 %cond
}
-define i32 @and_xor_minsize(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input, i1 %cmp) #0 {
+define i32 @and_xor_minsize(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input, i1 %cmp) #0 {
; THUMB-LABEL: @and_xor_minsize(
; THUMB-NEXT: entry:
; THUMB-NEXT: br i1 [[CMP:%.*]], label [[COND_END:%.*]], label [[LOR_LHS_FALSE:%.*]]
; THUMB-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B:%.*]]
; THUMB-NEXT: br i1 [[CMP1]], label [[COND_FALSE:%.*]], label [[COND_END]]
; THUMB: cond.false:
-; THUMB-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; THUMB-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; THUMB-NEXT: br label [[COND_END]]
; THUMB: cond.end:
; THUMB-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[LOR_LHS_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
; ARM-NEXT: [[OR_COND:%.*]] = select i1 [[CMP_NOT]], i1 [[CMP1]], i1 false
; ARM-NEXT: br i1 [[OR_COND]], label [[COND_FALSE:%.*]], label [[COND_END:%.*]]
; ARM: cond.false:
-; ARM-NEXT: [[TMP0:%.*]] = load i32, i32* [[INPUT:%.*]], align 4
+; ARM-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT:%.*]], align 4
; ARM-NEXT: br label [[COND_END]]
; ARM: cond.end:
; ARM-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %cmp1, label %cond.false, label %cond.end
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
; Test that the phis from for.inc.preheader aren't hoisted into sw.bb92 because
; the cost is too great - we can make a better decision later on.
; FIXME: The Arm cost model needs to be updated for SizeAndLatency.
-define i32 @multiple_spec_select_costs(i8* %a, i32* %idx, i8 %in) {
+define i32 @multiple_spec_select_costs(ptr %a, ptr %idx, i8 %in) {
; V8M-LABEL: @multiple_spec_select_costs(
; V8M-NEXT: entry:
-; V8M-NEXT: [[GEP_A_2:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i32 2
-; V8M-NEXT: [[INCDEC_PTR109_C4:%.*]] = getelementptr inbounds i8, i8* [[A]], i32 3
+; V8M-NEXT: [[GEP_A_2:%.*]] = getelementptr inbounds i8, ptr [[A:%.*]], i32 2
+; V8M-NEXT: [[INCDEC_PTR109_C4:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 3
; V8M-NEXT: [[ZERO:%.*]] = icmp ne i8 [[IN:%.*]], 0
; V8M-NEXT: br i1 [[ZERO]], label [[FOR_INC_PREHEADER:%.*]], label [[SW_BB92:%.*]]
; V8M: sw.bb92:
; V8M-NEXT: [[SPEC_SELECT1:%.*]] = select i1 [[UGT_9]], i32 1, i32 7
; V8M-NEXT: br label [[FOR_INC_PREHEADER]]
; V8M: for.inc.preheader:
-; V8M-NEXT: [[STR_PH_0:%.*]] = phi i8* [ [[GEP_A_2]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR109_C4]], [[SW_BB92]] ]
+; V8M-NEXT: [[STR_PH_0:%.*]] = phi ptr [ [[GEP_A_2]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR109_C4]], [[SW_BB92]] ]
; V8M-NEXT: [[CMP:%.*]] = phi i1 [ false, [[ENTRY]] ], [ [[SPEC_SELECT]], [[SW_BB92]] ]
; V8M-NEXT: [[PHI_RES:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[SPEC_SELECT1]], [[SW_BB92]] ]
; V8M-NEXT: br label [[FOR_INC:%.*]]
; V8M: for.inc:
-; V8M-NEXT: [[STR_PH_1:%.*]] = phi i8* [ [[INCDEC_PTR109:%.*]], [[FOR_BODY:%.*]] ], [ [[STR_PH_0]], [[FOR_INC_PREHEADER]] ]
-; V8M-NEXT: [[INCDEC_PTR109]] = getelementptr inbounds i8, i8* [[STR_PH_1]], i32 1
-; V8M-NEXT: [[LOAD_1:%.*]] = load i8, i8* [[INCDEC_PTR109]], align 1
+; V8M-NEXT: [[STR_PH_1:%.*]] = phi ptr [ [[INCDEC_PTR109:%.*]], [[FOR_BODY:%.*]] ], [ [[STR_PH_0]], [[FOR_INC_PREHEADER]] ]
+; V8M-NEXT: [[INCDEC_PTR109]] = getelementptr inbounds i8, ptr [[STR_PH_1]], i32 1
+; V8M-NEXT: [[LOAD_1:%.*]] = load i8, ptr [[INCDEC_PTR109]], align 1
; V8M-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[LOAD_1]], 0
; V8M-NEXT: [[AND:%.*]] = and i1 [[CMP]], [[TOBOOL]]
; V8M-NEXT: br i1 [[AND]], label [[FOR_BODY]], label [[EXIT:%.*]]
;
; V8A-LABEL: @multiple_spec_select_costs(
; V8A-NEXT: entry:
-; V8A-NEXT: [[GEP_A_2:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i32 2
-; V8A-NEXT: [[INCDEC_PTR109_C4:%.*]] = getelementptr inbounds i8, i8* [[A]], i32 3
+; V8A-NEXT: [[GEP_A_2:%.*]] = getelementptr inbounds i8, ptr [[A:%.*]], i32 2
+; V8A-NEXT: [[INCDEC_PTR109_C4:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 3
; V8A-NEXT: [[ZERO:%.*]] = icmp ne i8 [[IN:%.*]], 0
; V8A-NEXT: br i1 [[ZERO]], label [[FOR_INC_PREHEADER:%.*]], label [[SW_BB92:%.*]]
; V8A: sw.bb92:
; V8A-NEXT: [[SPEC_SELECT1:%.*]] = select i1 [[UGT_9]], i32 1, i32 7
; V8A-NEXT: br label [[FOR_INC_PREHEADER]]
; V8A: for.inc.preheader:
-; V8A-NEXT: [[STR_PH_0:%.*]] = phi i8* [ [[GEP_A_2]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR109_C4]], [[SW_BB92]] ]
+; V8A-NEXT: [[STR_PH_0:%.*]] = phi ptr [ [[GEP_A_2]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR109_C4]], [[SW_BB92]] ]
; V8A-NEXT: [[CMP:%.*]] = phi i1 [ false, [[ENTRY]] ], [ [[SPEC_SELECT]], [[SW_BB92]] ]
; V8A-NEXT: [[PHI_RES:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[SPEC_SELECT1]], [[SW_BB92]] ]
; V8A-NEXT: br label [[FOR_INC:%.*]]
; V8A: for.inc:
-; V8A-NEXT: [[STR_PH_1:%.*]] = phi i8* [ [[INCDEC_PTR109:%.*]], [[FOR_BODY:%.*]] ], [ [[STR_PH_0]], [[FOR_INC_PREHEADER]] ]
-; V8A-NEXT: [[INCDEC_PTR109]] = getelementptr inbounds i8, i8* [[STR_PH_1]], i32 1
-; V8A-NEXT: [[LOAD_1:%.*]] = load i8, i8* [[INCDEC_PTR109]], align 1
+; V8A-NEXT: [[STR_PH_1:%.*]] = phi ptr [ [[INCDEC_PTR109:%.*]], [[FOR_BODY:%.*]] ], [ [[STR_PH_0]], [[FOR_INC_PREHEADER]] ]
+; V8A-NEXT: [[INCDEC_PTR109]] = getelementptr inbounds i8, ptr [[STR_PH_1]], i32 1
+; V8A-NEXT: [[LOAD_1:%.*]] = load i8, ptr [[INCDEC_PTR109]], align 1
; V8A-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[LOAD_1]], 0
; V8A-NEXT: [[AND:%.*]] = and i1 [[CMP]], [[TOBOOL]]
; V8A-NEXT: br i1 [[AND]], label [[FOR_BODY]], label [[EXIT:%.*]]
; V8A-NEXT: ret i32 [[PHI_RES]]
;
entry:
- %gep.a.2 = getelementptr inbounds i8, i8* %a, i32 2
- %incdec.ptr109.c4 = getelementptr inbounds i8, i8* %a, i32 3
+ %gep.a.2 = getelementptr inbounds i8, ptr %a, i32 2
+ %incdec.ptr109.c4 = getelementptr inbounds i8, ptr %a, i32 3
%zero = icmp ne i8 %in, 0
br i1 %zero , label %for.inc.preheader, label %sw.bb92
br label %for.inc.preheader
for.inc.preheader:
- %str.ph.0 = phi i8* [ %incdec.ptr109.c4, %select.unfold198 ], [ %incdec.ptr109.c4, %sw.bb92 ], [ %gep.a.2, %entry ]
+ %str.ph.0 = phi ptr [ %incdec.ptr109.c4, %select.unfold198 ], [ %incdec.ptr109.c4, %sw.bb92 ], [ %gep.a.2, %entry ]
%cmp = phi i1 [ true, %select.unfold198 ], [ false, %sw.bb92 ], [ false, %entry ]
%phi.res = phi i32 [ 7, %select.unfold198 ], [ 1, %sw.bb92 ], [ 1, %entry ]
br label %for.inc
for.inc:
- %str.ph.1 = phi i8* [ %incdec.ptr109, %for.body ], [ %str.ph.0, %for.inc.preheader ]
- %incdec.ptr109 = getelementptr inbounds i8, i8* %str.ph.1, i32 1
- %load.1 = load i8, i8* %incdec.ptr109, align 1
+ %str.ph.1 = phi ptr [ %incdec.ptr109, %for.body ], [ %str.ph.0, %for.inc.preheader ]
+ %incdec.ptr109 = getelementptr inbounds i8, ptr %str.ph.1, i32 1
+ %load.1 = load i8, ptr %incdec.ptr109, align 1
%tobool = icmp ne i8 %load.1, 0
%and = and i1 %cmp, %tobool
br i1 %and, label %for.body, label %exit
ret i32 %phi.res
}
-define i32 @multiple_spec_select_costs_minsize(i8* %a, i32* %idx, i8 %in) #0 {
+define i32 @multiple_spec_select_costs_minsize(ptr %a, ptr %idx, i8 %in) #0 {
; V8M-LABEL: @multiple_spec_select_costs_minsize(
; V8M-NEXT: entry:
-; V8M-NEXT: [[GEP_A_2:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i32 2
-; V8M-NEXT: [[INCDEC_PTR109_C4:%.*]] = getelementptr inbounds i8, i8* [[A]], i32 3
+; V8M-NEXT: [[GEP_A_2:%.*]] = getelementptr inbounds i8, ptr [[A:%.*]], i32 2
+; V8M-NEXT: [[INCDEC_PTR109_C4:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 3
; V8M-NEXT: [[ZERO:%.*]] = icmp ne i8 [[IN:%.*]], 0
; V8M-NEXT: br i1 [[ZERO]], label [[FOR_INC_PREHEADER:%.*]], label [[SW_BB92:%.*]]
; V8M: sw.bb92:
; V8M: select.unfold198:
; V8M-NEXT: br label [[FOR_INC_PREHEADER]]
; V8M: for.inc.preheader:
-; V8M-NEXT: [[STR_PH_0:%.*]] = phi i8* [ [[INCDEC_PTR109_C4]], [[SELECT_UNFOLD198]] ], [ [[INCDEC_PTR109_C4]], [[SW_BB92]] ], [ [[GEP_A_2]], [[ENTRY:%.*]] ]
+; V8M-NEXT: [[STR_PH_0:%.*]] = phi ptr [ [[INCDEC_PTR109_C4]], [[SELECT_UNFOLD198]] ], [ [[INCDEC_PTR109_C4]], [[SW_BB92]] ], [ [[GEP_A_2]], [[ENTRY:%.*]] ]
; V8M-NEXT: [[CMP:%.*]] = phi i1 [ true, [[SELECT_UNFOLD198]] ], [ false, [[SW_BB92]] ], [ false, [[ENTRY]] ]
; V8M-NEXT: [[PHI_RES:%.*]] = phi i32 [ 7, [[SELECT_UNFOLD198]] ], [ 1, [[SW_BB92]] ], [ 1, [[ENTRY]] ]
; V8M-NEXT: br label [[FOR_INC:%.*]]
; V8M: for.inc:
-; V8M-NEXT: [[STR_PH_1:%.*]] = phi i8* [ [[INCDEC_PTR109:%.*]], [[FOR_BODY:%.*]] ], [ [[STR_PH_0]], [[FOR_INC_PREHEADER]] ]
-; V8M-NEXT: [[INCDEC_PTR109]] = getelementptr inbounds i8, i8* [[STR_PH_1]], i32 1
-; V8M-NEXT: [[LOAD_1:%.*]] = load i8, i8* [[INCDEC_PTR109]], align 1
+; V8M-NEXT: [[STR_PH_1:%.*]] = phi ptr [ [[INCDEC_PTR109:%.*]], [[FOR_BODY:%.*]] ], [ [[STR_PH_0]], [[FOR_INC_PREHEADER]] ]
+; V8M-NEXT: [[INCDEC_PTR109]] = getelementptr inbounds i8, ptr [[STR_PH_1]], i32 1
+; V8M-NEXT: [[LOAD_1:%.*]] = load i8, ptr [[INCDEC_PTR109]], align 1
; V8M-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[LOAD_1]], 0
; V8M-NEXT: [[AND:%.*]] = and i1 [[CMP]], [[TOBOOL]]
; V8M-NEXT: br i1 [[AND]], label [[FOR_BODY]], label [[EXIT:%.*]]
;
; V8A-LABEL: @multiple_spec_select_costs_minsize(
; V8A-NEXT: entry:
-; V8A-NEXT: [[GEP_A_2:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i32 2
-; V8A-NEXT: [[INCDEC_PTR109_C4:%.*]] = getelementptr inbounds i8, i8* [[A]], i32 3
+; V8A-NEXT: [[GEP_A_2:%.*]] = getelementptr inbounds i8, ptr [[A:%.*]], i32 2
+; V8A-NEXT: [[INCDEC_PTR109_C4:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 3
; V8A-NEXT: [[ZERO:%.*]] = icmp ne i8 [[IN:%.*]], 0
; V8A-NEXT: br i1 [[ZERO]], label [[FOR_INC_PREHEADER:%.*]], label [[SW_BB92:%.*]]
; V8A: sw.bb92:
; V8A-NEXT: [[SPEC_SELECT1:%.*]] = select i1 [[UGT_9]], i32 1, i32 7
; V8A-NEXT: br label [[FOR_INC_PREHEADER]]
; V8A: for.inc.preheader:
-; V8A-NEXT: [[STR_PH_0:%.*]] = phi i8* [ [[GEP_A_2]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR109_C4]], [[SW_BB92]] ]
+; V8A-NEXT: [[STR_PH_0:%.*]] = phi ptr [ [[GEP_A_2]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR109_C4]], [[SW_BB92]] ]
; V8A-NEXT: [[CMP:%.*]] = phi i1 [ false, [[ENTRY]] ], [ [[SPEC_SELECT]], [[SW_BB92]] ]
; V8A-NEXT: [[PHI_RES:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[SPEC_SELECT1]], [[SW_BB92]] ]
; V8A-NEXT: br label [[FOR_INC:%.*]]
; V8A: for.inc:
-; V8A-NEXT: [[STR_PH_1:%.*]] = phi i8* [ [[INCDEC_PTR109:%.*]], [[FOR_BODY:%.*]] ], [ [[STR_PH_0]], [[FOR_INC_PREHEADER]] ]
-; V8A-NEXT: [[INCDEC_PTR109]] = getelementptr inbounds i8, i8* [[STR_PH_1]], i32 1
-; V8A-NEXT: [[LOAD_1:%.*]] = load i8, i8* [[INCDEC_PTR109]], align 1
+; V8A-NEXT: [[STR_PH_1:%.*]] = phi ptr [ [[INCDEC_PTR109:%.*]], [[FOR_BODY:%.*]] ], [ [[STR_PH_0]], [[FOR_INC_PREHEADER]] ]
+; V8A-NEXT: [[INCDEC_PTR109]] = getelementptr inbounds i8, ptr [[STR_PH_1]], i32 1
+; V8A-NEXT: [[LOAD_1:%.*]] = load i8, ptr [[INCDEC_PTR109]], align 1
; V8A-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[LOAD_1]], 0
; V8A-NEXT: [[AND:%.*]] = and i1 [[CMP]], [[TOBOOL]]
; V8A-NEXT: br i1 [[AND]], label [[FOR_BODY]], label [[EXIT:%.*]]
; V8A-NEXT: ret i32 [[PHI_RES]]
;
entry:
- %gep.a.2 = getelementptr inbounds i8, i8* %a, i32 2
- %incdec.ptr109.c4 = getelementptr inbounds i8, i8* %a, i32 3
+ %gep.a.2 = getelementptr inbounds i8, ptr %a, i32 2
+ %incdec.ptr109.c4 = getelementptr inbounds i8, ptr %a, i32 3
%zero = icmp ne i8 %in, 0
br i1 %zero , label %for.inc.preheader, label %sw.bb92
br label %for.inc.preheader
for.inc.preheader:
- %str.ph.0 = phi i8* [ %incdec.ptr109.c4, %select.unfold198 ], [ %incdec.ptr109.c4, %sw.bb92 ], [ %gep.a.2, %entry ]
+ %str.ph.0 = phi ptr [ %incdec.ptr109.c4, %select.unfold198 ], [ %incdec.ptr109.c4, %sw.bb92 ], [ %gep.a.2, %entry ]
%cmp = phi i1 [ true, %select.unfold198 ], [ false, %sw.bb92 ], [ false, %entry ]
%phi.res = phi i32 [ 7, %select.unfold198 ], [ 1, %sw.bb92 ], [ 1, %entry ]
br label %for.inc
for.inc:
- %str.ph.1 = phi i8* [ %incdec.ptr109, %for.body ], [ %str.ph.0, %for.inc.preheader ]
- %incdec.ptr109 = getelementptr inbounds i8, i8* %str.ph.1, i32 1
- %load.1 = load i8, i8* %incdec.ptr109, align 1
+ %str.ph.1 = phi ptr [ %incdec.ptr109, %for.body ], [ %str.ph.0, %for.inc.preheader ]
+ %incdec.ptr109 = getelementptr inbounds i8, ptr %str.ph.1, i32 1
+ %load.1 = load i8, ptr %incdec.ptr109, align 1
%tobool = icmp ne i8 %load.1, 0
%and = and i1 %cmp, %tobool
br i1 %and, label %for.body, label %exit
ret double %cond
}
-define void @sqrt_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
+define void @sqrt_test(ptr addrspace(1) noalias nocapture %out, float %a) nounwind {
; CHECK-MVE-LABEL: @sqrt_test(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #3
; CHECK-MVE-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-MVE-NEXT: ret void
;
; CHECK-V8M-MAIN-LABEL: @sqrt_test(
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-MAIN-NEXT: ret void
;
; CHECK-V8M-BASE-LABEL: @sqrt_test(
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-BASE-NEXT: ret void
;
entry:
test_sqrt.exit: ; preds = %cond.else.i, %entry
%cond.i = phi afn float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @fabs_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
+define void @fabs_test(ptr addrspace(1) noalias nocapture %out, float %a) nounwind {
; CHECK-MVE-LABEL: @fabs_test(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #3
; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-MVE-NEXT: ret void
;
; CHECK-V8M-MAIN-LABEL: @fabs_test(
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-MAIN-NEXT: ret void
;
; CHECK-V8M-BASE-LABEL: @fabs_test(
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-BASE-NEXT: ret void
;
entry:
test_fabs.exit: ; preds = %cond.else.i, %entry
%cond.i = phi reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @fma_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
+define void @fma_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b, float %c) nounwind {
; CHECK-MVE-LABEL: @fma_test(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #3
; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-MVE-NEXT: ret void
;
; CHECK-V8M-MAIN-LABEL: @fma_test(
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-MAIN-NEXT: ret void
;
; CHECK-V8M-BASE-LABEL: @fma_test(
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-BASE-NEXT: ret void
;
entry:
test_fma.exit: ; preds = %cond.else.i, %entry
%cond.i = phi nsz reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @fmuladd_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
+define void @fmuladd_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b, float %c) nounwind {
; CHECK-MVE-LABEL: @fmuladd_test(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #3
; CHECK-MVE-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-MVE-NEXT: ret void
;
; CHECK-V8M-MAIN-LABEL: @fmuladd_test(
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-MAIN-NEXT: ret void
;
; CHECK-V8M-BASE-LABEL: @fmuladd_test(
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-BASE-NEXT: ret void
;
entry:
test_fmuladd.exit: ; preds = %cond.else.i, %entry
%cond.i = phi ninf float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @minnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
+define void @minnum_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b) nounwind {
; CHECK-MVE-LABEL: @minnum_test(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #3
; CHECK-MVE-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-MVE-NEXT: ret void
;
; CHECK-V8M-MAIN-LABEL: @minnum_test(
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-MAIN-NEXT: ret void
;
; CHECK-V8M-BASE-LABEL: @minnum_test(
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-BASE-NEXT: ret void
;
entry:
test_minnum.exit: ; preds = %cond.else.i, %entry
%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @maxnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
+define void @maxnum_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b) nounwind {
; CHECK-MVE-LABEL: @maxnum_test(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #3
; CHECK-MVE-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-MVE-NEXT: ret void
;
; CHECK-V8M-MAIN-LABEL: @maxnum_test(
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-MAIN-NEXT: ret void
;
; CHECK-V8M-BASE-LABEL: @maxnum_test(
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-BASE-NEXT: ret void
;
entry:
test_maxnum.exit: ; preds = %cond.else.i, %entry
%cond.i = phi ninf nsz float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @minimum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
+define void @minimum_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b) nounwind {
; CHECK-MVE-LABEL: @minimum_test(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #3
; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-MVE-NEXT: ret void
;
; CHECK-V8M-MAIN-LABEL: @minimum_test(
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-MAIN-NEXT: ret void
;
; CHECK-V8M-BASE-LABEL: @minimum_test(
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-BASE-NEXT: ret void
;
entry:
test_minimum.exit: ; preds = %cond.else.i, %entry
%cond.i = phi reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @maximum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
+define void @maximum_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b) nounwind {
; CHECK-MVE-LABEL: @maximum_test(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #3
; CHECK-MVE-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-MVE-NEXT: ret void
;
; CHECK-V8M-MAIN-LABEL: @maximum_test(
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-MAIN-NEXT: ret void
;
; CHECK-V8M-BASE-LABEL: @maximum_test(
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-V8M-BASE-NEXT: ret void
;
entry:
test_maximum.exit: ; preds = %cond.else.i, %entry
%cond.i = phi nsz float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
@g3 = external global i32, align 4
@g4 = external thread_local global i32, align 4
-define i32* @test3(i32 %n) {
+define ptr @test3(i32 %n) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[N:%.*]], label [[SW_DEFAULT:%.*]] [
; CHECK: sw.default:
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
-; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32* [ @g4, [[SW_DEFAULT]] ], [ getelementptr inbounds (i32, i32* inttoptr (i32 mul (i32 ptrtoint (i32* @g3 to i32), i32 2) to i32*), i32 1), [[SW_BB2]] ], [ @g2, [[SW_BB1]] ], [ @g1, [[ENTRY:%.*]] ]
-; CHECK-NEXT: ret i32* [[RETVAL_0]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = phi ptr [ @g4, [[SW_DEFAULT]] ], [ getelementptr inbounds (i32, ptr inttoptr (i32 mul (i32 ptrtoint (ptr @g3 to i32), i32 2) to ptr), i32 1), [[SW_BB2]] ], [ @g2, [[SW_BB1]] ], [ @g1, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret ptr [[RETVAL_0]]
;
entry:
switch i32 %n, label %sw.default [
br label %return
return:
- %retval.0 = phi i32* [ @g4, %sw.default ], [ getelementptr inbounds (i32, i32* inttoptr (i32 mul (i32 ptrtoint (i32* @g3 to i32), i32 2) to i32*), i32 1), %sw.bb2 ], [ @g2, %sw.bb1 ], [ @g1, %sw.bb ]
- ret i32* %retval.0
+ %retval.0 = phi ptr [ @g4, %sw.default ], [ getelementptr inbounds (i32, ptr inttoptr (i32 mul (i32 ptrtoint (ptr @g3 to i32), i32 2) to ptr), i32 1), %sw.bb2 ], [ @g2, %sw.bb1 ], [ @g1, %sw.bb ]
+ ret ptr %retval.0
}
; RUN: opt -S -passes='simplifycfg<switch-to-lookup>' -mtriple=arm -relocation-model=ropi-rwpi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
; CHECK: @{{.*}} = private unnamed_addr constant [3 x i32] [i32 1234, i32 5678, i32 15532]
-; ENABLE: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @c1, i32* @c2, i32* @c3]
-; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @c1, i32* @c2, i32* @c3]
-; ENABLE: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @g1, i32* @g2, i32* @g3]
-; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @g1, i32* @g2, i32* @g3]
-; ENABLE: @{{.*}} = private unnamed_addr constant [3 x i32 (i32, i32)*] [i32 (i32, i32)* @f1, i32 (i32, i32)* @f2, i32 (i32, i32)* @f3]
-; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32 (i32, i32)*] [i32 (i32, i32)* @f1, i32 (i32, i32)* @f2, i32 (i32, i32)* @f3]
+; ENABLE: @{{.*}} = private unnamed_addr constant [3 x ptr] [ptr @c1, ptr @c2, ptr @c3]
+; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x ptr] [ptr @c1, ptr @c2, ptr @c3]
+; ENABLE: @{{.*}} = private unnamed_addr constant [3 x ptr] [ptr @g1, ptr @g2, ptr @g3]
+; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x ptr] [ptr @g1, ptr @g2, ptr @g3]
+; ENABLE: @{{.*}} = private unnamed_addr constant [3 x ptr] [ptr @f1, ptr @f2, ptr @f3]
+; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x ptr] [ptr @f1, ptr @f2, ptr @f3]
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv7a--none-eabi"
@c4 = external constant i32, align 4
-define i32* @test2(i32 %n) {
+define ptr @test2(i32 %n) {
entry:
switch i32 %n, label %sw.default [
i32 0, label %sw.bb
br label %return
return:
- %retval.0 = phi i32* [ @c4, %sw.default ], [ @c3, %sw.bb2 ], [ @c2, %sw.bb1 ], [ @c1, %sw.bb ]
- ret i32* %retval.0
+ %retval.0 = phi ptr [ @c4, %sw.default ], [ @c3, %sw.bb2 ], [ @c2, %sw.bb1 ], [ @c1, %sw.bb ]
+ ret ptr %retval.0
}
@g1 = external global i32, align 4
@g3 = external global i32, align 4
@g4 = external global i32, align 4
-define i32* @test3(i32 %n) {
+define ptr @test3(i32 %n) {
entry:
switch i32 %n, label %sw.default [
i32 0, label %sw.bb
br label %return
return:
- %retval.0 = phi i32* [ @g4, %sw.default ], [ @g3, %sw.bb2 ], [ @g2, %sw.bb1 ], [ @g1, %sw.bb ]
- ret i32* %retval.0
+ %retval.0 = phi ptr [ @g4, %sw.default ], [ @g3, %sw.bb2 ], [ @g2, %sw.bb1 ], [ @g1, %sw.bb ]
+ ret ptr %retval.0
}
declare i32 @f1(i32, i32)
cond.false6:
%cmp7 = icmp eq i32 %a, 4
- %cond = select i1 %cmp7, i32 (i32, i32)* @f4, i32 (i32, i32)* @f5
+ %cond = select i1 %cmp7, ptr @f4, ptr @f5
br label %cond.end11
cond.end11:
- %cond12 = phi i32 (i32, i32)* [ @f1, %entry ], [ @f2, %cond.false ], [ %cond, %cond.false6 ], [ @f3, %cond.false3 ]
+ %cond12 = phi ptr [ @f1, %entry ], [ @f2, %cond.false ], [ %cond, %cond.false6 ], [ @f3, %cond.false3 ]
%call = call i32 %cond12(i32 %b, i32 %c) #2
ret i32 %call
}
declare void @foo()
-define void @cprop_test12(i32* %data) {
+define void @cprop_test12(ptr %data) {
bb0:
- %reg108 = load i32, i32* %data ; <i32> [#uses=2]
+ %reg108 = load i32, ptr %data ; <i32> [#uses=2]
%cond218 = icmp ne i32 %reg108, 5 ; <i1> [#uses=1]
br i1 %cond218, label %bb3, label %bb2
bb2: ; preds = %bb0
br label %bb3
bb3: ; preds = %bb2, %bb0
%reg117 = phi i32 [ 110, %bb2 ], [ %reg108, %bb0 ] ; <i32> [#uses=1]
- store i32 %reg117, i32* %data
+ store i32 %reg117, ptr %data
ret void
}
; Test merging of blocks with phi nodes where at least one incoming value
; in the successor is undef.
-define i8 @testundef2(i32 %u, i32* %A) {
+define i8 @testundef2(i32 %u, ptr %A) {
; CHECK-LABEL: @testundef2(
; CHECK-NEXT: V:
; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[U:%.*]], 3
; CHECK-NEXT: br i1 [[COND]], label [[Z:%.*]], label [[U:%.*]]
; CHECK: Z:
-; CHECK-NEXT: store i32 0, i32* [[A:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[A:%.*]], align 4
; CHECK-NEXT: br label [[U]]
; CHECK: U:
; CHECK-NEXT: ret i8 1
br label %U
Z:
- store i32 0, i32* %A, align 4
+ store i32 0, ptr %A, align 4
br label %X
X: ; preds = %V, %V, %Z
ret i8 %val.0
}
-define i8 @testmergesome(i32 %u, i32* %A) {
+define i8 @testmergesome(i32 %u, ptr %A) {
; CHECK-LABEL: @testmergesome(
; CHECK-NEXT: V:
; CHECK-NEXT: switch i32 [[U:%.*]], label [[Y:%.*]] [
; CHECK-NEXT: i32 3, label [[Z:%.*]]
; CHECK-NEXT: ]
; CHECK: W:
-; CHECK-NEXT: store i32 1, i32* [[A:%.*]], align 4
+; CHECK-NEXT: store i32 1, ptr [[A:%.*]], align 4
; CHECK-NEXT: br label [[Y]]
; CHECK: Z:
-; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
; CHECK-NEXT: br label [[Y]]
; CHECK: Y:
; CHECK-NEXT: [[VAL_0:%.*]] = phi i8 [ 2, [[W]] ], [ 1, [[Z]] ], [ 1, [[V:%.*]] ]
]
W: ; preds = %V
- store i32 1, i32* %A, align 4
+ store i32 1, ptr %A, align 4
br label %Y
Z:
- store i32 0, i32* %A, align 4
+ store i32 0, ptr %A, align 4
br label %X
X: ; preds = %V, %Z
}
-define i8 @testmergesome2(i32 %u, i32* %A) {
+define i8 @testmergesome2(i32 %u, ptr %A) {
; CHECK-LABEL: @testmergesome2(
; CHECK-NEXT: V:
; CHECK-NEXT: switch i32 [[U:%.*]], label [[W:%.*]] [
; CHECK-NEXT: i32 2, label [[Y]]
; CHECK-NEXT: ]
; CHECK: W:
-; CHECK-NEXT: store i32 1, i32* [[A:%.*]], align 4
+; CHECK-NEXT: store i32 1, ptr [[A:%.*]], align 4
; CHECK-NEXT: br label [[Y]]
; CHECK: Y:
; CHECK-NEXT: [[VAL_0:%.*]] = phi i8 [ 1, [[V:%.*]] ], [ 2, [[W]] ], [ 1, [[V]] ], [ 1, [[V]] ]
]
W: ; preds = %V
- store i32 1, i32* %A, align 4
+ store i32 1, ptr %A, align 4
br label %Y
X: ; preds = %V, %Z
declare void @snork()
declare void @spam()
-define void @zot() local_unnamed_addr align 2 personality i8* undef {
+define void @zot() local_unnamed_addr align 2 personality ptr undef {
; CHECK-LABEL: @zot(
; CHECK-NEXT: bb:
; CHECK-NEXT: invoke void @widget()
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: bb21:
-; CHECK-NEXT: [[I22:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[I22:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: bb23:
unreachable
bb21: ; preds = %bb
- %i22 = landingpad { i8*, i32 }
+ %i22 = landingpad { ptr, i32 }
cleanup
ret void
ret void
bb25: ; preds = %bb23, %bb19, %bb14
- %i26 = landingpad { i8*, i32 }
+ %i26 = landingpad { ptr, i32 }
cleanup
br label %bb24
}
; ENABLE-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 6
; ENABLE-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
; ENABLE: switch.lookup:
-; ENABLE-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.foo, i32 0, i32 [[X]]
-; ENABLE-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
+; ENABLE-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [6 x i32], ptr @switch.table.foo, i32 0, i32 [[X]]
+; ENABLE-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
; ENABLE-NEXT: br label [[RETURN]]
; ENABLE: return:
; ENABLE-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 19, [[ENTRY:%.*]] ]
entry:
%retval = alloca i32, align 4
%x.addr = alloca i32, align 4
- store i32 %x, i32* %x.addr, align 4
- %0 = load i32, i32* %x.addr, align 4
+ store i32 %x, ptr %x.addr, align 4
+ %0 = load i32, ptr %x.addr, align 4
switch i32 %0, label %sw.default [
i32 0, label %sw.bb
i32 1, label %sw.bb1
]
sw.bb: ; preds = %entry
- store i32 9, i32* %retval, align 4
+ store i32 9, ptr %retval, align 4
br label %return
sw.bb1: ; preds = %entry
- store i32 20, i32* %retval, align 4
+ store i32 20, ptr %retval, align 4
br label %return
sw.bb2: ; preds = %entry
- store i32 14, i32* %retval, align 4
+ store i32 14, ptr %retval, align 4
br label %return
sw.bb3: ; preds = %entry
- store i32 22, i32* %retval, align 4
+ store i32 22, ptr %retval, align 4
br label %return
sw.bb4: ; preds = %entry
- store i32 12, i32* %retval, align 4
+ store i32 12, ptr %retval, align 4
br label %return
sw.bb5: ; preds = %entry
- store i32 5, i32* %retval, align 4
+ store i32 5, ptr %retval, align 4
br label %return
sw.default: ; preds = %entry
- store i32 19, i32* %retval, align 4
+ store i32 19, ptr %retval, align 4
br label %return
return: ; preds = %sw.default, %sw.bb5, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
- %1 = load i32, i32* %retval, align 4
+ %1 = load i32, ptr %retval, align 4
ret i32 %1
}
; RUN: opt < %s -passes=simplifycfg -hoist-common-insts=true -S | FileCheck %s
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true -S | FileCheck %s
-define void @foo(i1 %C, i32* %P) {
+define void @foo(i1 %C, ptr %P) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: common.ret:
-; CHECK-NEXT: store i32 7, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 7, ptr [[P:%.*]], align 4
; CHECK-NEXT: ret void
;
br i1 %C, label %T, label %F
T: ; preds = %0
- store i32 7, i32* %P
+ store i32 7, ptr %P
ret void
F: ; preds = %0
- store i32 7, i32* %P
+ store i32 7, ptr %P
ret void
}
define void @main() {
entry:
- %0 = load i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @U, i32 0, i32 2), align 4
+ %0 = load i32, ptr getelementptr inbounds (%struct.anon, ptr @U, i32 0, i32 2), align 4
%cmp.i = icmp eq i32 %0, -1
br i1 %cmp.i, label %if.then, label %if.end
br label %if.end
if.end: ; preds = %entry, %if.then
- %1 = load i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @U, i32 0, i32 2), align 4
- %bf.load = load i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @U, i32 0, i32 3, i32 0, i32 0), align 4
+ %1 = load i32, ptr getelementptr inbounds (%struct.anon, ptr @U, i32 0, i32 2), align 4
+ %bf.load = load i32, ptr getelementptr inbounds (%struct.anon, ptr @U, i32 0, i32 3, i32 0, i32 0), align 4
%cmp = icmp slt i32 %0, 0
br i1 %cmp, label %if.end7, label %cond.false
br i1 %cmp2.i, label %for.body.i, label %TmpSimpleNeedExt.exit
for.body.i: ; preds = %for.cond.i
- %arrayidx.i = getelementptr inbounds %struct.anon, %struct.anon* @U, i32 0, i32 0, i32 2, i32 %ix.0.i
- %elt = load i8, i8* %arrayidx.i, align 1
+ %arrayidx.i = getelementptr inbounds %struct.anon, ptr @U, i32 0, i32 0, i32 2, i32 %ix.0.i
+ %elt = load i8, ptr %arrayidx.i, align 1
%cmp3.i = icmp sgt i8 %elt, 7
br i1 %cmp3.i, label %if.else21, label %if.end6.i
@a = global i16 0, !dbg !0
@b = global i32 0, !dbg !4
-@c = global i16* null, !dbg !9
+@c = global ptr null, !dbg !9
define i16 @fn1() !dbg !17 {
bb2:
- store i32 -1, i32* @b, align 1
- %_tmp1.pre = load i16, i16* @a, align 1, !dbg !20
- %_tmp2.pre = load i16*, i16** @c, align 1
+ store i32 -1, ptr @b, align 1
+ %_tmp1.pre = load i16, ptr @a, align 1, !dbg !20
+ %_tmp2.pre = load ptr, ptr @c, align 1
tail call void @llvm.dbg.value(metadata i16 6, metadata !22, metadata !23), !dbg !24
tail call void @llvm.dbg.value(metadata i16 %_tmp1.pre, metadata !25, metadata !23), !dbg !20
- %_tmp3 = load i16, i16* %_tmp2.pre, align 1
+ %_tmp3 = load i16, ptr %_tmp2.pre, align 1
%_tmp4 = icmp ne i16 %_tmp3, 0
%_tmp6 = icmp ne i16 %_tmp1.pre, 0
%or.cond = and i1 %_tmp6, %_tmp4
br i1 %or.cond, label %bb5, label %bb1
bb1: ; preds = %bb2
- store i32 5, i32* @b, align 1
+ store i32 5, ptr @b, align 1
br label %bb5
bb5: ; preds = %bb1, %bb2
define i32 @f() {
entry:
- br i1 icmp eq (i64 and (i64 ptrtoint (i32* @foo to i64), i64 15), i64 0), label %if.end, label %if.then
+ br i1 icmp eq (i64 and (i64 ptrtoint (ptr @foo to i64), i64 15), i64 0), label %if.end, label %if.then
if.then: ; preds = %entry
br label %return
; This case is copied from test/Transforms/SimplifyCFG/AArch64/
; Function Attrs: nounwind
-define double @_Z3fooRdS_S_S_(double* dereferenceable(8) %x, double* dereferenceable(8) %y, double* dereferenceable(8) %a) {
+define double @_Z3fooRdS_S_S_(ptr dereferenceable(8) %x, ptr dereferenceable(8) %y, ptr dereferenceable(8) %a) {
; CHECK-LABEL: @_Z3fooRdS_S_S_(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[Y:%.*]], align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[Y:%.*]], align 8
; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[TMP0]], 0.000000e+00
-; CHECK-NEXT: [[TMP1:%.*]] = load double, double* [[X:%.*]], align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load double, double* [[A:%.*]], align 8
+; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[X:%.*]], align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[A:%.*]], align 8
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[TMP3:%.*]] = fmul fast double [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[MUL:%.*]] = fadd fast double 1.000000e+00, [[TMP3]]
-; CHECK-NEXT: store double [[MUL]], double* [[Y]], align 8
+; CHECK-NEXT: store double [[MUL]], ptr [[Y]], align 8
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: [[MUL1:%.*]] = fmul fast double [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[SUB1:%.*]] = fsub fast double [[MUL1]], [[TMP0]]
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr double, double* [[Y]], i32 1
-; CHECK-NEXT: store double [[SUB1]], double* [[GEP1]], align 8
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr double, ptr [[Y]], i32 1
+; CHECK-NEXT: store double [[SUB1]], ptr [[GEP1]], align 8
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
-; CHECK-NEXT: [[TMP4:%.*]] = load double, double* [[Y]], align 8
+; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[Y]], align 8
; CHECK-NEXT: [[CMP2:%.*]] = fcmp oeq double [[TMP4]], 2.000000e+00
-; CHECK-NEXT: [[TMP5:%.*]] = load double, double* [[X]], align 8
+; CHECK-NEXT: [[TMP5:%.*]] = load double, ptr [[X]], align 8
; CHECK-NEXT: br i1 [[CMP2]], label [[IF_THEN2:%.*]], label [[IF_ELSE2:%.*]]
; CHECK: if.then2:
-; CHECK-NEXT: [[TMP6:%.*]] = load double, double* [[A]], align 8
+; CHECK-NEXT: [[TMP6:%.*]] = load double, ptr [[A]], align 8
; CHECK-NEXT: [[TMP7:%.*]] = fmul fast double [[TMP5]], 3.000000e+00
; CHECK-NEXT: [[MUL2:%.*]] = fsub fast double [[TMP6]], [[TMP7]]
-; CHECK-NEXT: store double [[MUL2]], double* [[Y]], align 8
+; CHECK-NEXT: store double [[MUL2]], ptr [[Y]], align 8
; CHECK-NEXT: br label [[IF_END2:%.*]]
; CHECK: if.else2:
; CHECK-NEXT: [[MUL3:%.*]] = fmul fast double [[TMP5]], 3.000000e+00
; CHECK-NEXT: [[NEG:%.*]] = fsub fast double 0.000000e+00, [[MUL3]]
; CHECK-NEXT: [[SUB2:%.*]] = fsub fast double [[NEG]], 3.000000e+00
-; CHECK-NEXT: store double [[SUB2]], double* [[Y]], align 8
+; CHECK-NEXT: store double [[SUB2]], ptr [[Y]], align 8
; CHECK-NEXT: br label [[IF_END2]]
; CHECK: if.end2:
-; CHECK-NEXT: [[TMP8:%.*]] = load double, double* [[X]], align 8
-; CHECK-NEXT: [[TMP9:%.*]] = load double, double* [[Y]], align 8
+; CHECK-NEXT: [[TMP8:%.*]] = load double, ptr [[X]], align 8
+; CHECK-NEXT: [[TMP9:%.*]] = load double, ptr [[Y]], align 8
; CHECK-NEXT: [[ADD:%.*]] = fadd fast double [[TMP8]], [[TMP9]]
-; CHECK-NEXT: [[TMP10:%.*]] = load double, double* [[A]], align 8
+; CHECK-NEXT: [[TMP10:%.*]] = load double, ptr [[A]], align 8
; CHECK-NEXT: [[ADD2:%.*]] = fadd fast double [[ADD]], [[TMP10]]
; CHECK-NEXT: ret double [[ADD2]]
;
entry:
- %0 = load double, double* %y, align 8
+ %0 = load double, ptr %y, align 8
%cmp = fcmp oeq double %0, 0.000000e+00
- %1 = load double, double* %x, align 8
+ %1 = load double, ptr %x, align 8
br i1 %cmp, label %if.then, label %if.else
; fadd (const, (fmul x, y))
if.then: ; preds = %entry
- %2 = load double, double* %a, align 8
+ %2 = load double, ptr %a, align 8
%3 = fmul fast double %1, %2
%mul = fadd fast double 1.000000e+00, %3
- store double %mul, double* %y, align 8
+ store double %mul, ptr %y, align 8
br label %if.end
; fsub ((fmul x, y), z)
if.else: ; preds = %entry
- %4 = load double, double* %a, align 8
+ %4 = load double, ptr %a, align 8
%mul1 = fmul fast double %1, %4
%sub1 = fsub fast double %mul1, %0
- %gep1 = getelementptr double, double* %y, i32 1
- store double %sub1, double* %gep1, align 8
+ %gep1 = getelementptr double, ptr %y, i32 1
+ store double %sub1, ptr %gep1, align 8
br label %if.end
if.end: ; preds = %if.else, %if.then
- %5 = load double, double* %y, align 8
+ %5 = load double, ptr %y, align 8
%cmp2 = fcmp oeq double %5, 2.000000e+00
- %6 = load double, double* %x, align 8
+ %6 = load double, ptr %x, align 8
br i1 %cmp2, label %if.then2, label %if.else2
; fsub (x, (fmul y, z))
if.then2: ; preds = %entry
- %7 = load double, double* %a, align 8
+ %7 = load double, ptr %a, align 8
%8 = fmul fast double %6, 3.0000000e+00
%mul2 = fsub fast double %7, %8
- store double %mul2, double* %y, align 8
+ store double %mul2, ptr %y, align 8
br label %if.end2
; fsub (fneg((fmul x, y)), const)
%mul3 = fmul fast double %6, 3.0000000e+00
%neg = fsub fast double 0.0000000e+00, %mul3
%sub2 = fsub fast double %neg, 3.0000000e+00
- store double %sub2, double* %y, align 8
+ store double %sub2, ptr %y, align 8
br label %if.end2
if.end2: ; preds = %if.else, %if.then
- %9 = load double, double* %x, align 8
- %10 = load double, double* %y, align 8
+ %9 = load double, ptr %x, align 8
+ %10 = load double, ptr %y, align 8
%add = fadd fast double %9, %10
- %11 = load double, double* %a, align 8
+ %11 = load double, ptr %a, align 8
%add2 = fadd fast double %add, %11
ret double %add2
}
; RUN: opt < %s -mtriple=powerpc64le-unknown-linux-gnu -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true -S | FileCheck %s
-define float @foo(float* %src, float* %dest, i32 signext %count, i32 signext %cond) {
+define float @foo(ptr %src, ptr %dest, i32 signext %count, i32 signext %cond) {
; CHECK-LABEL: @foo(
; CHECK-LABEL: entry:
; CHECK-NOT: load float
entry:
%cmp = icmp sgt i32 %cond, 10
%idxprom = sext i32 %count to i64
- %arrayidx = getelementptr inbounds float, float* %src, i64 %idxprom
+ %arrayidx = getelementptr inbounds float, ptr %src, i64 %idxprom
br i1 %cmp, label %if.then, label %if.else
; CHECK-LABEL: if.then:
-; CHECK: %0 = load float, float* %arrayidx, align 4
+; CHECK: %0 = load float, ptr %arrayidx, align 4
if.then: ; preds = %entry
- %0 = load float, float* %arrayidx, align 4
+ %0 = load float, ptr %arrayidx, align 4
%res = fmul float %0, 3.000000e+00
br label %if.end
; CHECK-LABEL: if.else:
-; CHECK: %1 = load float, float* %arrayidx, align 4
-; CHECK: store float %1, float* %arrayidx4, align 4
+; CHECK: %1 = load float, ptr %arrayidx, align 4
+; CHECK: store float %1, ptr %arrayidx4, align 4
if.else: ; preds = %entry
- %1 = load float, float* %arrayidx, align 4
+ %1 = load float, ptr %arrayidx, align 4
%idxprom3 = sext i32 %count to i64
- %arrayidx4 = getelementptr inbounds float, float* %dest, i64 %idxprom3
- store float %1, float* %arrayidx4, align 4
+ %arrayidx4 = getelementptr inbounds float, ptr %dest, i64 %idxprom3
+ store float %1, ptr %arrayidx4, align 4
br label %if.end
if.end: ; preds = %if.else, %if.then
; CHECK: @switch.table.h = private unnamed_addr constant [4 x float] [float 0x40091EB860000000, float 0x3FF3BE76C0000000, float 0x4012449BA0000000, float 0x4001AE1480000000], align 4
; The table for @foostring
-; CHECK: @switch.table.foostring = private unnamed_addr constant [4 x i8*] [i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str3, i64 0, i64 0)], align 4
+; CHECK: @switch.table.foostring = private unnamed_addr constant [4 x ptr] [ptr @.str, ptr @.str1, ptr @.str2, ptr @.str3], align 4
; A simple int-to-int selection switch.
; It is dense enough to be replaced by table lookup.
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 7
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
; CHECK: switch.lookup:
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], [7 x i32]* @switch.table.f, i32 0, i32 [[SWITCH_TABLEIDX]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], ptr @switch.table.f, i32 0, i32 [[SWITCH_TABLEIDX]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 9
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
; CHECK: switch.lookup:
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i8], [9 x i8]* @switch.table.char, i32 0, i32 [[SWITCH_TABLEIDX]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8, i8* [[SWITCH_GEP]], align 1
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i8], ptr @switch.table.char, i32 0, i32 [[SWITCH_TABLEIDX]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8, ptr [[SWITCH_GEP]], align 1
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[SWITCH_SHIFTAMT:%.*]] = mul i32 [[X]], 8
; CHECK-NEXT: [[SWITCH_DOWNSHIFT:%.*]] = lshr i32 89655594, [[SWITCH_SHIFTAMT]]
; CHECK-NEXT: [[SWITCH_MASKED:%.*]] = trunc i32 [[SWITCH_DOWNSHIFT]] to i8
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x float], [4 x float]* @switch.table.h, i32 0, i32 [[X]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load float, float* [[SWITCH_GEP]], align 4
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x float], ptr @switch.table.h, i32 0, i32 [[X]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load float, ptr [[SWITCH_GEP]], align 4
; CHECK-NEXT: br label [[SW_EPILOG]]
; CHECK: sw.epilog:
; CHECK-NEXT: [[A_0:%.*]] = phi i8 [ [[SWITCH_MASKED]], [[SWITCH_LOOKUP]] ], [ 7, [[ENTRY:%.*]] ]
@.str3 = private unnamed_addr constant [4 x i8] c"qux\00", align 1
@.str4 = private unnamed_addr constant [6 x i8] c"error\00", align 1
-define i8* @foostring(i32 %x) {
+define ptr @foostring(i32 %x) {
; CHECK-LABEL: @foostring(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 4
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
; CHECK: switch.lookup:
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* @switch.table.foostring, i32 0, i32 [[X]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8*, i8** [[SWITCH_GEP]], align 4
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x ptr], ptr @switch.table.foostring, i32 0, i32 [[X]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 4
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
-; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8* [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ getelementptr inbounds ([6 x i8], [6 x i8]* @.str4, i64 0, i64 0), [[ENTRY:%.*]] ]
-; CHECK-NEXT: ret i8* [[RETVAL_0]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = phi ptr [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ @.str4, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret ptr [[RETVAL_0]]
;
entry:
switch i32 %x, label %sw.default [
sw.default: br label %return
return:
- %retval.0 = phi i8* [ getelementptr inbounds ([6 x i8], [6 x i8]* @.str4, i64 0, i64 0), %sw.default ],
- [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str3, i64 0, i64 0), %sw.bb3 ],
- [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str2, i64 0, i64 0), %sw.bb2 ],
- [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str1, i64 0, i64 0), %sw.bb1 ],
- [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), %entry ]
- ret i8* %retval.0
+ %retval.0 = phi ptr [ @.str4, %sw.default ],
+ [ @.str3, %sw.bb3 ],
+ [ @.str2, %sw.bb2 ],
+ [ @.str1, %sw.bb1 ],
+ [ @.str, %entry ]
+ ret ptr %retval.0
}
; CHECK: @switch.table.h = private unnamed_addr constant [4 x float] [float 0x40091EB860000000, float 0x3FF3BE76C0000000, float 0x4012449BA0000000, float 0x4001AE1480000000], align 4
; The table for @foostring
-; CHECK: @switch.table.foostring = private unnamed_addr constant [4 x i8*] [i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str1, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str3, i64 0, i64 0)], align 8
+; CHECK: @switch.table.foostring = private unnamed_addr constant [4 x ptr] [ptr @.str, ptr @.str1, ptr @.str2, ptr @.str3], align 8
; A simple int-to-int selection switch.
; It is dense enough to be replaced by table lookup.
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 7
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
; CHECK: switch.lookup:
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], [7 x i32]* @switch.table.f, i32 0, i32 [[SWITCH_TABLEIDX]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], ptr @switch.table.f, i32 0, i32 [[SWITCH_TABLEIDX]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 9
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
; CHECK: switch.lookup:
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i8], [9 x i8]* @switch.table.char, i32 0, i32 [[SWITCH_TABLEIDX]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8, i8* [[SWITCH_GEP]], align 1
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i8], ptr @switch.table.char, i32 0, i32 [[SWITCH_TABLEIDX]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8, ptr [[SWITCH_GEP]], align 1
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[SWITCH_SHIFTAMT:%.*]] = mul i32 [[X]], 8
; CHECK-NEXT: [[SWITCH_DOWNSHIFT:%.*]] = lshr i32 89655594, [[SWITCH_SHIFTAMT]]
; CHECK-NEXT: [[SWITCH_MASKED:%.*]] = trunc i32 [[SWITCH_DOWNSHIFT]] to i8
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x float], [4 x float]* @switch.table.h, i32 0, i32 [[X]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load float, float* [[SWITCH_GEP]], align 4
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x float], ptr @switch.table.h, i32 0, i32 [[X]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load float, ptr [[SWITCH_GEP]], align 4
; CHECK-NEXT: br label [[SW_EPILOG]]
; CHECK: sw.epilog:
; CHECK-NEXT: [[A_0:%.*]] = phi i8 [ [[SWITCH_MASKED]], [[SWITCH_LOOKUP]] ], [ 7, [[ENTRY:%.*]] ]
@.str3 = private unnamed_addr constant [4 x i8] c"qux\00", align 1
@.str4 = private unnamed_addr constant [6 x i8] c"error\00", align 1
-define i8* @foostring(i32 %x) {
+define ptr @foostring(i32 %x) {
; CHECK-LABEL: @foostring(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 4
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
; CHECK: switch.lookup:
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* @switch.table.foostring, i32 0, i32 [[X]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8*, i8** [[SWITCH_GEP]], align 8
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x ptr], ptr @switch.table.foostring, i32 0, i32 [[X]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 8
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
-; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8* [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ getelementptr inbounds ([6 x i8], [6 x i8]* @.str4, i64 0, i64 0), [[ENTRY:%.*]] ]
-; CHECK-NEXT: ret i8* [[RETVAL_0]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = phi ptr [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ @.str4, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret ptr [[RETVAL_0]]
;
entry:
switch i32 %x, label %sw.default [
sw.default: br label %return
return:
- %retval.0 = phi i8* [ getelementptr inbounds ([6 x i8], [6 x i8]* @.str4, i64 0, i64 0), %sw.default ],
- [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str3, i64 0, i64 0), %sw.bb3 ],
- [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str2, i64 0, i64 0), %sw.bb2 ],
- [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str1, i64 0, i64 0), %sw.bb1 ],
- [ getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), %entry ]
- ret i8* %retval.0
+ %retval.0 = phi ptr [ @.str4, %sw.default ],
+ [ @.str3, %sw.bb3 ],
+ [ @.str2, %sw.bb2 ],
+ [ @.str1, %sw.bb1 ],
+ [ @.str, %entry ]
+ ret ptr %retval.0
}
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
-define void @test1(i1 %C, i1* %BP) {
+define void @test1(i1 %C, ptr %BP) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[C:%.*]], true
entry:
br i1 %C, label %T, label %F
T:
- store i1 %C, i1* %BP
+ store i1 %C, ptr %BP
unreachable
F:
ret void
}
-define void @test2() personality i32 (...)* @__gxx_personality_v0 {
+define void @test2() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @test2()
invoke void @test2( )
to label %N unwind label %U
U:
- %res = landingpad { i8* }
+ %res = landingpad { ptr }
cleanup
unreachable
N:
;; unreachable control flow because of the undef store of null. Make sure we do
;; the latter.
-define void @test5(i1 %cond, i8* %ptr) {
+define void @test5(i1 %cond, ptr %ptr) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: store i8 2, i8* [[PTR:%.*]], align 8
+; CHECK-NEXT: store i8 2, ptr [[PTR:%.*]], align 8
; CHECK-NEXT: ret void
;
entry:
br label %bb2
bb2:
- %ptr.2 = phi i8* [ %ptr, %bb3 ], [ null, %bb1 ]
- store i8 2, i8* %ptr.2, align 8
+ %ptr.2 = phi ptr [ %ptr, %bb3 ], [ null, %bb1 ]
+ store i8 2, ptr %ptr.2, align 8
ret void
}
declare void @llvm.assume(i1)
-declare i1 @llvm.type.test(i8*, metadata) nounwind readnone
+declare i1 @llvm.type.test(ptr, metadata) nounwind readnone
;; Same as the above test but make sure the unreachable control flow is still
;; removed in the presence of a type test / assume sequence.
-define void @test5_type_test_assume(i1 %cond, i8* %ptr, [3 x i8*]* %vtable) {
+define void @test5_type_test_assume(i1 %cond, ptr %ptr, ptr %vtable) {
; CHECK-LABEL: @test5_type_test_assume(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: [[VTABLEI8:%.*]] = bitcast [3 x i8*]* [[VTABLE:%.*]] to i8*
-; CHECK-NEXT: [[P:%.*]] = call i1 @llvm.type.test(i8* [[VTABLEI8]], metadata !"foo")
+; CHECK-NEXT: [[P:%.*]] = call i1 @llvm.type.test(ptr [[VTABLE:%.*]], metadata !"foo")
; CHECK-NEXT: tail call void @llvm.assume(i1 [[P]])
-; CHECK-NEXT: store i8 2, i8* [[PTR:%.*]], align 8
+; CHECK-NEXT: store i8 2, ptr [[PTR:%.*]], align 8
; CHECK-NEXT: ret void
;
entry:
br label %bb2
bb2:
- %ptr.2 = phi i8* [ %ptr, %bb3 ], [ null, %bb1 ]
- %vtablei8 = bitcast [3 x i8*]* %vtable to i8*
- %p = call i1 @llvm.type.test(i8* %vtablei8, metadata !"foo")
+ %ptr.2 = phi ptr [ %ptr, %bb3 ], [ null, %bb1 ]
+ %p = call i1 @llvm.type.test(ptr %vtable, metadata !"foo")
tail call void @llvm.assume(i1 %p)
- store i8 2, i8* %ptr.2, align 8
+ store i8 2, ptr %ptr.2, align 8
ret void
}
-define void @test5_no_null_opt(i1 %cond, i8* %ptr) #0 {
+define void @test5_no_null_opt(i1 %cond, ptr %ptr) #0 {
; CHECK-LABEL: @test5_no_null_opt(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[DOTPTR:%.*]] = select i1 [[COND:%.*]], i8* null, i8* [[PTR:%.*]]
-; CHECK-NEXT: store i8 2, i8* [[DOTPTR]], align 8
+; CHECK-NEXT: [[DOTPTR:%.*]] = select i1 [[COND:%.*]], ptr null, ptr [[PTR:%.*]]
+; CHECK-NEXT: store i8 2, ptr [[DOTPTR]], align 8
; CHECK-NEXT: ret void
;
entry:
br label %bb2
bb2:
- %ptr.2 = phi i8* [ %ptr, %bb3 ], [ null, %bb1 ]
- store i8 2, i8* %ptr.2, align 8
+ %ptr.2 = phi ptr [ %ptr, %bb3 ], [ null, %bb1 ]
+ store i8 2, ptr %ptr.2, align 8
ret void
}
-define void @test6(i1 %cond, i8* %ptr) {
+define void @test6(i1 %cond, ptr %ptr) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: store i8 2, i8* [[PTR:%.*]], align 8
+; CHECK-NEXT: store i8 2, ptr [[PTR:%.*]], align 8
; CHECK-NEXT: ret void
;
entry:
br label %bb2
bb2:
- %ptr.2 = phi i8* [ %ptr, %entry ], [ null, %bb1 ]
- store i8 2, i8* %ptr.2, align 8
+ %ptr.2 = phi ptr [ %ptr, %entry ], [ null, %bb1 ]
+ store i8 2, ptr %ptr.2, align 8
ret void
}
-define void @test6_no_null_opt(i1 %cond, i8* %ptr) #0 {
+define void @test6_no_null_opt(i1 %cond, ptr %ptr) #0 {
; CHECK-LABEL: @test6_no_null_opt(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[COND:%.*]], i8* null, i8* [[PTR:%.*]]
-; CHECK-NEXT: store i8 2, i8* [[SPEC_SELECT]], align 8
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[COND:%.*]], ptr null, ptr [[PTR:%.*]]
+; CHECK-NEXT: store i8 2, ptr [[SPEC_SELECT]], align 8
; CHECK-NEXT: ret void
;
entry:
br label %bb2
bb2:
- %ptr.2 = phi i8* [ %ptr, %entry ], [ null, %bb1 ]
- store i8 2, i8* %ptr.2, align 8
+ %ptr.2 = phi ptr [ %ptr, %entry ], [ null, %bb1 ]
+ store i8 2, ptr %ptr.2, align 8
ret void
}
ret i32 %phi
}
-define void @test8(i1 %X, void ()* %Y) {
+define void @test8(i1 %X, ptr %Y) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
br label %else
else:
- %phi = phi void ()* [ %Y, %entry ], [ null, %if ]
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
call void %phi()
ret void
}
-define void @test8_no_null_opt(i1 %X, void ()* %Y) #0 {
+define void @test8_no_null_opt(i1 %X, ptr %Y) #0 {
; CHECK-LABEL: @test8_no_null_opt(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], void ()* null, void ()* [[Y:%.*]]
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], ptr null, ptr [[Y:%.*]]
; CHECK-NEXT: call void [[SPEC_SELECT]]()
; CHECK-NEXT: ret void
;
br label %else
else:
- %phi = phi void ()* [ %Y, %entry ], [ null, %if ]
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
call void %phi()
ret void
}
-declare i8* @fn_nonnull_noundef_arg(i8* nonnull noundef %p)
-declare i8* @fn_nonnull_deref_arg(i8* nonnull dereferenceable(4) %p)
-declare i8* @fn_nonnull_deref_or_null_arg(i8* nonnull dereferenceable_or_null(4) %p)
-declare i8* @fn_nonnull_arg(i8* nonnull %p)
-declare i8* @fn_noundef_arg(i8* noundef %p)
+declare ptr @fn_nonnull_noundef_arg(ptr nonnull noundef %p)
+declare ptr @fn_nonnull_deref_arg(ptr nonnull dereferenceable(4) %p)
+declare ptr @fn_nonnull_deref_or_null_arg(ptr nonnull dereferenceable_or_null(4) %p)
+declare ptr @fn_nonnull_arg(ptr nonnull %p)
+declare ptr @fn_noundef_arg(ptr noundef %p)
-define void @test9(i1 %X, i8* %Y) {
+define void @test9(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[Y:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[Y:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- call i8* @fn_nonnull_noundef_arg(i8* %phi)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_noundef_arg(ptr %phi)
ret void
}
; Optimizing this code should produce assume.
-define void @test9_deref(i1 %X, i8* %Y) {
+define void @test9_deref(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_deref(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8* @fn_nonnull_deref_arg(i8* [[Y:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call ptr @fn_nonnull_deref_arg(ptr [[Y:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- call i8* @fn_nonnull_deref_arg(i8* %phi)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_deref_arg(ptr %phi)
ret void
}
; Optimizing this code should produce assume.
-define void @test9_deref_or_null(i1 %X, i8* %Y) {
+define void @test9_deref_or_null(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_deref_or_null(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8* @fn_nonnull_deref_or_null_arg(i8* [[Y:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call ptr @fn_nonnull_deref_or_null_arg(ptr [[Y:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- call i8* @fn_nonnull_deref_or_null_arg(i8* %phi)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_deref_or_null_arg(ptr %phi)
ret void
}
-define void @test9_undef(i1 %X, i8* %Y) {
+define void @test9_undef(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_undef(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_noundef_arg(i8* [[Y:%.*]])
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_noundef_arg(ptr [[Y:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ undef, %if ]
- call i8* @fn_noundef_arg(i8* %phi)
+ %phi = phi ptr [ %Y, %entry ], [ undef, %if ]
+ call ptr @fn_noundef_arg(ptr %phi)
ret void
}
-define void @test9_undef_null_defined(i1 %X, i8* %Y) #0 {
+define void @test9_undef_null_defined(i1 %X, ptr %Y) #0 {
; CHECK-LABEL: @test9_undef_null_defined(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_noundef_arg(i8* [[Y:%.*]])
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_noundef_arg(ptr [[Y:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ undef, %if ]
- call i8* @fn_noundef_arg(i8* %phi)
+ %phi = phi ptr [ %Y, %entry ], [ undef, %if ]
+ call ptr @fn_noundef_arg(ptr %phi)
ret void
}
-define void @test9_null_callsite(i1 %X, i8* %Y) {
+define void @test9_null_callsite(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_null_callsite(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8* @fn_nonnull_arg(i8* noundef nonnull [[Y:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call ptr @fn_nonnull_arg(ptr noundef nonnull [[Y:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- call i8* @fn_nonnull_arg(i8* nonnull noundef %phi)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_arg(ptr nonnull noundef %phi)
ret void
}
-define void @test9_gep_mismatch(i1 %X, i8* %Y, i8* %P) {
+define void @test9_gep_mismatch(i1 %X, ptr %Y, ptr %P) {
; CHECK-LABEL: @test9_gep_mismatch(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], i8* null, i8* [[Y:%.*]]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i64 0
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[GEP]])
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], ptr null, ptr [[Y:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[P:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- %gep = getelementptr inbounds i8, i8* %P, i64 0
- call i8* @fn_nonnull_noundef_arg(i8* %gep)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_noundef_arg(ptr %P)
ret void
}
-define void @test9_gep_zero(i1 %X, i8* %Y) {
+define void @test9_gep_zero(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_gep_zero(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, i8* [[Y:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[GEP]])
+; CHECK-NEXT: [[TMP1:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[Y:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- %gep = getelementptr inbounds i8, i8* %phi, i64 0
- call i8* @fn_nonnull_noundef_arg(i8* %gep)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_noundef_arg(ptr %phi)
ret void
}
-define void @test9_gep_bitcast(i1 %X, i32* %Y) {
+define void @test9_gep_bitcast(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_gep_bitcast(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, i32* [[Y:%.*]], i64 0
-; CHECK-NEXT: [[BC:%.*]] = bitcast i32* [[GEP]] to i8*
-; CHECK-NEXT: [[TMP1:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[BC]])
+; CHECK-NEXT: [[TMP1:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[Y:%.*]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i32* [ %Y, %entry ], [ null, %if ]
- %gep = getelementptr inbounds i32, i32* %phi, i64 0
- %bc = bitcast i32* %gep to i8*
- call i8* @fn_nonnull_noundef_arg(i8* %bc)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_noundef_arg(ptr %phi)
ret void
}
-define void @test9_gep_nonzero(i1 %X, i8* %Y) {
+define void @test9_gep_nonzero(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_gep_nonzero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], i8* null, i8* [[Y:%.*]]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, i8* [[SPEC_SELECT]], i64 12
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[GEP]])
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], ptr null, ptr [[Y:%.*]]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[SPEC_SELECT]], i64 12
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[GEP]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- %gep = getelementptr i8, i8* %phi, i64 12
- call i8* @fn_nonnull_noundef_arg(i8* %gep)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ %gep = getelementptr i8, ptr %phi, i64 12
+ call ptr @fn_nonnull_noundef_arg(ptr %gep)
ret void
}
-define void @test9_gep_inbounds_nonzero(i1 %X, i8* %Y) {
+define void @test9_gep_inbounds_nonzero(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_gep_inbounds_nonzero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], i8* null, i8* [[Y:%.*]]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, i8* [[SPEC_SELECT]], i64 12
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[GEP]])
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], ptr null, ptr [[Y:%.*]]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr [[SPEC_SELECT]], i64 12
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[GEP]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- %gep = getelementptr inbounds i8, i8* %phi, i64 12
- call i8* @fn_nonnull_noundef_arg(i8* %gep)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ %gep = getelementptr inbounds i8, ptr %phi, i64 12
+ call ptr @fn_nonnull_noundef_arg(ptr %gep)
ret void
}
-define void @test9_gep_inbouds_unknown_null(i1 %X, i8* %Y, i64 %I) {
+define void @test9_gep_inbouds_unknown_null(i1 %X, ptr %Y, i64 %I) {
; CHECK-LABEL: @test9_gep_inbouds_unknown_null(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], i8* null, i8* [[Y:%.*]]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, i8* [[SPEC_SELECT]], i64 [[I:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[GEP]])
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], ptr null, ptr [[Y:%.*]]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr [[SPEC_SELECT]], i64 [[I:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[GEP]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- %gep = getelementptr inbounds i8, i8* %phi, i64 %I
- call i8* @fn_nonnull_noundef_arg(i8* %gep)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ %gep = getelementptr inbounds i8, ptr %phi, i64 %I
+ call ptr @fn_nonnull_noundef_arg(ptr %gep)
ret void
}
-define void @test9_gep_unknown_null(i1 %X, i8* %Y, i64 %I) {
+define void @test9_gep_unknown_null(i1 %X, ptr %Y, i64 %I) {
; CHECK-LABEL: @test9_gep_unknown_null(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], i8* null, i8* [[Y:%.*]]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, i8* [[SPEC_SELECT]], i64 [[I:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[GEP]])
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], ptr null, ptr [[Y:%.*]]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[SPEC_SELECT]], i64 [[I:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[GEP]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- %gep = getelementptr i8, i8* %phi, i64 %I
- call i8* @fn_nonnull_noundef_arg(i8* %gep)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ %gep = getelementptr i8, ptr %phi, i64 %I
+ call ptr @fn_nonnull_noundef_arg(ptr %gep)
ret void
}
-define void @test9_gep_unknown_undef(i1 %X, i8* %Y, i64 %I) {
+define void @test9_gep_unknown_undef(i1 %X, ptr %Y, i64 %I) {
; CHECK-LABEL: @test9_gep_unknown_undef(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, i8* [[Y:%.*]], i64 [[I:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_noundef_arg(i8* [[GEP]])
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[Y:%.*]], i64 [[I:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_noundef_arg(ptr [[GEP]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ undef, %if ]
- %gep = getelementptr i8, i8* %phi, i64 %I
- call i8* @fn_noundef_arg(i8* %gep)
+ %phi = phi ptr [ %Y, %entry ], [ undef, %if ]
+ %gep = getelementptr i8, ptr %phi, i64 %I
+ call ptr @fn_noundef_arg(ptr %gep)
ret void
}
-define void @test9_missing_noundef(i1 %X, i8* %Y) {
+define void @test9_missing_noundef(i1 %X, ptr %Y) {
; CHECK-LABEL: @test9_missing_noundef(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], i8* null, i8* [[Y:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_nonnull_arg(i8* [[SPEC_SELECT]])
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], ptr null, ptr [[Y:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_nonnull_arg(ptr [[SPEC_SELECT]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- call i8* @fn_nonnull_arg(i8* %phi)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_arg(ptr %phi)
ret void
}
-define void @test9_null_defined(i1 %X, i8* %Y) #0 {
+define void @test9_null_defined(i1 %X, ptr %Y) #0 {
; CHECK-LABEL: @test9_null_defined(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], i8* null, i8* [[Y:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = call i8* @fn_nonnull_noundef_arg(i8* [[SPEC_SELECT]])
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[X:%.*]], ptr null, ptr [[Y:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @fn_nonnull_noundef_arg(ptr [[SPEC_SELECT]])
; CHECK-NEXT: ret void
;
entry:
br label %else
else:
- %phi = phi i8* [ %Y, %entry ], [ null, %if ]
- call i8* @fn_nonnull_noundef_arg(i8* %phi)
+ %phi = phi ptr [ %Y, %entry ], [ null, %if ]
+ call ptr @fn_nonnull_noundef_arg(ptr %phi)
ret void
}
declare void @bar(i32)
-define void @foo() personality i32 (...)* @__gxx_personality_v0 {
+define void @foo() personality ptr @__gxx_personality_v0 {
entry:
invoke void @bar(i32 undef)
to label %r unwind label %u
ret void
u: ; preds = %entry
- %val = landingpad { i8*, i32 }
+ %val = landingpad { ptr, i32 }
cleanup
- resume { i8*, i32 } %val
+ resume { ptr, i32 } %val
}
declare i32 @__gxx_personality_v0(...)
target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
-@.str = private constant [5 x i8] c"null\00" ; <[5 x i8]*> [#uses=2]
-@.str1 = private constant [4 x i8] c"one\00" ; <[4 x i8]*> [#uses=2]
-@.str2 = private constant [4 x i8] c"two\00" ; <[4 x i8]*> [#uses=2]
-@.str3 = private constant [5 x i8] c"four\00" ; <[5 x i8]*> [#uses=2]
+@.str = private constant [5 x i8] c"null\00" ; <ptr> [#uses=2]
+@.str1 = private constant [4 x i8] c"one\00" ; <ptr> [#uses=2]
+@.str2 = private constant [4 x i8] c"two\00" ; <ptr> [#uses=2]
+@.str3 = private constant [5 x i8] c"four\00" ; <ptr> [#uses=2]
-@.str_as1 = private addrspace(1) constant [5 x i8] c"null\00" ; <[5 x i8]*> [#uses=2]
-@.str1_as1 = private addrspace(1) constant [4 x i8] c"one\00" ; <[4 x i8]*> [#uses=2]
-@.str2_as1 = private addrspace(1) constant [4 x i8] c"two\00" ; <[4 x i8]*> [#uses=2]
-@.str3_as1 = private addrspace(1) constant [5 x i8] c"four\00" ; <[5 x i8]*> [#uses=2]
+@.str_as1 = private addrspace(1) constant [5 x i8] c"null\00" ; <ptr> [#uses=2]
+@.str1_as1 = private addrspace(1) constant [4 x i8] c"one\00" ; <ptr> [#uses=2]
+@.str2_as1 = private addrspace(1) constant [4 x i8] c"two\00" ; <ptr> [#uses=2]
+@.str3_as1 = private addrspace(1) constant [5 x i8] c"four\00" ; <ptr> [#uses=2]
-declare i32 @puts(i8*)
-declare i32 @puts_as1(i8 addrspace(1)*)
+declare i32 @puts(ptr)
+declare i32 @puts_as1(ptr addrspace(1))
-define void @f(i8* %x) nounwind ssp {
+define void @f(ptr %x) nounwind ssp {
; CHECK-LABEL: @f(
; CHECK: switch i64 %magicptr
; CHECK: i64 0, label
; CHECK: }
entry:
- %tobool = icmp eq i8* %x, null ; <i1> [#uses=1]
+ %tobool = icmp eq ptr %x, null ; <i1> [#uses=1]
br i1 %tobool, label %if.then, label %if.else
if.then: ; preds = %entry
- %call = call i32 @puts(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %call = call i32 @puts(ptr @.str) nounwind ; <i32> [#uses=0]
br label %if.end21
if.else: ; preds = %entry
- %cmp = icmp eq i8* %x, inttoptr (i64 1 to i8*) ; <i1> [#uses=1]
+ %cmp = icmp eq ptr %x, inttoptr (i64 1 to ptr) ; <i1> [#uses=1]
br i1 %cmp, label %if.then2, label %if.else4
if.then2: ; preds = %if.else
- %call3 = call i32 @puts(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %call3 = call i32 @puts(ptr @.str1) nounwind ; <i32> [#uses=0]
br label %if.end20
if.else4: ; preds = %if.else
- %cmp6 = icmp eq i8* %x, inttoptr (i64 2 to i8*) ; <i1> [#uses=1]
+ %cmp6 = icmp eq ptr %x, inttoptr (i64 2 to ptr) ; <i1> [#uses=1]
br i1 %cmp6, label %if.then9, label %lor.lhs.false
lor.lhs.false: ; preds = %if.else4
- %cmp8 = icmp eq i8* %x, inttoptr (i64 3 to i8*) ; <i1> [#uses=1]
+ %cmp8 = icmp eq ptr %x, inttoptr (i64 3 to ptr) ; <i1> [#uses=1]
br i1 %cmp8, label %if.then9, label %if.else11
if.then9: ; preds = %lor.lhs.false, %if.else4
- %call10 = call i32 @puts(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str2, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %call10 = call i32 @puts(ptr @.str2) nounwind ; <i32> [#uses=0]
br label %if.end19
if.else11: ; preds = %lor.lhs.false
- %cmp13 = icmp eq i8* %x, inttoptr (i64 4 to i8*) ; <i1> [#uses=1]
+ %cmp13 = icmp eq ptr %x, inttoptr (i64 4 to ptr) ; <i1> [#uses=1]
br i1 %cmp13, label %if.then14, label %if.else16
if.then14: ; preds = %if.else11
- %call15 = call i32 @puts(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str3, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %call15 = call i32 @puts(ptr @.str3) nounwind ; <i32> [#uses=0]
br label %if.end
if.else16: ; preds = %if.else11
- %call18 = call i32 @puts(i8* %x) nounwind ; <i32> [#uses=0]
+ %call18 = call i32 @puts(ptr %x) nounwind ; <i32> [#uses=0]
br label %if.end
if.end: ; preds = %if.else16, %if.then14
; Is it useful to test a version where the ptrtoints are to the same
; size?
-define void @f_as1(i8 addrspace(1)* %x) nounwind ssp {
+define void @f_as1(ptr addrspace(1) %x) nounwind ssp {
; CHECK-LABEL: @f_as1(
-; CHECK: ptrtoint i8 addrspace(1)* %x to i16
+; CHECK: ptrtoint ptr addrspace(1) %x to i16
; CHECK: switch i16 %magicptr
; CHECK: i16 0, label
; CHECK: i16 1, label
; CHECK: }
entry:
- %tobool = icmp eq i8 addrspace(1)* %x, null ; <i1> [#uses=1]
+ %tobool = icmp eq ptr addrspace(1) %x, null ; <i1> [#uses=1]
br i1 %tobool, label %if.then, label %if.else
if.then: ; preds = %entry
- %call = call i32 @puts_as1(i8 addrspace(1)* getelementptr inbounds ([5 x i8], [5 x i8] addrspace(1)* @.str_as1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %call = call i32 @puts_as1(ptr addrspace(1) @.str_as1) nounwind ; <i32> [#uses=0]
br label %if.end21
if.else: ; preds = %entry
- %cmp = icmp eq i8 addrspace(1)* %x, inttoptr (i64 1 to i8 addrspace(1)*) ; <i1> [#uses=1]
+ %cmp = icmp eq ptr addrspace(1) %x, inttoptr (i64 1 to ptr addrspace(1)) ; <i1> [#uses=1]
br i1 %cmp, label %if.then2, label %if.else4
if.then2: ; preds = %if.else
- %call3 = call i32 @puts_as1(i8 addrspace(1)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(1)* @.str1_as1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %call3 = call i32 @puts_as1(ptr addrspace(1) @.str1_as1) nounwind ; <i32> [#uses=0]
br label %if.end20
if.else4: ; preds = %if.else
- %cmp6 = icmp eq i8 addrspace(1)* %x, inttoptr (i64 2 to i8 addrspace(1)*) ; <i1> [#uses=1]
+ %cmp6 = icmp eq ptr addrspace(1) %x, inttoptr (i64 2 to ptr addrspace(1)) ; <i1> [#uses=1]
br i1 %cmp6, label %if.then9, label %lor.lhs.false
lor.lhs.false: ; preds = %if.else4
- %cmp8 = icmp eq i8 addrspace(1)* %x, inttoptr (i64 3 to i8 addrspace(1)*) ; <i1> [#uses=1]
+ %cmp8 = icmp eq ptr addrspace(1) %x, inttoptr (i64 3 to ptr addrspace(1)) ; <i1> [#uses=1]
br i1 %cmp8, label %if.then9, label %if.else11
if.then9: ; preds = %lor.lhs.false, %if.else4
- %call10 = call i32 @puts_as1(i8 addrspace(1)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(1)* @.str2_as1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %call10 = call i32 @puts_as1(ptr addrspace(1) @.str2_as1) nounwind ; <i32> [#uses=0]
br label %if.end19
if.else11: ; preds = %lor.lhs.false
- %cmp13 = icmp eq i8 addrspace(1)* %x, inttoptr (i64 4 to i8 addrspace(1)*) ; <i1> [#uses=1]
+ %cmp13 = icmp eq ptr addrspace(1) %x, inttoptr (i64 4 to ptr addrspace(1)) ; <i1> [#uses=1]
br i1 %cmp13, label %if.then14, label %if.else16
if.then14: ; preds = %if.else11
- %call15 = call i32 @puts_as1(i8 addrspace(1)* getelementptr inbounds ([5 x i8], [5 x i8] addrspace(1)* @.str3_as1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %call15 = call i32 @puts_as1(ptr addrspace(1) @.str3_as1) nounwind ; <i32> [#uses=0]
br label %if.end
if.else16: ; preds = %if.else11
- %call18 = call i32 @puts_as1(i8 addrspace(1)* %x) nounwind ; <i32> [#uses=0]
+ %call18 = call i32 @puts_as1(ptr addrspace(1) %x) nounwind ; <i32> [#uses=0]
br label %if.end
if.end: ; preds = %if.else16, %if.then14
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-@GV = external constant i64*
+@GV = external constant ptr
-define i64* @test1(i1 %cond, i8* %P) {
+define ptr @test1(i1 %cond, ptr %P) {
entry:
br i1 %cond, label %if, label %then
then:
- %bc = bitcast i8* %P to i64*
br label %join
if:
- %load = load i64*, i64** @GV, align 8, !dereferenceable !0
+ %load = load ptr, ptr @GV, align 8, !dereferenceable !0
br label %join
join:
- %phi = phi i64* [ %bc, %then ], [ %load, %if ]
- ret i64* %phi
+ %phi = phi ptr [ %P, %then ], [ %load, %if ]
+ ret ptr %phi
}
-; CHECK-LABEL: define i64* @test1(
-; CHECK: %[[bc:.*]] = bitcast i8* %P to i64*
-; CHECK: %[[load:.*]] = load i64*, i64** @GV, align 8{{$}}
-; CHECK: %[[phi:.*]] = select i1 %cond, i64* %[[load]], i64* %[[bc]]
-; CHECK: ret i64* %[[phi]]
+; CHECK-LABEL: define ptr @test1(
+; CHECK: %[[load:.*]] = load ptr, ptr @GV, align 8{{$}}
+; CHECK: %[[phi:.*]] = select i1 %cond, ptr %[[load]], ptr %P
+; CHECK: ret ptr %[[phi]]
!0 = !{i64 8}
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-declare i32* @fn1(i32* returned)
+declare ptr @fn1(ptr returned)
define i32 @test1(i1 %B) {
; CHECK-LABEL: @test1(
unreachable
for.cond4: ; preds = %for.end, %for.cond4.preheader
- %phi = phi i32* [ %call, %for.end ], [ undef, %for.cond4.preheader ]
- %call = call i32* @fn1(i32* %phi)
+ %phi = phi ptr [ %call, %for.end ], [ undef, %for.cond4.preheader ]
+ %call = call ptr @fn1(ptr %phi)
br label %for.cond5
for.cond5: ; preds = %for.cond5, %for.cond4
br i1 %B, label %for.cond5, label %for.end
for.end: ; preds = %for.cond5
- %load = load i32, i32* %call, align 4
+ %load = load i32, ptr %call, align 4
br label %for.cond4
}
ret float %t5
}
-define i8* @test4(i1* %dummy, i8* %a, i8* %b) {
+define ptr @test4(ptr %dummy, ptr %a, ptr %b) {
; Test that we don't speculate an arbitrarily large number of unfolded constant
; expressions.
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[COND1:%.*]] = load volatile i1, i1* [[DUMMY:%.*]], align 1
+; CHECK-NEXT: [[COND1:%.*]] = load volatile i1, ptr [[DUMMY:%.*]], align 1
; CHECK-NEXT: br i1 [[COND1]], label [[IF:%.*]], label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[COND2:%.*]] = load volatile i1, i1* [[DUMMY]], align 1
+; CHECK-NEXT: [[COND2:%.*]] = load volatile i1, ptr [[DUMMY]], align 1
; CHECK-NEXT: br i1 [[COND2]], label [[THEN:%.*]], label [[END]]
; CHECK: then:
; CHECK-NEXT: br label [[END]]
; CHECK: end:
-; CHECK-NEXT: [[X1:%.*]] = phi i8* [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[B:%.*]], [[IF]] ], [ inttoptr (i64 1 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X2:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 2 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X3:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 3 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X4:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 4 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X5:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 5 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X6:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 6 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X7:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 7 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X8:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 8 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X9:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 9 to i8*), [[THEN]] ]
-; CHECK-NEXT: [[X10:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 10 to i8*), [[THEN]] ]
-; CHECK-NEXT: ret i8* [[X10]]
+; CHECK-NEXT: [[X1:%.*]] = phi ptr [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[B:%.*]], [[IF]] ], [ inttoptr (i64 1 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X2:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 2 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X3:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 3 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X4:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 4 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X5:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 5 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X6:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 6 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X7:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 7 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X8:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 8 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X9:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 9 to ptr), [[THEN]] ]
+; CHECK-NEXT: [[X10:%.*]] = phi ptr [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 10 to ptr), [[THEN]] ]
+; CHECK-NEXT: ret ptr [[X10]]
;
entry:
- %cond1 = load volatile i1, i1* %dummy
+ %cond1 = load volatile i1, ptr %dummy
br i1 %cond1, label %if, label %end
if:
- %cond2 = load volatile i1, i1* %dummy
+ %cond2 = load volatile i1, ptr %dummy
br i1 %cond2, label %then, label %end
then:
br label %end
end:
- %x1 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 1 to i8*), %then ]
- %x2 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 2 to i8*), %then ]
- %x3 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 3 to i8*), %then ]
- %x4 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 4 to i8*), %then ]
- %x5 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 5 to i8*), %then ]
- %x6 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 6 to i8*), %then ]
- %x7 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 7 to i8*), %then ]
- %x8 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 8 to i8*), %then ]
- %x9 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 9 to i8*), %then ]
- %x10 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 10 to i8*), %then ]
-
- ret i8* %x10
+ %x1 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 1 to ptr), %then ]
+ %x2 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 2 to ptr), %then ]
+ %x3 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 3 to ptr), %then ]
+ %x4 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 4 to ptr), %then ]
+ %x5 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 5 to ptr), %then ]
+ %x6 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 6 to ptr), %then ]
+ %x7 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 7 to ptr), %then ]
+ %x8 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 8 to ptr), %then ]
+ %x9 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 9 to ptr), %then ]
+ %x10 = phi ptr [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 10 to ptr), %then ]
+
+ ret ptr %x10
}
-define i32* @test5(i32 %a, i32 %b, i32 %c, i32* dereferenceable(10) %ptr1, i32* dereferenceable(10) %ptr2, i32** dereferenceable(10) align 8 %ptr3) nofree nosync {
+define ptr @test5(i32 %a, i32 %b, i32 %c, ptr dereferenceable(10) %ptr1, ptr dereferenceable(10) %ptr2, ptr dereferenceable(10) align 8 %ptr3) nofree nosync {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[T1:%.*]] = icmp eq i32 [[B:%.*]], 0
; CHECK-NEXT: [[T2:%.*]] = icmp sgt i32 [[C:%.*]], 1
-; CHECK-NEXT: [[T4_SEL:%.*]] = select i1 [[T1]], i32* [[PTR2:%.*]], i32* [[PTR1:%.*]]
+; CHECK-NEXT: [[T4_SEL:%.*]] = select i1 [[T1]], ptr [[PTR2:%.*]], ptr [[PTR1:%.*]]
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[T1]], i1 [[T2]], i1 false
-; CHECK-NEXT: [[T3:%.*]] = load i32*, i32** [[PTR3:%.*]], align 8
-; CHECK-NEXT: [[T4:%.*]] = select i1 [[OR_COND]], i32* [[T3]], i32* [[T4_SEL]]
-; CHECK-NEXT: ret i32* [[T4]]
+; CHECK-NEXT: [[T3:%.*]] = load ptr, ptr [[PTR3:%.*]], align 8
+; CHECK-NEXT: [[T4:%.*]] = select i1 [[OR_COND]], ptr [[T3]], ptr [[T4_SEL]]
+; CHECK-NEXT: ret ptr [[T4]]
;
entry:
%t1 = icmp eq i32 %b, 0
br i1 %t2, label %bb2, label %bb3
bb2:
- %t3 = load i32*, i32** %ptr3, !dereferenceable !{i64 10}
+ %t3 = load ptr, ptr %ptr3, !dereferenceable !{i64 10}
br label %bb3
bb3:
- %t4 = phi i32* [ %ptr1, %entry ], [ %ptr2, %bb1 ], [ %t3, %bb2 ]
- ret i32* %t4
+ %t4 = phi ptr [ %ptr1, %entry ], [ %ptr2, %bb1 ], [ %t3, %bb2 ]
+ ret ptr %t4
}
define float @spec_select_fp5(float %a, float %b, float %c) {
to label %continue unwind label %unwind
unwind: ; preds = %entry
- %tmp101 = landingpad { i8*, i32 }
+ %tmp101 = landingpad { ptr, i32 }
cleanup
br i1 %B, label %resume, label %then
br label %resume
resume: ; preds = %cleanup2, %then, %cleanup1, %unwind
- %tmp104 = phi { i8*, i32 } [ %tmp101, %then ], [ %tmp106, %cleanup2 ], [ %tmp101, %unwind ]
-;CHECK-NOT: resume { i8*, i32 } %tmp104
- resume { i8*, i32 } %tmp104
+ %tmp104 = phi { ptr, i32 } [ %tmp101, %then ], [ %tmp106, %cleanup2 ], [ %tmp101, %unwind ]
+;CHECK-NOT: resume { ptr, i32 } %tmp104
+ resume { ptr, i32 } %tmp104
continue: ; preds = %entry, %continue
;CHECK: continue: ; preds = %entry, %continue
to label %continue unwind label %cleanup2
cleanup2: ; preds = %continue
- %tmp106 = landingpad { i8*, i32 }
+ %tmp106 = landingpad { ptr, i32 }
cleanup
br label %resume
}
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: norecurse nounwind uwtable
-define void @Test(i32* nocapture %res, i32* nocapture readnone %c, i32* nocapture readonly %d, i32* nocapture readonly %p) #0 {
+define void @Test(ptr nocapture %res, ptr nocapture readnone %c, ptr nocapture readonly %d, ptr nocapture readonly %p) #0 {
entry:
br label %for.body
; CHECK-LABEL: @Test
-; CHECK: load i32, i32* {{.*}}, align 4, !llvm.access.group !0
-; CHECK: load i32, i32* {{.*}}, align 4, !llvm.access.group !0
+; CHECK: load i32, ptr {{.*}}, align 4, !llvm.access.group !0
+; CHECK: load i32, ptr {{.*}}, align 4, !llvm.access.group !0
; CHECK: store i32 {{.*}}, align 4, !llvm.access.group !0
; CHECK-NOT: load
; CHECK-NOT: store
for.body: ; preds = %cond.end, %entry
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %cond.end ]
- %arrayidx = getelementptr inbounds i32, i32* %p, i64 %indvars.iv
- %0 = load i32, i32* %arrayidx, align 4, !llvm.access.group !10
+ %arrayidx = getelementptr inbounds i32, ptr %p, i64 %indvars.iv
+ %0 = load i32, ptr %arrayidx, align 4, !llvm.access.group !10
%cmp1 = icmp eq i32 %0, 0
br i1 %cmp1, label %cond.true, label %cond.false
cond.false: ; preds = %for.body
- %arrayidx3 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv
- %v = load i32, i32* %arrayidx3, align 4, !llvm.access.group !10
- %arrayidx7 = getelementptr inbounds i32, i32* %d, i64 %indvars.iv
- %1 = load i32, i32* %arrayidx7, align 4, !llvm.access.group !10
+ %arrayidx3 = getelementptr inbounds i32, ptr %res, i64 %indvars.iv
+ %v = load i32, ptr %arrayidx3, align 4, !llvm.access.group !10
+ %arrayidx7 = getelementptr inbounds i32, ptr %d, i64 %indvars.iv
+ %1 = load i32, ptr %arrayidx7, align 4, !llvm.access.group !10
%add = add nsw i32 %1, %v
br label %cond.end
cond.true: ; preds = %for.body
- %arrayidx4 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv
- %w = load i32, i32* %arrayidx4, align 4, !llvm.access.group !10
- %arrayidx8 = getelementptr inbounds i32, i32* %d, i64 %indvars.iv
- %2 = load i32, i32* %arrayidx8, align 4, !llvm.access.group !10
+ %arrayidx4 = getelementptr inbounds i32, ptr %res, i64 %indvars.iv
+ %w = load i32, ptr %arrayidx4, align 4, !llvm.access.group !10
+ %arrayidx8 = getelementptr inbounds i32, ptr %d, i64 %indvars.iv
+ %2 = load i32, ptr %arrayidx8, align 4, !llvm.access.group !10
%add2 = add nsw i32 %2, %w
br label %cond.end
cond.end: ; preds = %for.body, %cond.false
%cond = phi i32 [ %add, %cond.false ], [ %add2, %cond.true ]
- %arrayidx9 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv
- store i32 %cond, i32* %arrayidx9, align 4, !llvm.access.group !10
+ %arrayidx9 = getelementptr inbounds i32, ptr %res, i64 %indvars.iv
+ store i32 %cond, ptr %arrayidx9, align 4, !llvm.access.group !10
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 16
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
%class.F = type { i8 }
%class.B = type { i8 }
%class.A = type { %class.C }
-%class.C = type { i32 (...)** }
+%class.C = type { ptr }
-define void @foo(%class.F* %this, %class.B* %out) {
+define void @foo(ptr %this, ptr %out) {
entry:
- %call = tail call i32 @_ZNK1F5beginEv(%class.F* %this)
- %call2 = tail call i32 @_ZNK1F3endEv(%class.F* %this)
+ %call = tail call i32 @_ZNK1F5beginEv(ptr %this)
+ %call2 = tail call i32 @_ZNK1F3endEv(ptr %this)
%cmp.i22 = icmp eq i32 %call, %call2
br i1 %cmp.i22, label %while.end, label %while.body.preheader
while.body:
%frame_node.sroa.0.023 = phi i32 [ %inc.i, %_ZN10unique_ptrD2Ev.exit ], [ %call, %while.body.preheader ]
- %call8 = tail call i8* @_Znwm(i64 8)
+ %call8 = tail call ptr @_Znwm(i64 8)
%inc.i = add nsw i32 %frame_node.sroa.0.023, 1
%cmp = icmp eq i32 %inc.i, %call2
br i1 %cmp, label %_ZN10unique_ptrD2Ev.exit, label %if.then
if.then:
- tail call void @_ZN1B6appendEv(%class.B* %out)
+ tail call void @_ZN1B6appendEv(ptr %out)
br label %_ZN10unique_ptrD2Ev.exit
_ZN10unique_ptrD2Ev.exit:
- %x1 = bitcast i8* %call8 to void (%class.A*)***
- %vtable.i.i = load void (%class.A*)**, void (%class.A*)*** %x1, align 8
- %x2 = bitcast void (%class.A*)** %vtable.i.i to i8*
- %x3 = tail call i1 @llvm.type.test(i8* %x2, metadata !"foo")
+ %vtable.i.i = load ptr, ptr %call8, align 8
+ %x3 = tail call i1 @llvm.type.test(ptr %vtable.i.i, metadata !"foo")
; CHECK: call void @llvm.assume
; CHECK: call void @llvm.assume
tail call void @llvm.assume(i1 %x3) #5
ret void
}
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
-declare i32 @_ZNK1F5beginEv(%class.F*)
+declare i32 @_ZNK1F5beginEv(ptr)
-declare i32 @_ZNK1F3endEv(%class.F*)
+declare i32 @_ZNK1F3endEv(ptr)
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
+declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1)
-declare noalias nonnull i8* @_Znwm(i64)
+declare noalias nonnull ptr @_Znwm(i64)
-declare void @_ZN1B6appendEv(%class.B*)
+declare void @_ZN1B6appendEv(ptr)
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
-declare i1 @llvm.type.test(i8*, metadata)
+declare i1 @llvm.type.test(ptr, metadata)
declare void @llvm.assume(i1)
; In this case, both cleanup pads can be eliminated and the invoke can be
; converted to a call.
;
-define void @f1() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define void @f1() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @g()
; should unwind to the caller (that is, exception handling continues with the
; parent frame of the caller).
;
-define void @f2() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define void @f2() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[B:%.*]] = alloca [[STRUCT_S2:%.*]], align 1
; CHECK-NEXT: to label [[TRY_CONT:%.*]] unwind label [[EHCLEANUP:%.*]]
; CHECK: ehcleanup:
; CHECK-NEXT: [[TMP0:%.*]] = cleanuppad within none []
-; CHECK-NEXT: call void @"\01??1S2@@QEAA@XZ"(%struct.S2* [[B]])
+; CHECK-NEXT: call void @"\01??1S2@@QEAA@XZ"(ptr [[B]])
; CHECK-NEXT: cleanupret from [[TMP0]] unwind label [[CATCH_DISPATCH:%.*]]
; CHECK: catch.dispatch:
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch] unwind to caller
; CHECK: catch:
-; CHECK-NEXT: [[TMP1:%.*]] = catchpad within [[CS1]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: [[TMP1:%.*]] = catchpad within [[CS1]] [ptr null, i32 64, ptr null]
; CHECK-NEXT: catchret from [[TMP1]] to label [[TRY_CONT]]
; CHECK: try.cont:
; CHECK-NEXT: ret void
ehcleanup: ; preds = %entry
%0 = cleanuppad within none []
- call void @"\01??1S2@@QEAA@XZ"(%struct.S2* %b)
+ call void @"\01??1S2@@QEAA@XZ"(ptr %b)
cleanupret from %0 unwind label %catch.dispatch
catch.dispatch: ; preds = %ehcleanup
%cs1 = catchswitch within none [label %catch] unwind label %ehcleanup.1
catch: ; preds = %catch.dispatch
- %1 = catchpad within %cs1 [i8* null, i32 u0x40, i8* null]
+ %1 = catchpad within %cs1 [ptr null, i32 u0x40, ptr null]
catchret from %1 to label %catchret.dest
catchret.dest: ; preds = %catch
; In this case the inner cleanup pad should be eliminated and the invoke of g()
; should unwind directly to the catchpad.
-define void @f3() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define void @f3() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca [[STRUCT_S2:%.*]], align 1
; CHECK: catch.dispatch:
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch] unwind label [[EHCLEANUP_1:%.*]]
; CHECK: catch:
-; CHECK-NEXT: [[CP2:%.*]] = catchpad within [[CS1]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: [[CP2:%.*]] = catchpad within [[CS1]] [ptr null, i32 64, ptr null]
; CHECK-NEXT: catchret from [[CP2]] to label [[TRY_CONT]]
; CHECK: try.cont:
; CHECK-NEXT: ret void
; CHECK: ehcleanup.1:
; CHECK-NEXT: [[CP3:%.*]] = cleanuppad within none []
-; CHECK-NEXT: call void @"\01??1S2@@QEAA@XZ"(%struct.S2* [[A]])
+; CHECK-NEXT: call void @"\01??1S2@@QEAA@XZ"(ptr [[A]])
; CHECK-NEXT: cleanupret from [[CP3]] unwind to caller
;
entry:
%cs1 = catchswitch within none [label %catch] unwind label %ehcleanup.1
catch: ; preds = %catch.dispatch
- %cp2 = catchpad within %cs1 [i8* null, i32 u0x40, i8* null]
+ %cp2 = catchpad within %cs1 [ptr null, i32 u0x40, ptr null]
catchret from %cp2 to label %catchret.dest
catchret.dest: ; preds = %catch
ehcleanup.1:
%cp3 = cleanuppad within none []
- call void @"\01??1S2@@QEAA@XZ"(%struct.S2* %a)
+ call void @"\01??1S2@@QEAA@XZ"(ptr %a)
cleanupret from %cp3 unwind to caller
}
; Note: The cleanuppad simplification will insert an unconditional branch here
; but it will be eliminated, placing the following invoke in the entry BB.
;
-define void @f4() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define void @f4() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f4(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @g()
; CHECK: catch.dispatch:
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch] unwind to caller
; CHECK: catch:
-; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [ptr null, i32 64, ptr null]
; CHECK-NEXT: catchret from [[TMP0]] to label [[TRY_CONT]]
; CHECK: try.cont:
; CHECK-NEXT: ret void
%cs1 = catchswitch within none [label %catch] unwind label %ehcleanup
catch: ; preds = %catch.dispatch
- %0 = catchpad within %cs1 [i8* null, i32 u0x40, i8* null]
+ %0 = catchpad within %cs1 [ptr null, i32 u0x40, ptr null]
catchret from %0 to label %try.cont
try.cont: ; preds = %catch, %invoke.cont
; In this case, the cleanup pad should be eliminated and the PHI node in the
; cleanup pad should be sunk into the catch dispatch block.
;
-define i32 @f6() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define i32 @f6() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f6(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @g()
; CHECK-NEXT: [[STATE_0:%.*]] = phi i32 [ 2, [[INVOKE_CONT]] ], [ 1, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch] unwind to caller
; CHECK: catch:
-; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [ptr null, i32 64, ptr null]
; CHECK-NEXT: catchret from [[TMP0]] to label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[STATE_0]], [[CATCH:%.*]] ], [ 0, [[INVOKE_CONT]] ]
%cs1 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catch.dispatch
- %1 = catchpad within %cs1 [i8* null, i32 u0x40, i8* null]
+ %1 = catchpad within %cs1 [ptr null, i32 u0x40, ptr null]
catchret from %1 to label %return
return: ; preds = %invoke.cont, %catch
; In this case, the cleanup pad should be eliminated and the PHI node in the
; cleanup pad should be merged with the PHI node in the catch dispatch block.
;
-define i32 @f7() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define i32 @f7() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f7(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @g()
; CHECK-NEXT: [[STATE_1:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ 3, [[INVOKE_CONT_1]] ], [ 2, [[INVOKE_CONT]] ]
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch] unwind to caller
; CHECK: catch:
-; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [ptr null, i32 64, ptr null]
; CHECK-NEXT: catchret from [[TMP0]] to label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[STATE_1]], [[CATCH:%.*]] ], [ 0, [[INVOKE_CONT_1]] ]
%cs1 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catch.dispatch
- %1 = catchpad within %cs1 [i8* null, i32 u0x40, i8* null]
+ %1 = catchpad within %cs1 [ptr null, i32 u0x40, ptr null]
catchret from %1 to label %return
return: ; preds = %invoke.cont.1, %catch
; should have an incoming value entry for path from 'foo' that references the
; PHI node itself.
;
-define void @f8() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define void @f8() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f8(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @g()
; CHECK-NEXT: [[X:%.*]] = phi i32 [ 2, [[INVOKE_CONT]] ], [ 1, [[ENTRY:%.*]] ], [ [[X]], [[CATCH_CONT:%.*]] ]
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch] unwind to caller
; CHECK: catch:
-; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [ptr null, i32 64, ptr null]
; CHECK-NEXT: call void @use_x(i32 [[X]])
; CHECK-NEXT: catchret from [[TMP0]] to label [[CATCH_CONT]]
; CHECK: catch.cont:
%cs1 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catch.dispatch
- %1 = catchpad within %cs1 [i8* null, i32 u0x40, i8* null]
+ %1 = catchpad within %cs1 [ptr null, i32 u0x40, ptr null]
call void @use_x(i32 %x)
catchret from %1 to label %catch.cont
return: ; preds = %invoke.cont, %catch.cont
ret void
}
-define i32 @f9() personality i32 (...)* @__CxxFrameHandler3 {
+define i32 @f9() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[S:%.*]] = alloca i8, align 1
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[S]])
-; CHECK-NEXT: [[BC:%.*]] = bitcast i8* [[S]] to %struct.S2*
-; CHECK-NEXT: invoke void @"\01??1S2@@QEAA@XZ"(%struct.S2* [[BC]])
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[S]])
+; CHECK-NEXT: invoke void @"\01??1S2@@QEAA@XZ"(ptr [[S]])
; CHECK-NEXT: to label [[TRY_CONT:%.*]] unwind label [[CATCH_DISPATCH:%.*]]
; CHECK: catch.dispatch:
; CHECK-NEXT: [[CATCH_SWITCH:%.*]] = catchswitch within none [label %catch] unwind to caller
; CHECK: catch:
-; CHECK-NEXT: [[CATCH_PAD:%.*]] = catchpad within [[CATCH_SWITCH]] [i8* null, i32 0, i8* null]
+; CHECK-NEXT: [[CATCH_PAD:%.*]] = catchpad within [[CATCH_SWITCH]] [ptr null, i32 0, ptr null]
; CHECK-NEXT: catchret from [[CATCH_PAD]] to label [[TRY_CONT]]
; CHECK: try.cont:
; CHECK-NEXT: ret i32 0
;
entry:
%s = alloca i8, align 1
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %s)
- %bc = bitcast i8* %s to %struct.S2*
- invoke void @"\01??1S2@@QEAA@XZ"(%struct.S2* %bc)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %s)
+ invoke void @"\01??1S2@@QEAA@XZ"(ptr %s)
to label %try.cont unwind label %ehcleanup
ehcleanup:
%cleanup.pad = cleanuppad within none []
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %s)
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %s)
cleanupret from %cleanup.pad unwind label %catch.dispatch
catch.dispatch:
%catch.switch = catchswitch within none [label %catch] unwind to caller
catch:
- %catch.pad = catchpad within %catch.switch [i8* null, i32 0, i8* null]
+ %catch.pad = catchpad within %catch.switch [ptr null, i32 0, ptr null]
catchret from %catch.pad to label %try.cont
try.cont:
ret i32 0
}
-define void @f10(i32 %V) personality i32 (...)* @__CxxFrameHandler3 {
+define void @f10(i32 %V) personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f10(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @g()
; This case tests the handling of an empty cleanup pad that
; contains a lifetime_end intrinsic and does not dominate its
; successor.
-define void @f11() personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
+define void @f11() personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @f11(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @g()
; CHECK: catch.dispatch:
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch] unwind to caller
; CHECK: catch:
-; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS1]] [ptr null, i32 64, ptr null]
; CHECK-NEXT: catchret from [[TMP0]] to label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: ret void
to label %return unwind label %catch.dispatch
ehcleanup: ; preds = %invoke.cont, %entry
- %x = phi i8* [ undef, %invoke.cont ], [ undef, %entry ]
+ %x = phi ptr [ undef, %invoke.cont ], [ undef, %entry ]
%0 = cleanuppad within none []
- call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull %x)
+ call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %x)
cleanupret from %0 unwind label %catch.dispatch
catch.dispatch: ; preds = %ehcleanup, %invoke.cont
%cs1 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catch.dispatch
- %1 = catchpad within %cs1 [i8* null, i32 u0x40, i8* null]
+ %1 = catchpad within %cs1 [ptr null, i32 u0x40, ptr null]
catchret from %1 to label %return
return: ; preds = %invoke.cont, %catch.cont
%struct.S = type { i8 }
%struct.S2 = type { i8 }
-declare void @"\01??1S2@@QEAA@XZ"(%struct.S2*)
+declare void @"\01??1S2@@QEAA@XZ"(ptr)
declare void @g()
declare void @use_x(i32 %x)
declare i32 @__CxxFrameHandler3(...)
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
@f = external global i32, align 4
@g = external global i32, align 4
-define i32* @a(i32 %h) #0 {
+define ptr @a(i32 %h) #0 {
entry:
%h.addr = alloca i32, align 4
- store i32 %h, i32* %h.addr, align 4
- %tmp0 = load i32, i32* %h.addr, align 4
+ store i32 %h, ptr %h.addr, align 4
+ %tmp0 = load i32, ptr %h.addr, align 4
switch i32 %tmp0, label %sw.default [
i32 4, label %sw.bb
i32 3, label %sw.bb1
sw.bb3: ; preds = %entry
%call4 = call i32 (...) @c()
%conv = sext i32 %call4 to i64
- %tmp1 = inttoptr i64 %conv to i32*
- ret i32* %tmp1
+ %tmp1 = inttoptr i64 %conv to ptr
+ ret ptr %tmp1
sw.default: ; preds = %entry
unreachable
define internal i32 @j() #0 {
entry:
%i = alloca i32, align 4
- store i32 0, i32* %i, align 4
+ store i32 0, ptr %i, align 4
br label %for.cond
for.cond: ; preds = %for.body, %entry
- %tmp0 = load i32, i32* %i, align 4
- %tmp1 = load i32, i32* @f, align 4
+ %tmp0 = load i32, ptr %i, align 4
+ %tmp1 = load i32, ptr @f, align 4
%cmp = icmp ult i32 %tmp0, %tmp1
br i1 %cmp, label %for.body, label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.cond
- %tmp2 = load i32, i32* @f, align 4
- %call3 = call i32* @a(i32 %tmp2)
+ %tmp2 = load i32, ptr @f, align 4
+ %call3 = call ptr @a(i32 %tmp2)
ret i32 undef
for.body: ; preds = %for.cond
%call = call i32 (...) @c()
%call1 = call i32 (...) @c()
%call2 = call i32 (...) @c()
- %tmp3 = load i32, i32* @b, align 4
- %tmp4 = load i32, i32* @g, align 4
+ %tmp3 = load i32, ptr @b, align 4
+ %tmp4 = load i32, ptr @g, align 4
%sub = sub nsw i32 %tmp4, %tmp3
- store i32 %sub, i32* @g, align 4
- %tmp5 = load i32, i32* %i, align 4
+ store i32 %sub, ptr @g, align 4
+ %tmp5 = load i32, ptr %i, align 4
%inc = add i32 %tmp5, 1
- store i32 %inc, i32* %i, align 4
+ store i32 %inc, ptr %i, align 4
br label %for.cond
}
declare i32 @c(...) #0
; Function Attrs: argmemonly nounwind
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2
; Function Attrs: argmemonly nounwind
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2
attributes #0 = { "use-soft-float"="false" }
attributes #1 = { "target-cpu"="x86-64" }
target triple = "x86_64-pc-windows-msvc18.0.0"
; Function Attrs: uwtable
-define void @test1() #0 personality i32 (...)* @__CxxFrameHandler3 {
+define void @test1() #0 personality ptr @__CxxFrameHandler3 {
entry:
invoke void @may_throw(i32 3)
to label %invoke.cont unwind label %ehcleanup
target triple = "x86_64-unknown-linux-gnu"
; More interesting test, here we can merge the invokes.
-define void @t1_mergeable_invoke() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t1_mergeable_invoke() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t1_mergeable_invoke(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond(), !dbg [[DBG12:![0-9]+]]
; CHECK-NEXT: call void @llvm.dbg.value(metadata i1 [[C0]], metadata [[META9:![0-9]+]], metadata !DIExpression()), !dbg [[DBG12]]
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]], !dbg [[DBG13:![0-9]+]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup, !dbg [[DBG14:![0-9]+]]
; CHECK-NEXT: call void @destructor(), !dbg [[DBG15:![0-9]+]]
-; CHECK-NEXT: resume { i8*, i32 } [[EH]], !dbg [[DBG16:![0-9]+]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]], !dbg [[DBG16:![0-9]+]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond(), !dbg [[DBG17:![0-9]+]]
; CHECK-NEXT: call void @llvm.dbg.value(metadata i1 [[C1]], metadata [[META11:![0-9]+]], metadata !DIExpression()), !dbg [[DBG17]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
target triple = "x86_64-unknown-linux-gnu"
; Simple test, nothing interesting happens here.
-define void @t0_noop() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t0_noop() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t0_noop(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C:%.*]] = call i1 @cond()
; CHECK: invoke.cont:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.end:
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: ret void
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.end:
call void @sideeffect()
}
; More interesting test, here we can merge the invokes.
-define void @t1_mergeable_invoke() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t1_mergeable_invoke() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t1_mergeable_invoke(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; normal block is shared, but it is unreachable, so we are fine.
-define void @t2_shared_normal_dest() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t2_shared_normal_dest() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t2_shared_normal_dest(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; shared normal destination is not unreachable.
-define void @t3_shared_identical_normal_dest() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t3_shared_identical_normal_dest() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t3_shared_identical_normal_dest(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; normal destinations are not unreachable and not shared and can not be merged.
-define void @t4_normal_dests() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t4_normal_dests() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t4_normal_dests(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Invokes lead to different landing pads.
-define void @t5_different_landingpads() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t5_different_landingpads() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t5_different_landingpads(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: invoke.cont0:
; CHECK-NEXT: unreachable
; CHECK: common.resume:
-; CHECK-NEXT: [[COMMON_RESUME_OP:%.*]] = phi { i8*, i32 } [ [[EH0:%.*]], [[LPAD0]] ], [ [[EH1:%.*]], [[LPAD1:%.*]] ]
-; CHECK-NEXT: resume { i8*, i32 } [[COMMON_RESUME_OP]]
+; CHECK-NEXT: [[COMMON_RESUME_OP:%.*]] = phi { ptr, i32 } [ [[EH0:%.*]], [[LPAD0]] ], [ [[EH1:%.*]], [[LPAD1:%.*]] ]
+; CHECK-NEXT: resume { ptr, i32 } [[COMMON_RESUME_OP]]
; CHECK: lpad0:
-; CHECK-NEXT: [[EH0]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH0]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
; CHECK-NEXT: br label [[COMMON_RESUME:%.*]]
; CHECK: invoke.cont2:
; CHECK-NEXT: unreachable
; CHECK: lpad1:
-; CHECK-NEXT: [[EH1]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH1]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @another_destructor()
; CHECK-NEXT: br label [[COMMON_RESUME]]
unreachable
lpad0:
- %eh0 = landingpad { i8*, i32 } cleanup
+ %eh0 = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh0
+ resume { ptr, i32 } %eh0
if.else:
%c1 = call i1 @cond()
unreachable
lpad1:
- %eh1 = landingpad { i8*, i32 } cleanup
+ %eh1 = landingpad { ptr, i32 } cleanup
call void @another_destructor()
- resume { i8*, i32 } %eh1
+ resume { ptr, i32 } %eh1
if.end:
call void @sideeffect()
}
; The invoked functions are different
-define void @t6_different_invokes() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t6_different_invokes() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t6_different_invokes(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: invoke.cont0:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Merging of this invoke is disallowed
-define void @t7_nomerge0() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t7_nomerge0() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t7_nomerge0(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: invoke.cont0:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
call void @sideeffect()
ret void
}
-define void @t8_nomerge1() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t8_nomerge1() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t8_nomerge1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: invoke.cont0:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
call void @sideeffect()
ret void
}
-define void @t9_nomerge2() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t9_nomerge2() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t9_nomerge2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: invoke.cont0:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Just don't deal with inlineasm.
-define void @t10_inlineasm() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t10_inlineasm() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t10_inlineasm(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: invoke.cont0:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; landingpad has PHI nodes, and the incoming values are incompatible.
-define void @t11_phi_in_landingpad_incompatible_incoming_values() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t11_phi_in_landingpad_incompatible_incoming_values() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t11_phi_in_landingpad_incompatible_incoming_values(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: unreachable
; CHECK: lpad:
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, [[IF_THEN0]] ], [ 1, [[IF_THEN1:%.*]] ]
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @consume(i32 [[PHI]])
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1]], label [[IF_END:%.*]]
lpad:
%phi = phi i32 [ 0, %if.then0 ], [ 1, %if.then1 ]
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @consume(i32 %phi)
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; It is okay for the invoke to take arguments
-define void @t12_arguments_are_fine() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t12_arguments_are_fine() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t12_arguments_are_fine(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; It is okay for the invoke to take different arguments
-define void @t13_different_arguments_are_fine() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t13_different_arguments_are_fine() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t13_different_arguments_are_fine(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; There can be more than two invokes in a set
-define void @t14_three_invokes() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t14_three_invokes() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t14_three_invokes(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN2_INVOKE:%.*]], label [[IF_ELSE0:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else0:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN2_INVOKE]], label [[IF_ELSE1:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else0:
%c1 = call i1 @cond()
}
; If not all invokes of landingpad are compatible then we still merge compatible ones.
-define void @t15_three_invokes_only_two_compatible() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t15_three_invokes_only_two_compatible() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t15_three_invokes_only_two_compatible(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE0:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else0:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_ELSE1:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else0:
%c1 = call i1 @cond()
}
; We succeed in merging invokes into two sets
-define void @t16_four_invokes_forming_two_sets() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t16_four_invokes_forming_two_sets() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t16_four_invokes_forming_two_sets(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE0:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else0:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_ELSE1:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else0:
%c1 = call i1 @cond()
}
; Attributes must match
-define void @t17_mismatched_attrs_prevent_merge() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t17_mismatched_attrs_prevent_merge() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t17_mismatched_attrs_prevent_merge(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: invoke.cont0:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Common attributes are preserved
-define void @t18_attributes_are_preserved() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t18_attributes_are_preserved() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t18_attributes_are_preserved(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Fully identical operand bundles are good.
-define void @t19_compatible_operand_bundle() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t19_compatible_operand_bundle() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t19_compatible_operand_bundle(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Operand bundles must be compatible, else we can't merge.
-define void @t20_incompatible_operand_bundle() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t20_incompatible_operand_bundle() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t20_incompatible_operand_bundle(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: invoke.cont0:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; We need to PHI together the arguments of the operand bundles.
-define void @t21_semicompatible_operand_bundle() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t21_semicompatible_operand_bundle() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t21_semicompatible_operand_bundle(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
; Even though the normal destinations are unreachable,
; they may have (dead) PHI nodes, so we must cleanup them.
-define void @t22_dead_phi_in_normal_dest() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t22_dead_phi_in_normal_dest() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t22_dead_phi_in_normal_dest(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
invoke void @maybe_throw() to label %invoke.cont0 unwind label %lpad
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; landingpad has PHI nodes, and out of three invokes, only two have compatible incoming values.
-define void @t23_phi_in_landingpad_compatible_incoming_values() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t23_phi_in_landingpad_compatible_incoming_values() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t23_phi_in_landingpad_compatible_incoming_values(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE0:%.*]]
; CHECK: lpad:
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[IF_THEN2:%.*]] ], [ 0, [[IF_THEN1_INVOKE]] ]
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @consume(i32 [[PHI]])
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else0:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_ELSE1:%.*]]
lpad:
%phi = phi i32 [ 0, %if.then0 ], [ 0, %if.then1 ], [ -1, %if.then2 ]
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @consume(i32 %phi)
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else0:
%c1 = call i1 @cond()
; landingpad has two PHI nodes, but depending on which PHI you look,
; the invoke sets would be different, so we can't merge invokes here.
-define void @t24_phi_in_landingpad_semi_compatible_incoming_values() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t24_phi_in_landingpad_semi_compatible_incoming_values() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t24_phi_in_landingpad_semi_compatible_incoming_values(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK: lpad:
; CHECK-NEXT: [[PHI0:%.*]] = phi i32 [ 0, [[IF_THEN0]] ], [ 0, [[IF_THEN1:%.*]] ], [ -1, [[IF_THEN2:%.*]] ]
; CHECK-NEXT: [[PHI1:%.*]] = phi i32 [ 0, [[IF_THEN0]] ], [ 1, [[IF_THEN1]] ], [ 1, [[IF_THEN2]] ]
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @consume(i32 [[PHI0]])
; CHECK-NEXT: call void @consume(i32 [[PHI1]])
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else0:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1]], label [[IF_ELSE1:%.*]]
lpad:
%phi0 = phi i32 [ 0, %if.then0 ], [ 0, %if.then1 ], [ -1, %if.then2 ]
%phi1= phi i32 [ 0, %if.then0 ], [ 1, %if.then1 ], [ 1, %if.then2 ]
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @consume(i32 %phi0)
call void @consume(i32 %phi1)
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else0:
%c1 = call i1 @cond()
}
; The normal destinations are shared, but the incoming values are incompatible.
-define void @t25_incompatible_phis_in_normal_destination() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t25_incompatible_phis_in_normal_destination() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t25_incompatible_phis_in_normal_destination(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; shared normal destination has PHI nodes, and out of three invokes, only two have compatible incoming values.
-define void @t26_phi_in_normal_dest_compatible_incoming_values() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t26_phi_in_normal_dest_compatible_incoming_values() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t26_phi_in_normal_dest_compatible_incoming_values(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else0:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_ELSE1:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else0:
%c1 = call i1 @cond()
}
; Invokes return values, but they are unused.
-define void @t27_invoke_ret_value_is_used() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t27_invoke_ret_value_is_used() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t27_invoke_ret_value_is_used(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Invokes return values, and they are used in a phi node, making the incoming values incompatible.
-define void @t28_invoke_ret_value_is_used_in_phi_node() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t28_invoke_ret_value_is_used_in_phi_node() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t28_invoke_ret_value_is_used_in_phi_node(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; out of three invokes, two share normal destination and another one has unreachable destination
-define void @t29_common_normal_destination_and_unreachable_normal_destination() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t29_common_normal_destination_and_unreachable_normal_destination() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t29_common_normal_destination_and_unreachable_normal_destination(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else0:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_ELSE1:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else0:
%c1 = call i1 @cond()
}
; normal destinations are not unreachable and different but could be merged
-define void @t30_completely_different_normal_dests() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t30_completely_different_normal_dests() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t30_completely_different_normal_dests(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1:%.*]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
; Even though the normal destinations are unreachable,
; they may have (dead) PHI nodes with incompatible incoming values,
; so we must cleanup them.
-define void @t31_incompatible_dead_phi_in_normal_dest() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t31_incompatible_dead_phi_in_normal_dest() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t31_incompatible_dead_phi_in_normal_dest(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
invoke void @maybe_throw() to label %invoke.cont unwind label %lpad
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
; Invokes return values, and they are used in a phi node, making the incoming values incompatible,
; second phi has compatible incoming values
-define void @t32_invoke_ret_value_is_used_in_phi_node_other_phi_is_fine() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t32_invoke_ret_value_is_used_in_phi_node_other_phi_is_fine() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t32_invoke_ret_value_is_used_in_phi_node_other_phi_is_fine(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
; Invokes return values, and they are used in a phi node, making the incoming values incompatible,
; second phi has incompatible incoming values.
-define void @t33_invoke_ret_value_is_used_in_phi_node_other_phi_is_bad() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t33_invoke_ret_value_is_used_in_phi_node_other_phi_is_bad() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t33_invoke_ret_value_is_used_in_phi_node_other_phi_is_bad(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
; Invokes return values, and they are used in a phi node, but when coming from different invokes,
; the incoming value isn't always the invoke, which is not okay.
-define void @t34_invoke_ret_value_maybe_incompatibly_used_in_phi_node() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t34_invoke_ret_value_maybe_incompatibly_used_in_phi_node() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t34_invoke_ret_value_maybe_incompatibly_used_in_phi_node(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: call void @sideeffect()
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Two mergeable indirect calls, with identical callees.
-define void @t35_identical_indirect_callees(void()* %callee) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t35_identical_indirect_callees(ptr %callee) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t35_identical_indirect_callees(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Two mergeable indirect calls, with different callees.
-define void @t36_different_indirect_callees(void()* %callee0, void()* %callee1) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t36_different_indirect_callees(ptr %callee0, ptr %callee1) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t36_different_indirect_callees(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
; CHECK: if.then1.invoke:
-; CHECK-NEXT: [[TMP0:%.*]] = phi void ()* [ [[CALLEE1:%.*]], [[IF_ELSE]] ], [ [[CALLEE0:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = phi ptr [ [[CALLEE1:%.*]], [[IF_ELSE]] ], [ [[CALLEE0:%.*]], [[ENTRY:%.*]] ]
; CHECK-NEXT: invoke void [[TMP0]]()
; CHECK-NEXT: to label [[IF_THEN1_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: if.then1.cont:
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; Don't merge direct invoke with indirect ones.
-define void @t37_three_invokes_two_indirect_one_direct(void()* %callee) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t37_three_invokes_two_indirect_one_direct(ptr %callee) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t37_three_invokes_two_indirect_one_direct(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE0:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else0:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_ELSE1:%.*]]
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else0:
%c1 = call i1 @cond()
}
; For indirect invokes, different arguments are fine.
-define void @t38_different_arguments_and_operand_bundes_are_fine(void(i32)* %callee0, void(i32)* %callee1) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t38_different_arguments_and_operand_bundes_are_fine(ptr %callee0, ptr %callee1) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t38_different_arguments_and_operand_bundes_are_fine(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
; CHECK: if.then1.invoke:
; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ 42, [[IF_ELSE]] ], [ 0, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = phi void (i32)* [ [[CALLEE1:%.*]], [[IF_ELSE]] ], [ [[CALLEE0:%.*]], [[ENTRY]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = phi ptr [ [[CALLEE1:%.*]], [[IF_ELSE]] ], [ [[CALLEE0:%.*]], [[ENTRY]] ]
; CHECK-NEXT: invoke void [[TMP1]](i32 [[TMP0]])
; CHECK-NEXT: to label [[IF_THEN1_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: if.then1.cont:
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; For indirect invokes, different operand bundle arguments are fine.
-define void @t39_different_arguments_and_operand_bundes_are_fine(void()* %callee0, void()* %callee1) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t39_different_arguments_and_operand_bundes_are_fine(ptr %callee0, ptr %callee1) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t39_different_arguments_and_operand_bundes_are_fine(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
; CHECK: if.then1.invoke:
; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ 0, [[IF_ELSE]] ], [ 42, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = phi void ()* [ [[CALLEE1:%.*]], [[IF_ELSE]] ], [ [[CALLEE0:%.*]], [[ENTRY]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = phi ptr [ [[CALLEE1:%.*]], [[IF_ELSE]] ], [ [[CALLEE0:%.*]], [[ENTRY]] ]
; CHECK-NEXT: invoke void [[TMP1]]() [ "abc"(i32 [[TMP0]]) ]
; CHECK-NEXT: to label [[IF_THEN1_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: if.then1.cont:
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
}
; For indirect invokes, both different arguments and operand bundle arguments are fine.
-define void @t40_different_arguments_and_operand_bundes_are_fine(void(i32)* %callee0, void(i32)* %callee1) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @t40_different_arguments_and_operand_bundes_are_fine(ptr %callee0, ptr %callee1) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @t40_different_arguments_and_operand_bundes_are_fine(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C0:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C0]], label [[IF_THEN1_INVOKE:%.*]], label [[IF_ELSE:%.*]]
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @destructor()
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
; CHECK: if.else:
; CHECK-NEXT: [[C1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C1]], label [[IF_THEN1_INVOKE]], label [[IF_END:%.*]]
; CHECK: if.then1.invoke:
; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ 42, [[IF_ELSE]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ 0, [[IF_ELSE]] ], [ 42, [[ENTRY]] ]
-; CHECK-NEXT: [[TMP2:%.*]] = phi void (i32)* [ [[CALLEE1:%.*]], [[IF_ELSE]] ], [ [[CALLEE0:%.*]], [[ENTRY]] ]
+; CHECK-NEXT: [[TMP2:%.*]] = phi ptr [ [[CALLEE1:%.*]], [[IF_ELSE]] ], [ [[CALLEE0:%.*]], [[ENTRY]] ]
; CHECK-NEXT: invoke void [[TMP2]](i32 [[TMP0]]) [ "abc"(i32 [[TMP1]]) ]
; CHECK-NEXT: to label [[IF_THEN1_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: if.then1.cont:
unreachable
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @destructor()
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
if.else:
%c1 = call i1 @cond()
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -mtriple=x86_64-unknown-unknown < %s -simplifycfg-merge-cond-stores=true -simplifycfg-merge-cond-stores-aggressively=false -phi-node-folding-threshold=2 -S | FileCheck %s
-define void @test_costly(i32* %p, i32 %a, i32 %b, i32 %c, i32 %d) {
+define void @test_costly(ptr %p, i32 %a, i32 %b, i32 %c, i32 %d) {
; CHECK-LABEL: @test_costly(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X1:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[X1]], label [[FALLTHROUGH:%.*]], label [[YES1:%.*]]
; CHECK: yes1:
; CHECK-NEXT: [[VAL0:%.*]] = sdiv i32 [[D:%.*]], [[C:%.*]]
-; CHECK-NEXT: store i32 [[VAL0]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[VAL0]], ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[FALLTHROUGH]]
; CHECK: fallthrough:
; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B:%.*]], 0
; CHECK-NEXT: br i1 [[X2]], label [[END:%.*]], label [[YES2:%.*]]
; CHECK: yes2:
; CHECK-NEXT: [[VAL1:%.*]] = sdiv i32 [[C]], [[D]]
-; CHECK-NEXT: store i32 [[VAL1]], i32* [[P]], align 4
+; CHECK-NEXT: store i32 [[VAL1]], ptr [[P]], align 4
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: ret void
yes1:
%val0 = sdiv i32 %d, %c
- store i32 %val0, i32* %p
+ store i32 %val0, ptr %p
br label %fallthrough
fallthrough:
yes2:
%val1 = sdiv i32 %c, %d
- store i32 %val1, i32* %p
+ store i32 %val1, ptr %p
br label %end
end:
; CHECK-LABEL: entry
; CHECK: %foo = alloca i32, align 4
; CHECK: %face = alloca i8, align 1
-; CHECK: %foo.0..sroa_cast = bitcast i32* %foo to i8*
-; CHECK: store volatile i32 0, i32* %foo, align 4
-; CHECK: %foo.0. = load volatile i32, i32* %foo, align 4, !dbg !16
+; CHECK: store volatile i32 0, ptr %foo, align 4
+; CHECK: %foo.0. = load volatile i32, ptr %foo, align 4, !dbg !16
; CHECK: %cmp = icmp eq i32 %foo.0., 4, !dbg !16
; CHECK: %frombool = zext i1 %cmp to i8, !dbg !16
; CHECK: call void @llvm.dbg.value(metadata i8 %frombool, metadata !13, metadata !DIExpression()), !dbg !16
entry:
%foo = alloca i32, align 4
%face = alloca i8, align 1
- %foo.0..sroa_cast = bitcast i32* %foo to i8*
- store volatile i32 0, i32* %foo, align 4
- %foo.0. = load volatile i32, i32* %foo, align 4, !dbg !26
+ store volatile i32 0, ptr %foo, align 4
+ %foo.0. = load volatile i32, ptr %foo, align 4, !dbg !26
%cmp = icmp eq i32 %foo.0., 4, !dbg !26
%frombool = zext i1 %cmp to i8, !dbg !26
call void @llvm.dbg.value(metadata i8 %frombool, metadata !15, metadata !DIExpression()), !dbg !26
if.end: ; preds = %if.else, %if.then
%beards.0 = phi i32 [ 8, %if.then ], [ 4, %if.else ]
- store volatile i8 %frombool, i8* %face, align 1
- %face.0. = load volatile i8, i8* %face, align 1
+ store volatile i8 %frombool, ptr %face, align 1
+ %face.0. = load volatile i8, ptr %face, align 1
%0 = and i8 %face.0., 1
%tobool3 = icmp eq i8 %0, 0
%cond4 = select i1 %tobool3, i32 0, i32 %beards.0
define i32 @foo(i32) !dbg !6 {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
- store i32 %0, i32* %2, align 4
- store i32 1, i32* %3, align 4, !dbg !14
- %4 = load i32, i32* %2, align 4, !dbg !15
+ store i32 %0, ptr %2, align 4
+ store i32 1, ptr %3, align 4, !dbg !14
+ %4 = load i32, ptr %2, align 4, !dbg !15
%5 = icmp ne i32 %4, 0, !dbg !15
br i1 %5, label %6, label %7, !dbg !17
; <label>:6: ; preds = %1
- store i32 0, i32* %3, align 4, !dbg !18
+ store i32 0, ptr %3, align 4, !dbg !18
br label %7, !dbg !19
; <label>:7: ; preds = %6, %1
- %8 = load i32, i32* %3, align 4, !dbg !20
+ %8 = load i32, ptr %3, align 4, !dbg !20
ret i32 %8, !dbg !21
}
; Function Attrs: uwtable
define void @_Z3fooi(i32) #0 !dbg !6 {
-; CHECK: load i32, i32* %2, align 4, !dbg ![[LOAD:[0-9]+]], !tbaa
-; CHECK: store i32 %5, i32* @x, align 4, !dbg ![[BAR:[0-9]+]], !tbaa
+; CHECK: load i32, ptr %2, align 4, !dbg ![[LOAD:[0-9]+]], !tbaa
+; CHECK: store i32 %5, ptr @x, align 4, !dbg ![[BAR:[0-9]+]], !tbaa
; CHECK: call void @_Z3barv(), !dbg ![[BAR]]
; CHECK: call void @_Z3bazv(), !dbg ![[BAZ:[0-9]+]]
%2 = alloca i32, align 4
- store i32 %0, i32* %2, align 4, !tbaa !8
- %3 = load i32, i32* %2, align 4, !dbg !12, !tbaa !8
+ store i32 %0, ptr %2, align 4, !tbaa !8
+ %3 = load i32, ptr %2, align 4, !dbg !12, !tbaa !8
%4 = icmp eq i32 %3, 0, !dbg !13
br i1 %4, label %5, label %7, !dbg !12
; <label>:5:
- %6 = load i32, i32* %2, align 4, !dbg !14, !tbaa !8
- store i32 %6, i32* @x, align 4, !dbg !15, !tbaa !8
+ %6 = load i32, ptr %2, align 4, !dbg !14, !tbaa !8
+ store i32 %6, ptr @x, align 4, !dbg !15, !tbaa !8
call void @_Z3barv(), !dbg !16
br label %9, !dbg !17
; <label>:7:
- %8 = load i32, i32* %2, align 4, !dbg !18, !tbaa !8
- store i32 %8, i32* @x, align 4, !dbg !19, !tbaa !8
+ %8 = load i32, ptr %2, align 4, !dbg !18, !tbaa !8
+ store i32 %8, ptr @x, align 4, !dbg !19, !tbaa !8
call void @_Z3barv(), !dbg !20
call void @_Z3bazv(), !dbg !21
br label %9
}
-define i32 @test4(i1 zeroext %flag, i32 %x, i32* %y) {
+define i32 @test4(i1 zeroext %flag, i32 %x, ptr %y) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[FLAG:%.*]], i32 5, i32 7
; CHECK-NEXT: [[B:%.*]] = add i32 [[X:%.*]], [[DOT]]
-; CHECK-NEXT: store i32 [[B]], i32* [[Y:%.*]], align 4
+; CHECK-NEXT: store i32 [[B]], ptr [[Y:%.*]], align 4
; CHECK-NEXT: ret i32 1
;
entry:
if.then:
%a = add i32 %x, 5
- store i32 %a, i32* %y
+ store i32 %a, ptr %y
br label %if.end
if.else:
%b = add i32 %x, 7
- store i32 %b, i32* %y
+ store i32 %b, ptr %y
br label %if.end
if.end:
}
-define i32 @test5(i1 zeroext %flag, i32 %x, i32* %y) {
+define i32 @test5(i1 zeroext %flag, i32 %x, ptr %y) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[A:%.*]] = add i32 [[X:%.*]], 5
-; CHECK-NEXT: store volatile i32 [[A]], i32* [[Y:%.*]], align 4
+; CHECK-NEXT: store volatile i32 [[A]], ptr [[Y:%.*]], align 4
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: [[B:%.*]] = add i32 [[X]], 7
-; CHECK-NEXT: store i32 [[B]], i32* [[Y]], align 4
+; CHECK-NEXT: store i32 [[B]], ptr [[Y]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret i32 1
if.then:
%a = add i32 %x, 5
- store volatile i32 %a, i32* %y
+ store volatile i32 %a, ptr %y
br label %if.end
if.else:
%b = add i32 %x, 7
- store i32 %b, i32* %y
+ store i32 %b, ptr %y
br label %if.end
if.end:
}
-define i32 @test6(i1 zeroext %flag, i32 %x, i32* %y) {
+define i32 @test6(i1 zeroext %flag, i32 %x, ptr %y) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[FLAG:%.*]], i32 5, i32 7
; CHECK-NEXT: [[B:%.*]] = add i32 [[X:%.*]], [[DOT]]
-; CHECK-NEXT: store volatile i32 [[B]], i32* [[Y:%.*]], align 4
+; CHECK-NEXT: store volatile i32 [[B]], ptr [[Y:%.*]], align 4
; CHECK-NEXT: ret i32 1
;
entry:
if.then:
%a = add i32 %x, 5
- store volatile i32 %a, i32* %y
+ store volatile i32 %a, ptr %y
br label %if.end
if.else:
%b = add i32 %x, 7
- store volatile i32 %b, i32* %y
+ store volatile i32 %b, ptr %y
br label %if.end
if.end:
}
-define i32 @test7(i1 zeroext %flag, i32 %x, i32* %y) {
+define i32 @test7(i1 zeroext %flag, i32 %x, ptr %y) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[FLAG:%.*]], i32 5, i32 7
-; CHECK-NEXT: [[W:%.*]] = load volatile i32, i32* [[Y:%.*]], align 4
+; CHECK-NEXT: [[W:%.*]] = load volatile i32, ptr [[Y:%.*]], align 4
; CHECK-NEXT: [[B:%.*]] = add i32 [[W]], [[DOT]]
-; CHECK-NEXT: store volatile i32 [[B]], i32* [[Y]], align 4
+; CHECK-NEXT: store volatile i32 [[B]], ptr [[Y]], align 4
; CHECK-NEXT: ret i32 1
;
entry:
br i1 %flag, label %if.then, label %if.else
if.then:
- %z = load volatile i32, i32* %y
+ %z = load volatile i32, ptr %y
%a = add i32 %z, 5
- store volatile i32 %a, i32* %y
+ store volatile i32 %a, ptr %y
br label %if.end
if.else:
- %w = load volatile i32, i32* %y
+ %w = load volatile i32, ptr %y
%b = add i32 %w, 7
- store volatile i32 %b, i32* %y
+ store volatile i32 %b, ptr %y
br label %if.end
if.end:
; %z and %w are in different blocks. We shouldn't sink the add because
; there may be intervening memory instructions.
-define i32 @test8(i1 zeroext %flag, i32 %x, i32* %y) {
+define i32 @test8(i1 zeroext %flag, i32 %x, ptr %y) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[Z:%.*]] = load volatile i32, i32* [[Y:%.*]], align 4
+; CHECK-NEXT: [[Z:%.*]] = load volatile i32, ptr [[Y:%.*]], align 4
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[A:%.*]] = add i32 [[Z]], 5
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: [[W:%.*]] = load volatile i32, i32* [[Y]], align 4
+; CHECK-NEXT: [[W:%.*]] = load volatile i32, ptr [[Y]], align 4
; CHECK-NEXT: [[B:%.*]] = add i32 [[W]], 7
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[B_SINK:%.*]] = phi i32 [ [[B]], [[IF_ELSE]] ], [ [[A]], [[IF_THEN]] ]
-; CHECK-NEXT: store volatile i32 [[B_SINK]], i32* [[Y]], align 4
+; CHECK-NEXT: store volatile i32 [[B_SINK]], ptr [[Y]], align 4
; CHECK-NEXT: ret i32 1
;
entry:
- %z = load volatile i32, i32* %y
+ %z = load volatile i32, ptr %y
br i1 %flag, label %if.then, label %if.else
if.then:
%a = add i32 %z, 5
- store volatile i32 %a, i32* %y
+ store volatile i32 %a, ptr %y
br label %if.end
if.else:
- %w = load volatile i32, i32* %y
+ %w = load volatile i32, ptr %y
%b = add i32 %w, 7
- store volatile i32 %b, i32* %y
+ store volatile i32 %b, ptr %y
br label %if.end
if.end:
; The extra store in %if.then means %z and %w are not equivalent.
-define i32 @test9(i1 zeroext %flag, i32 %x, i32* %y, i32* %p) {
+define i32 @test9(i1 zeroext %flag, i32 %x, ptr %y, ptr %p) {
; CHECK-LABEL: @test9(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 7, i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[Z:%.*]] = load volatile i32, i32* [[Y:%.*]], align 4
-; CHECK-NEXT: store i32 6, i32* [[P]], align 4
+; CHECK-NEXT: store i32 7, ptr [[P:%.*]], align 4
+; CHECK-NEXT: [[Z:%.*]] = load volatile i32, ptr [[Y:%.*]], align 4
+; CHECK-NEXT: store i32 6, ptr [[P]], align 4
; CHECK-NEXT: [[A:%.*]] = add i32 [[Z]], 5
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: [[W:%.*]] = load volatile i32, i32* [[Y]], align 4
+; CHECK-NEXT: [[W:%.*]] = load volatile i32, ptr [[Y]], align 4
; CHECK-NEXT: [[B:%.*]] = add i32 [[W]], 7
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[B_SINK:%.*]] = phi i32 [ [[B]], [[IF_ELSE]] ], [ [[A]], [[IF_THEN]] ]
-; CHECK-NEXT: store volatile i32 [[B_SINK]], i32* [[Y]], align 4
+; CHECK-NEXT: store volatile i32 [[B_SINK]], ptr [[Y]], align 4
; CHECK-NEXT: ret i32 1
;
entry:
br i1 %flag, label %if.then, label %if.else
if.then:
- store i32 7, i32* %p
- %z = load volatile i32, i32* %y
- store i32 6, i32* %p
+ store i32 7, ptr %p
+ %z = load volatile i32, ptr %y
+ store i32 6, ptr %p
%a = add i32 %z, 5
- store volatile i32 %a, i32* %y
+ store volatile i32 %a, ptr %y
br label %if.end
if.else:
- %w = load volatile i32, i32* %y
+ %w = load volatile i32, ptr %y
%b = add i32 %w, 7
- store volatile i32 %b, i32* %y
+ store volatile i32 %b, ptr %y
br label %if.end
if.end:
%struct.anon = type { i32, i32 }
; The GEP indexes a struct type so cannot have a variable last index.
-define i32 @test10(i1 zeroext %flag, i32 %x, i32* %y, %struct.anon* %s) {
+define i32 @test10(i1 zeroext %flag, i32 %x, ptr %y, ptr %s) {
; CHECK-LABEL: @test10(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[DUMMY:%.*]] = add i32 [[X:%.*]], 5
-; CHECK-NEXT: [[GEPA:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[S:%.*]], i32 0, i32 0
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: [[DUMMY1:%.*]] = add i32 [[X]], 6
-; CHECK-NEXT: [[GEPB:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[S]], i32 0, i32 1
+; CHECK-NEXT: [[GEPB:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], ptr [[S:%.*]], i32 0, i32 1
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
-; CHECK-NEXT: [[GEPB_SINK:%.*]] = phi i32* [ [[GEPB]], [[IF_ELSE]] ], [ [[GEPA]], [[IF_THEN]] ]
-; CHECK-NEXT: store volatile i32 [[X]], i32* [[GEPB_SINK]], align 4
+; CHECK-NEXT: [[GEPB_SINK:%.*]] = phi ptr [ [[GEPB]], [[IF_ELSE]] ], [ [[S]], [[IF_THEN]] ]
+; CHECK-NEXT: store volatile i32 [[X]], ptr [[GEPB_SINK]], align 4
; CHECK-NEXT: ret i32 1
;
entry:
if.then:
%dummy = add i32 %x, 5
- %gepa = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 0
- store volatile i32 %x, i32* %gepa
+ store volatile i32 %x, ptr %s
br label %if.end
if.else:
%dummy1 = add i32 %x, 6
- %gepb = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
- store volatile i32 %x, i32* %gepb
+ %gepb = getelementptr inbounds %struct.anon, ptr %s, i32 0, i32 1
+ store volatile i32 %x, ptr %gepb
br label %if.end
if.end:
; The TBAA metadata should be properly combined.
-define i32 @test13(i1 zeroext %flag, i32 %x, i32* %y) {
+define i32 @test13(i1 zeroext %flag, i32 %x, ptr %y) {
; CHECK-LABEL: @test13(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[FLAG:%.*]], i32 5, i32 7
-; CHECK-NEXT: [[W:%.*]] = load volatile i32, i32* [[Y:%.*]], align 4
+; CHECK-NEXT: [[W:%.*]] = load volatile i32, ptr [[Y:%.*]], align 4
; CHECK-NEXT: [[B:%.*]] = add i32 [[W]], [[DOT]]
-; CHECK-NEXT: store volatile i32 [[B]], i32* [[Y]], align 4, !tbaa [[TBAA4:![0-9]+]]
+; CHECK-NEXT: store volatile i32 [[B]], ptr [[Y]], align 4, !tbaa [[TBAA4:![0-9]+]]
; CHECK-NEXT: ret i32 1
;
entry:
br i1 %flag, label %if.then, label %if.else
if.then:
- %z = load volatile i32, i32* %y
+ %z = load volatile i32, ptr %y
%a = add i32 %z, 5
- store volatile i32 %a, i32* %y, !tbaa !3
+ store volatile i32 %a, ptr %y, !tbaa !3
br label %if.end
if.else:
- %w = load volatile i32, i32* %y
+ %w = load volatile i32, ptr %y
%b = add i32 %w, 7
- store volatile i32 %b, i32* %y, !tbaa !4
+ store volatile i32 %b, ptr %y, !tbaa !4
br label %if.end
if.end:
; The load should be commoned.
-define i32 @test14(i1 zeroext %flag, i32 %w, i32 %x, i32 %y, %struct.anon* %s) {
+define i32 @test14(i1 zeroext %flag, i32 %w, i32 %x, i32 %y, ptr %s) {
; CHECK-LABEL: @test14(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[FLAG:%.*]], i32 1, i32 4
; CHECK-NEXT: [[DOT2:%.*]] = select i1 [[FLAG]], i32 56, i32 57
; CHECK-NEXT: [[DUMMY2:%.*]] = add i32 [[X:%.*]], [[DOT]]
-; CHECK-NEXT: [[GEPB:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[S:%.*]], i32 0, i32 1
-; CHECK-NEXT: [[SV2:%.*]] = load i32, i32* [[GEPB]], align 4
+; CHECK-NEXT: [[GEPB:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], ptr [[S:%.*]], i32 0, i32 1
+; CHECK-NEXT: [[SV2:%.*]] = load i32, ptr [[GEPB]], align 4
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[SV2]], [[DOT2]]
; CHECK-NEXT: ret i32 1
;
if.then:
%dummy = add i32 %x, 1
- %gepa = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
- %sv1 = load i32, i32* %gepa
+ %gepa = getelementptr inbounds %struct.anon, ptr %s, i32 0, i32 1
+ %sv1 = load i32, ptr %gepa
%cmp1 = icmp eq i32 %sv1, 56
br label %if.end
if.else:
%dummy2 = add i32 %x, 4
- %gepb = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
- %sv2 = load i32, i32* %gepb
+ %gepb = getelementptr inbounds %struct.anon, ptr %s, i32 0, i32 1
+ %sv2 = load i32, ptr %gepb
%cmp2 = icmp eq i32 %sv2, 57
call void @llvm.dbg.value(metadata i32 0, metadata !9, metadata !DIExpression()), !dbg !11
br label %if.end
; The load should be commoned.
-define i32 @test15(i1 zeroext %flag, i32 %w, i32 %x, i32 %y, %struct.anon* %s) {
+define i32 @test15(i1 zeroext %flag, i32 %w, i32 %x, i32 %y, ptr %s) {
; CHECK-LABEL: @test15(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[DUMMY:%.*]] = add i32 [[X:%.*]], 1
-; CHECK-NEXT: [[GEPA:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[S:%.*]], i32 0, i32 0
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: [[DUMMY2:%.*]] = add i32 [[X]], 4
-; CHECK-NEXT: [[GEPB:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[S]], i32 0, i32 1
+; CHECK-NEXT: [[GEPB:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], ptr [[S:%.*]], i32 0, i32 1
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
-; CHECK-NEXT: [[GEPB_SINK:%.*]] = phi i32* [ [[GEPB]], [[IF_ELSE]] ], [ [[GEPA]], [[IF_THEN]] ]
+; CHECK-NEXT: [[GEPB_SINK:%.*]] = phi ptr [ [[GEPB]], [[IF_ELSE]] ], [ [[S]], [[IF_THEN]] ]
; CHECK-NEXT: [[DOTSINK:%.*]] = phi i64 [ 57, [[IF_ELSE]] ], [ 56, [[IF_THEN]] ]
-; CHECK-NEXT: [[SV2:%.*]] = load i32, i32* [[GEPB_SINK]], align 4
+; CHECK-NEXT: [[SV2:%.*]] = load i32, ptr [[GEPB_SINK]], align 4
; CHECK-NEXT: [[EXT2:%.*]] = zext i32 [[SV2]] to i64
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i64 [[EXT2]], [[DOTSINK]]
; CHECK-NEXT: ret i32 1
if.then:
%dummy = add i32 %x, 1
- %gepa = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 0
- %sv1 = load i32, i32* %gepa
+ %sv1 = load i32, ptr %s
%ext1 = zext i32 %sv1 to i64
%cmp1 = icmp eq i64 %ext1, 56
br label %if.end
if.else:
%dummy2 = add i32 %x, 4
- %gepb = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
- %sv2 = load i32, i32* %gepb
+ %gepb = getelementptr inbounds %struct.anon, ptr %s, i32 0, i32 1
+ %sv2 = load i32, ptr %gepb
%ext2 = zext i32 %sv2 to i64
%cmp2 = icmp eq i64 %ext2, 57
br label %if.end
}
-define zeroext i1 @test_crash(i1 zeroext %flag, i32* %i4, i32* %m, i32* %n) {
+define zeroext i1 @test_crash(i1 zeroext %flag, ptr %i4, ptr %m, ptr %n) {
; CHECK-LABEL: @test_crash(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I4:%.*]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I4:%.*]], align 4
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[M:%.*]], align 4
-; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[N:%.*]], align 4
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[M:%.*]], align 4
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N:%.*]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[TMP4_SINK:%.*]] = phi i32 [ [[TMP4]], [[IF_ELSE]] ], [ -1, [[IF_THEN]] ]
; CHECK-NEXT: [[TMP3_SINK:%.*]] = phi i32 [ [[TMP3]], [[IF_ELSE]] ], [ [[TMP1]], [[IF_THEN]] ]
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP3_SINK]], [[TMP4_SINK]]
-; CHECK-NEXT: store i32 [[TMP5]], i32* [[I4]], align 4
+; CHECK-NEXT: store i32 [[TMP5]], ptr [[I4]], align 4
; CHECK-NEXT: ret i1 true
;
entry:
br i1 %flag, label %if.then, label %if.else
if.then:
- %tmp1 = load i32, i32* %i4
+ %tmp1 = load i32, ptr %i4
%tmp2 = add i32 %tmp1, -1
- store i32 %tmp2, i32* %i4
+ store i32 %tmp2, ptr %i4
br label %if.end
if.else:
- %tmp3 = load i32, i32* %m
- %tmp4 = load i32, i32* %n
+ %tmp3 = load i32, ptr %m
+ %tmp4 = load i32, ptr %n
%tmp5 = add i32 %tmp3, %tmp4
- store i32 %tmp5, i32* %i4
+ store i32 %tmp5, ptr %i4
br label %if.end
if.end:
}
-define zeroext i1 @test16a(i1 zeroext %flag, i1 zeroext %flag2, i32 %blksA, i32 %blksB, i32 %nblks, i8* %p) {
+define zeroext i1 @test16a(i1 zeroext %flag, i1 zeroext %flag2, i32 %blksA, i32 %blksB, i32 %nblks, ptr %p) {
; CHECK-LABEL: @test16a(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.end.sink.split:
; CHECK-NEXT: [[CMP2_SINK:%.*]] = phi i1 [ [[CMP2]], [[IF_THEN2]] ], [ [[CMP]], [[IF_THEN]] ]
; CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[CMP2_SINK]] to i8
-; CHECK-NEXT: store i8 [[FROMBOOL3]], i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 [[FROMBOOL3]], ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret i1 true
if.then:
%cmp = icmp uge i32 %blksA, %nblks
%frombool1 = zext i1 %cmp to i8
- store i8 %frombool1, i8* %p
+ store i8 %frombool1, ptr %p
br label %if.end
if.else:
%add = add i32 %nblks, %blksB
%cmp2 = icmp ule i32 %add, %blksA
%frombool3 = zext i1 %cmp2 to i8
- store i8 %frombool3, i8* %p
+ store i8 %frombool3, ptr %p
br label %if.end
if.end:
; CHECK-NEXT: [[Z:%.*]] = alloca i32, align 4
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 [[X:%.*]], i32* [[Y]], align 4
+; CHECK-NEXT: store i32 [[X:%.*]], ptr [[Y]], align 4
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: store i32 [[X]], i32* [[Z]], align 4
+; CHECK-NEXT: store i32 [[X]], ptr [[Z]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret i32 1
br i1 %flag, label %if.then, label %if.else
if.then:
- store i32 %x, i32* %y
+ store i32 %x, ptr %y
br label %if.end
if.else:
- store i32 %x, i32* %z
+ store i32 %x, ptr %z
br label %if.end
if.end:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: call void @g()
-; CHECK-NEXT: [[ONE:%.*]] = load i32, i32* [[Y]], align 4
+; CHECK-NEXT: [[ONE:%.*]] = load i32, ptr [[Y]], align 4
; CHECK-NEXT: [[TWO:%.*]] = add i32 [[ONE]], 2
-; CHECK-NEXT: store i32 [[TWO]], i32* [[Y]], align 4
+; CHECK-NEXT: store i32 [[TWO]], ptr [[Y]], align 4
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: [[THREE:%.*]] = load i32, i32* [[Z]], align 4
+; CHECK-NEXT: [[THREE:%.*]] = load i32, ptr [[Z]], align 4
; CHECK-NEXT: [[FOUR:%.*]] = add i32 [[THREE]], 2
-; CHECK-NEXT: store i32 [[FOUR]], i32* [[Y]], align 4
+; CHECK-NEXT: store i32 [[FOUR]], ptr [[Y]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret i32 1
if.then:
call void @g()
- %one = load i32, i32* %y
+ %one = load i32, ptr %y
%two = add i32 %one, 2
- store i32 %two, i32* %y
+ store i32 %two, ptr %y
br label %if.end
if.else:
- %three = load i32, i32* %z
+ %three = load i32, ptr %z
%four = add i32 %three, 2
- store i32 %four, i32* %y
+ store i32 %four, ptr %y
br label %if.end
if.end:
; CHECK: if.then:
; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[BLKSA:%.*]], [[NBLKS:%.*]]
; CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[CMP]] to i8
-; CHECK-NEXT: store i8 [[FROMBOOL1]], i8* [[P]], align 1
+; CHECK-NEXT: store i8 [[FROMBOOL1]], ptr [[P]], align 1
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: br i1 [[FLAG2:%.*]], label [[IF_THEN2:%.*]], label [[IF_END]]
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[NBLKS]], [[BLKSB:%.*]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp ule i32 [[ADD]], [[BLKSA]]
; CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[CMP2]] to i8
-; CHECK-NEXT: store i8 [[FROMBOOL3]], i8* [[P]], align 1
+; CHECK-NEXT: store i8 [[FROMBOOL3]], ptr [[P]], align 1
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret i1 true
if.then:
%cmp = icmp uge i32 %blksA, %nblks
%frombool1 = zext i1 %cmp to i8
- store i8 %frombool1, i8* %p
+ store i8 %frombool1, ptr %p
br label %if.end
if.else:
%add = add i32 %nblks, %blksB
%cmp2 = icmp ule i32 %add, %blksA
%frombool3 = zext i1 %cmp2 to i8
- store i8 %frombool3, i8* %p
+ store i8 %frombool3, ptr %p
br label %if.end
if.end:
ret i32 1
}
-declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture readonly, i64, i1)
+declare void @llvm.memcpy.p1.p1.i64(ptr addrspace(1) nocapture, ptr addrspace(1) nocapture readonly, i64, i1)
; Make sure a memcpy size isn't replaced with a variable
-define void @no_replace_memcpy_size(i1 zeroext %flag, i8 addrspace(1)* %dst, i8 addrspace(1)* %src) {
+define void @no_replace_memcpy_size(i1 zeroext %flag, ptr addrspace(1) %dst, ptr addrspace(1) %src) {
; CHECK-LABEL: @no_replace_memcpy_size(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* [[DST:%.*]], i8 addrspace(1)* [[SRC:%.*]], i64 1024, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p1.p1.i64(ptr addrspace(1) [[DST:%.*]], ptr addrspace(1) [[SRC:%.*]], i64 1024, i1 false)
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* [[DST]], i8 addrspace(1)* [[SRC]], i64 4096, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p1.p1.i64(ptr addrspace(1) [[DST]], ptr addrspace(1) [[SRC]], i64 4096, i1 false)
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret void
br i1 %flag, label %if.then, label %if.else
if.then:
- call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i1 false)
+ call void @llvm.memcpy.p1.p1.i64(ptr addrspace(1) %dst, ptr addrspace(1) %src, i64 1024, i1 false)
br label %if.end
if.else:
- call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 4096, i1 false)
+ call void @llvm.memcpy.p1.p1.i64(ptr addrspace(1) %dst, ptr addrspace(1) %src, i64 4096, i1 false)
br label %if.end
if.end:
ret void
}
-declare void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture readonly, i64, i1)
+declare void @llvm.memmove.p1.p1.i64(ptr addrspace(1) nocapture, ptr addrspace(1) nocapture readonly, i64, i1)
; Make sure a memmove size isn't replaced with a variable
-define void @no_replace_memmove_size(i1 zeroext %flag, i8 addrspace(1)* %dst, i8 addrspace(1)* %src) {
+define void @no_replace_memmove_size(i1 zeroext %flag, ptr addrspace(1) %dst, ptr addrspace(1) %src) {
; CHECK-LABEL: @no_replace_memmove_size(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* [[DST:%.*]], i8 addrspace(1)* [[SRC:%.*]], i64 1024, i1 false)
+; CHECK-NEXT: call void @llvm.memmove.p1.p1.i64(ptr addrspace(1) [[DST:%.*]], ptr addrspace(1) [[SRC:%.*]], i64 1024, i1 false)
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* [[DST]], i8 addrspace(1)* [[SRC]], i64 4096, i1 false)
+; CHECK-NEXT: call void @llvm.memmove.p1.p1.i64(ptr addrspace(1) [[DST]], ptr addrspace(1) [[SRC]], i64 4096, i1 false)
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret void
br i1 %flag, label %if.then, label %if.else
if.then:
- call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 1024, i1 false)
+ call void @llvm.memmove.p1.p1.i64(ptr addrspace(1) %dst, ptr addrspace(1) %src, i64 1024, i1 false)
br label %if.end
if.else:
- call void @llvm.memmove.p1i8.p1i8.i64(i8 addrspace(1)* %dst, i8 addrspace(1)* %src, i64 4096, i1 false)
+ call void @llvm.memmove.p1.p1.i64(ptr addrspace(1) %dst, ptr addrspace(1) %src, i64 4096, i1 false)
br label %if.end
if.end:
ret void
}
-declare void @llvm.memset.p1i8.i64(i8 addrspace(1)* nocapture, i8, i64, i1)
+declare void @llvm.memset.p1.i64(ptr addrspace(1) nocapture, i8, i64, i1)
; Make sure a memset size isn't replaced with a variable
-define void @no_replace_memset_size(i1 zeroext %flag, i8 addrspace(1)* %dst) {
+define void @no_replace_memset_size(i1 zeroext %flag, ptr addrspace(1) %dst) {
; CHECK-LABEL: @no_replace_memset_size(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: call void @llvm.memset.p1i8.i64(i8 addrspace(1)* [[DST:%.*]], i8 0, i64 1024, i1 false)
+; CHECK-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 0, i64 1024, i1 false)
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: call void @llvm.memset.p1i8.i64(i8 addrspace(1)* [[DST]], i8 0, i64 4096, i1 false)
+; CHECK-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST]], i8 0, i64 4096, i1 false)
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret void
br i1 %flag, label %if.then, label %if.else
if.then:
- call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 0, i64 1024, i1 false)
+ call void @llvm.memset.p1.i64(ptr addrspace(1) %dst, i8 0, i64 1024, i1 false)
br label %if.end
if.else:
- call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 0, i64 4096, i1 false)
+ call void @llvm.memset.p1.i64(ptr addrspace(1) %dst, i8 0, i64 4096, i1 false)
br label %if.end
if.end:
declare i32 @call_target()
-define void @test_operand_bundles(i1 %cond, i32* %ptr) {
+define void @test_operand_bundles(i1 %cond, ptr %ptr) {
; CHECK-LABEL: @test_operand_bundles(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
; CHECK-NEXT: br label [[MERGE]]
; CHECK: merge:
; CHECK-NEXT: [[VAL1_SINK:%.*]] = phi i32 [ [[VAL1]], [[RIGHT]] ], [ [[VAL0]], [[LEFT]] ]
-; CHECK-NEXT: store i32 [[VAL1_SINK]], i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 [[VAL1_SINK]], ptr [[PTR:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
left:
%val0 = call i32 @call_target() [ "deopt"(i32 10) ]
- store i32 %val0, i32* %ptr
+ store i32 %val0, ptr %ptr
br label %merge
right:
%val1 = call i32 @call_target() [ "deopt"(i32 20) ]
- store i32 %val1, i32* %ptr
+ store i32 %val1, ptr %ptr
br label %merge
merge:
; CHECK-NEXT: [[Z:%.*]] = alloca i32, align 4
; CHECK-NEXT: br i1 [[FLAG:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[Y_CAST:%.*]] = bitcast i32* [[Y]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[Y_CAST]])
+; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[Y]])
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
-; CHECK-NEXT: [[Z_CAST:%.*]] = bitcast i32* [[Z]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[Z_CAST]])
+; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[Z]])
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret i32 1
br i1 %flag, label %if.then, label %if.else
if.then:
- %y.cast = bitcast i32* %y to i8*
- call void @llvm.lifetime.end.p0i8(i64 4, i8* %y.cast)
+ call void @llvm.lifetime.end.p0(i64 4, ptr %y)
br label %if.end
if.else:
- %z.cast = bitcast i32* %z to i8*
- call void @llvm.lifetime.end.p0i8(i64 4, i8* %z.cast)
+ call void @llvm.lifetime.end.p0(i64 4, ptr %z)
br label %if.end
if.end:
ret void
}
-define void @indirect_caller(i1 %c, i32 %v, void (i32)* %foo, void (i32)* %bar) {
+define void @indirect_caller(i1 %c, i32 %v, ptr %foo, ptr %bar) {
; CHECK-LABEL: @indirect_caller(
; CHECK-NEXT: end:
-; CHECK-NEXT: [[FOO_BAR:%.*]] = select i1 [[C:%.*]], void (i32)* [[FOO:%.*]], void (i32)* [[BAR:%.*]]
+; CHECK-NEXT: [[FOO_BAR:%.*]] = select i1 [[C:%.*]], ptr [[FOO:%.*]], ptr [[BAR:%.*]]
; CHECK-NEXT: tail call void [[FOO_BAR]](i32 [[V:%.*]])
; CHECK-NEXT: ret void
;
ret void
}
-define void @maybe_indirect_caller(void ()* %fun) {
+define void @maybe_indirect_caller(ptr %fun) {
; CHECK-LABEL: @maybe_indirect_caller(
-; CHECK-NEXT: [[C:%.*]] = icmp eq void ()* [[FUN:%.*]], @direct_callee
+; CHECK-NEXT: [[C:%.*]] = icmp eq ptr [[FUN:%.*]], @direct_callee
; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE_DIRECT_TARG:%.*]], label [[IF_FALSE_ORIG_INDIRECT:%.*]]
; CHECK: if.true.direct_targ:
; CHECK-NEXT: tail call void @direct_callee()
; CHECK: if.end.icp:
; CHECK-NEXT: ret void
;
- %c = icmp eq void ()* %fun, @direct_callee
+ %c = icmp eq ptr %fun, @direct_callee
br i1 %c, label %if.true.direct_targ, label %if.false.orig_indirect
if.true.direct_targ:
if.end.icp:
ret void
}
-define void @maybe_indirect_caller2(void ()* %fun) {
+define void @maybe_indirect_caller2(ptr %fun) {
; CHECK-LABEL: @maybe_indirect_caller2(
-; CHECK-NEXT: [[C:%.*]] = icmp eq void ()* [[FUN:%.*]], @direct_callee
+; CHECK-NEXT: [[C:%.*]] = icmp eq ptr [[FUN:%.*]], @direct_callee
; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE_DIRECT_TARG:%.*]], label [[IF_FALSE_ORIG_INDIRECT:%.*]]
; CHECK: if.false.orig_indirect:
; CHECK-NEXT: tail call void [[FUN]]()
; CHECK: if.end.icp:
; CHECK-NEXT: ret void
;
- %c = icmp eq void ()* %fun, @direct_callee
+ %c = icmp eq ptr %fun, @direct_callee
br i1 %c, label %if.true.direct_targ, label %if.false.orig_indirect
if.false.orig_indirect:
declare void @direct_callee2()
declare void @direct_callee3()
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
define void @creating_too_many_phis(i1 %cond, i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) {
; CHECK-LABEL: @creating_too_many_phis(
@alloc1 = private unnamed_addr constant <{ [1 x i8] }> <{ [1 x i8] c"B" }>, align 1
@alloc2 = private unnamed_addr constant <{ [1 x i8] }> <{ [1 x i8] c"C" }>, align 1
-define { [0 x i8]*, i64 } @switch_to_lookup_bitcast(i8 %0) unnamed_addr {
+define { ptr, i64 } @switch_to_lookup_bitcast(i8 %0) unnamed_addr {
; CHECK-LABEL: @switch_to_lookup_bitcast(
; CHECK-NEXT: start:
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x [0 x i8]*], [3 x [0 x i8]*]* @switch.table.switch_to_lookup_bitcast, i32 0, i8 [[TMP0:%.*]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load [0 x i8]*, [0 x i8]** [[SWITCH_GEP]], align 8
-; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { [0 x i8]*, i64 } undef, [0 x i8]* [[SWITCH_LOAD]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { [0 x i8]*, i64 } [[TMP1]], i64 1, 1
-; CHECK-NEXT: ret { [0 x i8]*, i64 } [[TMP2]]
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x ptr], ptr @switch.table.switch_to_lookup_bitcast, i32 0, i8 [[TMP0:%.*]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 8
+; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr, i64 } undef, ptr [[SWITCH_LOAD]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { ptr, i64 } [[TMP1]], i64 1, 1
+; CHECK-NEXT: ret { ptr, i64 } [[TMP2]]
;
start:
switch i8 %0, label %default [
unreachable
end:
- %.sroa.0.0 = phi [0 x i8]* [ bitcast (<{ [1 x i8] }>* @alloc0 to [0 x i8]*), %bb0 ], [ bitcast (<{ [1 x i8] }>* @alloc1 to [0 x i8]*), %bb1 ], [ bitcast (<{ [1 x i8] }>* @alloc2 to [0 x i8]*), %bb2 ]
- %1 = insertvalue { [0 x i8]*, i64 } undef, [0 x i8]* %.sroa.0.0, 0
- %2 = insertvalue { [0 x i8]*, i64 } %1, i64 1, 1
- ret { [0 x i8]*, i64 } %2
+ %.sroa.0.0 = phi ptr [ @alloc0, %bb0 ], [ @alloc1, %bb1 ], [ @alloc2, %bb2 ]
+ %1 = insertvalue { ptr, i64 } undef, ptr %.sroa.0.0, 0
+ %2 = insertvalue { ptr, i64 } %1, i64 1, 1
+ ret { ptr, i64 } %2
}
@alloc1 = private unnamed_addr constant <{ [2 x i8] }> <{ [2 x i8] c"B2" }>, align 1
@alloc2 = private unnamed_addr constant <{ [2 x i8] }> <{ [2 x i8] c"C3" }>, align 1
-define { i8*, i64 } @switch_to_lookup_gep(i8 %0) unnamed_addr {
+define { ptr, i64 } @switch_to_lookup_gep(i8 %0) unnamed_addr {
; CHECK-LABEL: @switch_to_lookup_gep(
; CHECK-NEXT: start:
-; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* @switch.table.switch_to_lookup_gep, i32 0, i8 [[TMP0:%.*]]
-; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8*, i8** [[SWITCH_GEP]], align 8
-; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i8*, i64 } undef, i8* [[SWITCH_LOAD]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i8*, i64 } [[TMP1]], i64 1, 1
-; CHECK-NEXT: ret { i8*, i64 } [[TMP2]]
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x ptr], ptr @switch.table.switch_to_lookup_gep, i32 0, i8 [[TMP0:%.*]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load ptr, ptr [[SWITCH_GEP]], align 8
+; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr, i64 } undef, ptr [[SWITCH_LOAD]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { ptr, i64 } [[TMP1]], i64 1, 1
+; CHECK-NEXT: ret { ptr, i64 } [[TMP2]]
;
start:
switch i8 %0, label %default [
unreachable
end:
- %.sroa.0.0 = phi i8* [ getelementptr inbounds (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc0, i32 0, i32 0, i32 1), %bb0 ], [ getelementptr inbounds (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc1, i32 0, i32 0, i32 1), %bb1 ], [ getelementptr inbounds (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc2, i32 0, i32 0, i32 1), %bb2 ]
- %1 = insertvalue { i8*, i64 } undef, i8* %.sroa.0.0, 0
- %2 = insertvalue { i8*, i64 } %1, i64 1, 1
- ret { i8*, i64 } %2
+ %.sroa.0.0 = phi ptr [ getelementptr inbounds (<{ [2 x i8] }>, ptr @alloc0, i32 0, i32 0, i32 1), %bb0 ], [ getelementptr inbounds (<{ [2 x i8] }>, ptr @alloc1, i32 0, i32 0, i32 1), %bb1 ], [ getelementptr inbounds (<{ [2 x i8] }>, ptr @alloc2, i32 0, i32 0, i32 1), %bb2 ]
+ %1 = insertvalue { ptr, i64 } undef, ptr %.sroa.0.0, 0
+ %2 = insertvalue { ptr, i64 } %1, i64 1, 1
+ ret { ptr, i64 } %2
}
-define { i8*, i64 } @switch_to_lookup_gep_oob(i8 %0) unnamed_addr {
+define { ptr, i64 } @switch_to_lookup_gep_oob(i8 %0) unnamed_addr {
; CHECK-LABEL: @switch_to_lookup_gep_oob(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i8 [[TMP0:%.*]], label [[DEFAULT:%.*]] [
; CHECK: default:
; CHECK-NEXT: unreachable
; CHECK: end:
-; CHECK-NEXT: [[DOTSROA_0_0:%.*]] = phi i8* [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc1, i32 0, i32 0, i32 4), [[BB1]] ], [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc2, i32 0, i32 0, i32 4), [[BB2]] ], [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc0, i32 0, i32 0, i32 4), [[START:%.*]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i8*, i64 } undef, i8* [[DOTSROA_0_0]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i8*, i64 } [[TMP1]], i64 1, 1
-; CHECK-NEXT: ret { i8*, i64 } [[TMP2]]
+; CHECK-NEXT: [[DOTSROA_0_0:%.*]] = phi ptr [ getelementptr (<{ [2 x i8] }>, ptr @alloc1, i32 0, i32 0, i32 4), [[BB1]] ], [ getelementptr (<{ [2 x i8] }>, ptr @alloc2, i32 0, i32 0, i32 4), [[BB2]] ], [ getelementptr (<{ [2 x i8] }>, ptr @alloc0, i32 0, i32 0, i32 4), [[START:%.*]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr, i64 } undef, ptr [[DOTSROA_0_0]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { ptr, i64 } [[TMP1]], i64 1, 1
+; CHECK-NEXT: ret { ptr, i64 } [[TMP2]]
;
start:
switch i8 %0, label %default [
unreachable
end:
- %.sroa.0.0 = phi i8* [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc0, i32 0, i32 0, i32 4), %bb0 ], [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc1, i32 0, i32 0, i32 4), %bb1 ], [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc2, i32 0, i32 0, i32 4), %bb2 ]
- %1 = insertvalue { i8*, i64 } undef, i8* %.sroa.0.0, 0
- %2 = insertvalue { i8*, i64 } %1, i64 1, 1
- ret { i8*, i64 } %2
+ %.sroa.0.0 = phi ptr [ getelementptr (<{ [2 x i8] }>, ptr @alloc0, i32 0, i32 0, i32 4), %bb0 ], [ getelementptr (<{ [2 x i8] }>, ptr @alloc1, i32 0, i32 0, i32 4), %bb1 ], [ getelementptr (<{ [2 x i8] }>, ptr @alloc2, i32 0, i32 0, i32 4), %bb2 ]
+ %1 = insertvalue { ptr, i64 } undef, ptr %.sroa.0.0, 0
+ %2 = insertvalue { ptr, i64 } %1, i64 1, 1
+ ret { ptr, i64 } %2
}
-define { i8*, i64 } @switch_to_lookup_gep_ptrtoint(i8 %0) unnamed_addr {
+define { ptr, i64 } @switch_to_lookup_gep_ptrtoint(i8 %0) unnamed_addr {
; CHECK-LABEL: @switch_to_lookup_gep_ptrtoint(
; CHECK-NEXT: start:
; CHECK-NEXT: switch i8 [[TMP0:%.*]], label [[DEFAULT:%.*]] [
; CHECK: default:
; CHECK-NEXT: unreachable
; CHECK: end:
-; CHECK-NEXT: [[DOTSROA_0_0:%.*]] = phi i8* [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc1, i32 0, i32 0, i64 ptrtoint (<{ [2 x i8] }>* @alloc0 to i64)), [[BB1]] ], [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc2, i32 0, i32 0, i64 ptrtoint (<{ [2 x i8] }>* @alloc0 to i64)), [[BB2]] ], [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc0, i32 0, i32 0, i64 ptrtoint (<{ [2 x i8] }>* @alloc0 to i64)), [[START:%.*]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i8*, i64 } undef, i8* [[DOTSROA_0_0]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i8*, i64 } [[TMP1]], i64 1, 1
-; CHECK-NEXT: ret { i8*, i64 } [[TMP2]]
+; CHECK-NEXT: [[DOTSROA_0_0:%.*]] = phi ptr [ getelementptr (<{ [2 x i8] }>, ptr @alloc1, i32 0, i32 0, i64 ptrtoint (ptr @alloc0 to i64)), [[BB1]] ], [ getelementptr (<{ [2 x i8] }>, ptr @alloc2, i32 0, i32 0, i64 ptrtoint (ptr @alloc0 to i64)), [[BB2]] ], [ getelementptr (<{ [2 x i8] }>, ptr @alloc0, i32 0, i32 0, i64 ptrtoint (ptr @alloc0 to i64)), [[START:%.*]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { ptr, i64 } undef, ptr [[DOTSROA_0_0]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { ptr, i64 } [[TMP1]], i64 1, 1
+; CHECK-NEXT: ret { ptr, i64 } [[TMP2]]
;
start:
switch i8 %0, label %default [
unreachable
end:
- %.sroa.0.0 = phi i8* [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc0, i32 0, i32 0, i64 ptrtoint (<{ [2 x i8] }>* @alloc0 to i64)), %bb0 ], [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc1, i32 0, i32 0, i64 ptrtoint (<{ [2 x i8] }>* @alloc0 to i64)), %bb1 ], [ getelementptr (<{ [2 x i8] }>, <{ [2 x i8] }>* @alloc2, i32 0, i32 0, i64 ptrtoint (<{ [2 x i8] }>* @alloc0 to i64)), %bb2 ]
- %1 = insertvalue { i8*, i64 } undef, i8* %.sroa.0.0, 0
- %2 = insertvalue { i8*, i64 } %1, i64 1, 1
- ret { i8*, i64 } %2
+ %.sroa.0.0 = phi ptr [ getelementptr (<{ [2 x i8] }>, ptr @alloc0, i32 0, i32 0, i64 ptrtoint (ptr @alloc0 to i64)), %bb0 ], [ getelementptr (<{ [2 x i8] }>, ptr @alloc1, i32 0, i32 0, i64 ptrtoint (ptr @alloc0 to i64)), %bb1 ], [ getelementptr (<{ [2 x i8] }>, ptr @alloc2, i32 0, i32 0, i64 ptrtoint (ptr @alloc0 to i64)), %bb2 ]
+ %1 = insertvalue { ptr, i64 } undef, ptr %.sroa.0.0, 0
+ %2 = insertvalue { ptr, i64 } %1, i64 1, 1
+ ret { ptr, i64 } %2
}
; CHECK-NEXT: %0 = icmp ult i32 %arg, 3
; CHECK-NEXT: br i1 %0, label %switch.lookup, label %bb6
; CHECK: switch.lookup:
-; CHECK-NEXT: %switch.gep = getelementptr inbounds [3 x %struct.ham*], [3 x %struct.ham*]* @switch.table.zot, i32 0, i32 %arg
-; CHECK-NEXT: %switch.load = load %struct.ham*, %struct.ham** %switch.gep, align 8
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [3 x ptr], ptr @switch.table.zot, i32 0, i32 %arg
+; CHECK-NEXT: %switch.load = load ptr, ptr %switch.gep, align 8
; CHECK-NEXT: br label %bb6
; CHECK: bb6:
-; CHECK-NEXT: %tmp7 = phi %struct.ham* [ %switch.load, %switch.lookup ], [ null, %bb ]
-; CHECK-NEXT: %tmp8 = icmp eq %struct.ham* %tmp7, bitcast (i32* getelementptr inbounds ([75 x { i32, i32, i32, i8, i8 }], [75 x { i32, i32, i32, i8, i8 }]* @global, i64 1, i64 0, i32 0) to %struct.ham*)
+; CHECK-NEXT: %tmp7 = phi ptr [ %switch.load, %switch.lookup ], [ null, %bb ]
+; CHECK-NEXT: %tmp8 = icmp eq ptr %tmp7, getelementptr inbounds ([75 x { i32, i32, i32, i8, i8 }], ptr @global, i64 1, i64 0, i32 0)
; CHECK-NEXT: ret i1 %tmp8
;
bb:
br label %bb6
bb6: ; preds = %bb5, %bb3, %bb1, %bb
- %tmp7 = phi %struct.ham* [ null, %bb5 ], [ bitcast (i32* getelementptr inbounds ([75 x { i32, i32, i32, i8, i8 }], [75 x { i32, i32, i32, i8, i8 }]* @global, i64 0, i64 6, i32 0) to %struct.ham*), %bb ], [ null, %bb1 ], [ null, %bb3 ]
- %tmp8 = icmp eq %struct.ham* %tmp7, bitcast (i32* getelementptr inbounds ([75 x { i32, i32, i32, i8, i8 }], [75 x { i32, i32, i32, i8, i8 }]* @global, i64 1, i64 0, i32 0) to %struct.ham*)
+ %tmp7 = phi ptr [ null, %bb5 ], [ getelementptr inbounds ([75 x { i32, i32, i32, i8, i8 }], ptr @global, i64 0, i64 6, i32 0), %bb ], [ null, %bb1 ], [ null, %bb3 ]
+ %tmp8 = icmp eq ptr %tmp7, getelementptr inbounds ([75 x { i32, i32, i32, i8, i8 }], ptr @global, i64 1, i64 0, i32 0)
ret i1 %tmp8
}
while_block: ; preds = %and_if_cont2, %and_if_cont
%newlen = sub i32 %newlen, 1
- %newptr = getelementptr i8, i8* %newptr, i64 1
+ %newptr = getelementptr i8, ptr %newptr, i64 1
%test = icmp sgt i32 %newlen, 0
br i1 %test, label %and_if1, label %and_if_cont2
and_if1: ; preds = %while_block
- %char = load i8, i8* %newptr
+ %char = load i8, ptr %newptr
%test2 = icmp ule i8 %char, 32
br label %and_if_cont2
; The branch in %cont has !annotation metadata. Make sure generated AND
; has !annotation metadata.
-define i32 @test_preserve_and(i8* %a, i8* %b, i8* %c, i8* %d) {
+define i32 @test_preserve_and(ptr %a, ptr %b, ptr %c, ptr %d) {
; CHECK-LABEL: define {{.*}} @test_preserve_and({{.*}}
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8* [[A:%.*]], [[B:%.*]], !annotation !0
-; CHECK-NEXT: [[C_2:%.*]] = icmp uge i8* [[C:%.*]], [[D:%.*]], !annotation !0
+; CHECK-NEXT: [[C_1:%.*]] = icmp ult ptr [[A:%.*]], [[B:%.*]], !annotation !0
+; CHECK-NEXT: [[C_2:%.*]] = icmp uge ptr [[C:%.*]], [[D:%.*]], !annotation !0
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[C_1]], i1 [[C_2]], i1 false, !annotation !0
; CHECK-NEXT: br i1 [[OR_COND]], label [[CONT1:%.*]], label [[TRAP:%.*]], !annotation !0
; CHECK: trap: ; preds = %entry
; CHECK-NEXT: ret i32 0
;
entry:
- %c.1 = icmp ult i8* %a, %b, !annotation !0
+ %c.1 = icmp ult ptr %a, %b, !annotation !0
br i1 %c.1, label %cont, label %trap, !annotation !0
cont: ; preds = %entry
- %c.2 = icmp uge i8* %c, %d, !annotation !0
+ %c.2 = icmp uge ptr %c, %d, !annotation !0
br i1 %c.2, label %cont1, label %trap, !annotation !0
trap: ; preds = %cont, %entry
; The branch in %cont has !annotation metadata. Make sure generated OR
; has !annotation metadata.
-define i32 @test_preserve_or(i8* %a, i8* %b, i8* %c, i8* %d) {
+define i32 @test_preserve_or(ptr %a, ptr %b, ptr %c, ptr %d) {
; CHECK-LABEL: define {{.*}} @test_preserve_or({{.*}}
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[C_1:%.*]] = icmp uge i8* [[A:%.*]], [[B:%.*]], !annotation !0
-; CHECK-NEXT: [[C_2:%.*]] = icmp uge i8* [[C:%.*]], [[D:%.*]], !annotation !0
+; CHECK-NEXT: [[C_1:%.*]] = icmp uge ptr [[A:%.*]], [[B:%.*]], !annotation !0
+; CHECK-NEXT: [[C_2:%.*]] = icmp uge ptr [[C:%.*]], [[D:%.*]], !annotation !0
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[C_1]], i1 true, i1 [[C_2]], !annotation !0
; CHECK-NEXT: br i1 [[OR_COND]], label [[TRAP:%.*]], label [[CONT1:%.*]], !annotation !0
; CHECK: trap: ; preds = %entry
; CHECK-NEXT: ret i32 0
;
entry:
- %c.1 = icmp ult i8* %a, %b, !annotation !0
+ %c.1 = icmp ult ptr %a, %b, !annotation !0
br i1 %c.1, label %cont, label %trap, !annotation !0
cont: ; preds = %entry
- %c.2 = icmp uge i8* %c, %d, !annotation !0
+ %c.2 = icmp uge ptr %c, %d, !annotation !0
br i1 %c.2, label %trap, label %cont1, !annotation !0
trap: ; preds = %cont, %entry
; The branch in %cont has !annotation metadata. Make sure generated negation
; and OR have !annotation metadata.
-define i32 @test_preserve_or_not(i8* %a, i8* %b, i8* %c, i8* %d) {
+define i32 @test_preserve_or_not(ptr %a, ptr %b, ptr %c, ptr %d) {
; CHECK-LABEL: define {{.*}} @test_preserve_or_not({{.*}}
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8* [[A:%.*]], [[B:%.*]], !annotation !0
+; CHECK-NEXT: [[C_1:%.*]] = icmp ult ptr [[A:%.*]], [[B:%.*]], !annotation !0
; CHECK-NEXT: [[C_2:%.*]] = xor i1 [[C_1]], true
; CHECK-NEXT: [[C_2_NOT:%.*]] = xor i1 [[C_2]], true, !annotation !0
-; CHECK-NEXT: [[C_3:%.*]] = icmp uge i8* [[C:%.*]], [[D:%.*]], !annotation !0
+; CHECK-NEXT: [[C_3:%.*]] = icmp uge ptr [[C:%.*]], [[D:%.*]], !annotation !0
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[C_2_NOT]], i1 true, i1 [[C_3]], !annotation !0
; CHECK-NEXT: br i1 [[OR_COND]], label [[TRAP:%.*]], label [[CONT1:%.*]], !annotation !0
; CHECK: trap: ; preds = %entry
; CHECK-NEXT: ret i32 0
;
entry:
- %c.1 = icmp ult i8* %a, %b, !annotation !0
+ %c.1 = icmp ult ptr %a, %b, !annotation !0
%c.2 = xor i1 %c.1, true
br i1 %c.2, label %cont, label %trap, !annotation !0
cont: ; preds = %entry
- %c.3 = icmp uge i8* %c, %d, !annotation !0
+ %c.3 = icmp uge ptr %c, %d, !annotation !0
br i1 %c.3, label %trap, label %cont1, !annotation !0
trap: ; preds = %cont, %entry
; The branch in %cont has no !annotation metadata. Make sure generated negation
; and OR do not have !annotation metadata.
-define i32 @test_or_not_no_annotation(i8* %a, i8* %b, i8* %c, i8* %d) {
+define i32 @test_or_not_no_annotation(ptr %a, ptr %b, ptr %c, ptr %d) {
; CHECK-LABEL: define {{.*}} @test_or_not_no_annotation({{.*}}
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8* [[A:%.*]], [[B:%.*]], !annotation !0
+; CHECK-NEXT: [[C_1:%.*]] = icmp ult ptr [[A:%.*]], [[B:%.*]], !annotation !0
; CHECK-NEXT: [[C_2:%.*]] = xor i1 [[C_1]], true
; CHECK-NEXT: [[C_2_NOT:%.*]] = xor i1 [[C_2]], true
-; CHECK-NEXT: [[C_3:%.*]] = icmp uge i8* [[C:%.*]], [[D:%.*]], !annotation !0
+; CHECK-NEXT: [[C_3:%.*]] = icmp uge ptr [[C:%.*]], [[D:%.*]], !annotation !0
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[C_2_NOT]], i1 true, i1 [[C_3]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[TRAP:%.*]], label [[CONT1:%.*]], !annotation !0
; CHECK: trap: ; preds = %entry
; CHECK-NEXT: ret i32 0
;
entry:
- %c.1 = icmp ult i8* %a, %b, !annotation !0
+ %c.1 = icmp ult ptr %a, %b, !annotation !0
%c.2 = xor i1 %c.1, true
br i1 %c.2, label %cont, label %trap, !annotation !0
cont: ; preds = %entry
- %c.3 = icmp uge i8* %c, %d, !annotation !0
+ %c.3 = icmp uge ptr %c, %d, !annotation !0
br i1 %c.3, label %trap, label %cont1
trap: ; preds = %cont, %entry
;
; CHECK: call void @barrier
; CHECK-NOT: call void @barrier
-define void @check(i1 %cond, i32* %out) {
+define void @check(i1 %cond, ptr %out) {
entry:
br i1 %cond, label %if.then, label %if.end
if.then:
- store i32 5, i32* %out
+ store i32 5, ptr %out
br label %if.end
if.end:
; CHECK-LABEL: @noduplicate
; CHECK: call void @barrier
; CHECK-NOT: call void @barrier
-define void @noduplicate(i32 %cond, i32* %out) {
+define void @noduplicate(i32 %cond, ptr %out) {
entry:
- %out1 = getelementptr i32, i32* %out, i32 1
- %out2 = getelementptr i32, i32* %out, i32 2
+ %out1 = getelementptr i32, ptr %out, i32 1
+ %out2 = getelementptr i32, ptr %out, i32 2
%cmp = icmp eq i32 %cond, 0
br i1 %cmp, label %if.then, label %if.end
if.then:
- store i32 5, i32* %out
+ store i32 5, ptr %out
br label %if.end
if.end:
br i1 %cmp, label %cond.end, label %cond.false
cond.false:
- store i32 5, i32* %out1
+ store i32 5, ptr %out1
br label %cond.end
cond.end:
%value = phi i32 [ 1, %cond.false ], [ 0, %if.end ]
- store i32 %value, i32* %out2
+ store i32 %value, ptr %out2
ret void
}
; CHECK-LABEL: @test6f(
; CHECK-NEXT: bb0:
; CHECK-NEXT: [[R:%.*]] = alloca i8, align 1
-; CHECK-NEXT: [[TMP:%.*]] = call i8 @test6g(i8* [[R]])
+; CHECK-NEXT: [[TMP:%.*]] = call i8 @test6g(ptr [[R]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[TMP]], 0
-; CHECK-NEXT: [[TMP3:%.*]] = load i8, i8* [[R]], align 1
+; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[R]], align 1
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i8 [[TMP3]], 1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP4]]
; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[OR_COND]], i8 0, i8 1
bb0:
%r = alloca i8, align 1
- %tmp = call i8 @test6g(i8* %r)
+ %tmp = call i8 @test6g(ptr %r)
%tmp1 = icmp eq i8 %tmp, 0
br i1 %tmp1, label %bb2, label %bb1
bb1:
- %tmp3 = load i8, i8* %r, align 1, !range !2, !tbaa !10, !dbg !5
+ %tmp3 = load i8, ptr %r, align 1, !range !2, !tbaa !10, !dbg !5
%tmp4 = icmp eq i8 %tmp3, 1
br i1 %tmp4, label %bb2, label %bb3
bb2:
%tmp6 = phi i8 [ 0, %bb2 ], [ 1, %bb1 ]
ret i8 %tmp6
}
-declare i8 @test6g(i8*)
+declare i8 @test6g(ptr)
!llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!8, !9}
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s
-%0 = type { i32*, i32* }
+%0 = type { ptr, ptr }
@0 = external hidden constant [5 x %0], align 4
; CHECK-NEXT: [[TMP3:%.*]] = shl i32 1, [[TMP0]]
; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP3]], 31
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x %0], [5 x %0]* @[[GLOB0:[0-9]+]], i32 0, i32 [[TMP0]]
-; CHECK-NEXT: [[TMP7:%.*]] = icmp eq %0* [[TMP6]], null
+; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x %0], ptr @[[GLOB0:[0-9]+]], i32 0, i32 [[TMP0]]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq ptr [[TMP6]], null
; CHECK-NEXT: [[OR_COND2:%.*]] = select i1 [[TMP5]], i1 true, i1 [[TMP7]]
; CHECK-NEXT: br i1 [[OR_COND2]], label [[COMMON_RET]], label [[BB4:%.*]]
; CHECK: common.ret:
BB3: ; preds = %BB2
- %6 = getelementptr inbounds [5 x %0], [5 x %0]* @0, i32 0, i32 %0, !dbg !6
- call void @llvm.dbg.value(metadata %0* %6, metadata !7, metadata !{}), !dbg !12
- %7 = icmp eq %0* %6, null, !dbg !13
+ %6 = getelementptr inbounds [5 x %0], ptr @0, i32 0, i32 %0, !dbg !6
+ call void @llvm.dbg.value(metadata ptr %6, metadata !7, metadata !{}), !dbg !12
+ %7 = icmp eq ptr %6, null, !dbg !13
br i1 %7, label %BB5, label %BB4, !dbg !13
BB4: ; preds = %BB3
; RUN: opt %s -passes='simplifycfg<bonus-inst-threshold=2>' -S | FileCheck %s --check-prefix=AGGRESSIVE
; RUN: opt %s -passes='simplifycfg<bonus-inst-threshold=4>' -S | FileCheck %s --check-prefix=WAYAGGRESSIVE
-define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) {
+define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
; NORMAL-LABEL: @foo(
; AGGRESSIVE-LABEL: @foo(
entry:
; AGGRESSIVE-NOT: br i1
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
declare void @distinct_b();
;; Like foo, but have to duplicate into multiple predecessors
-define i32 @bar(i32 %a, i32 %b, i32 %c, i32 %d, i32* %input) {
+define i32 @bar(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
; NORMAL-LABEL: @bar(
; AGGRESSIVE-LABEL: @bar(
entry:
; WAYAGGRESSIVE-NOT: br i1
cond.false:
- %0 = load i32, i32* %input, align 4
+ %0 = load i32, ptr %input, align 4
br label %cond.end
cond.end:
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
-define void @test(i32* %P, i32* %Q, i1 %A, i1 %B) {
+define void @test(ptr %P, ptr %Q, i1 %A, i1 %B) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_NOT:%.*]] = xor i1 [[A:%.*]], true
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: b:
-; CHECK-NEXT: store i32 123, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 123, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[COMMON_RET]]
;
a:
br i1 %B, label %b, label %c
b:
- store i32 123, i32* %P
+ store i32 123, ptr %P
ret void
c:
ret void
ret i32 123
}
-define i32 @test3(i32 %X, i1 %D, i32* %AP, i32* %BP) {
+define i32 @test3(i32 %X, i1 %D, ptr %AP, ptr %BP) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: E:
; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
; CHECK: B.critedge:
; CHECK-NEXT: call void @f3()
-; CHECK-NEXT: [[XX_C:%.*]] = load i32, i32* [[AP:%.*]], align 4
-; CHECK-NEXT: store i32 [[XX_C]], i32* [[BP:%.*]], align 4
+; CHECK-NEXT: [[XX_C:%.*]] = load i32, ptr [[AP:%.*]], align 4
+; CHECK-NEXT: store i32 [[XX_C]], ptr [[BP:%.*]], align 4
; CHECK-NEXT: call void @f2()
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: F:
br i1 %C, label %T, label %F
T: ; preds = %A, %E
call void @f3( )
- %XX = load i32, i32* %AP ; <i32> [#uses=1]
- store i32 %XX, i32* %BP
+ %XX = load i32, ptr %AP ; <i32> [#uses=1]
+ store i32 %XX, ptr %BP
br i1 %C, label %B, label %A
A: ; preds = %T
call void @f1( )
; This is a regression test for a bug in which we used phis() without
; make_early_inc_range() in a for loop while deleting phi nodes.
-define void @cleanup_phis() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
+define void @cleanup_phis() personality ptr @__gxx_wasm_personality_v0 {
bb0:
invoke void @foo()
to label %bb1 unwind label %ehcleanup
%1 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catchswitch
- %2 = catchpad within %1 [i8* null]
+ %2 = catchpad within %1 [ptr null]
call void @bar(i32 %phi0, i32 %phi1)
unreachable
}
declare void @f1()
declare void @f2()
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
define void @_Z4loopi(i1 %cmp) {
; HOIST-LABEL: @_Z4loopi(
%struct.j = type { %struct.c }
%struct.c = type { %struct.a }
%struct.a = type { i8 }
-%struct.e = type { %struct.a* }
+%struct.e = type { ptr }
$_ZN1eC2EPK1a = comdat any
@_ZN12_GLOBAL__N_12anE = internal global %"struct.(anonymous namespace)::aj" zeroinitializer, align 1
-declare dso_local i32 @_Zeq1eS_(%struct.a*, %struct.a*) local_unnamed_addr #2
+declare dso_local i32 @_Zeq1eS_(ptr, ptr) local_unnamed_addr #2
-define internal fastcc %struct.a* @_ZNK1jIiN12_GLOBAL__N_12ajEE2aeERKi() unnamed_addr #0 align 2 {
+define internal fastcc ptr @_ZNK1jIiN12_GLOBAL__N_12ajEE2aeERKi() unnamed_addr #0 align 2 {
; CHECK-LABEL: @_ZNK1jIiN12_GLOBAL__N_12ajEE2aeERKi
entry:
- %call = call i32 @_Zeq1eS_(%struct.a* null, %struct.a* null)
+ %call = call i32 @_Zeq1eS_(ptr null, ptr null)
%tobool = icmp eq i32 %call, 0
br i1 %tobool, label %cond.false, label %cond.end
br label %cond.end
cond.end: ; preds = %entry, %cond.false
- %retval.sroa.0.0 = phi %struct.a* [ null, %cond.false ], [ extractelement (<1 x %struct.a*> inttoptr (<1 x i64> bitcast (i64 ptrtoint (%"struct.(anonymous namespace)::aj"* @_ZN12_GLOBAL__N_12anE to i64) to <1 x i64>) to <1 x %struct.a*>), i64 0), %entry ]
- ret %struct.a* %retval.sroa.0.0
+ %retval.sroa.0.0 = phi ptr [ null, %cond.false ], [ extractelement (<1 x ptr> inttoptr (<1 x i64> bitcast (i64 ptrtoint (ptr @_ZN12_GLOBAL__N_12anE to i64) to <1 x i64>) to <1 x ptr>), i64 0), %entry ]
+ ret ptr %retval.sroa.0.0
}
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
%llvm.dbg.anchor.type = type { i32, i32 }
- %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
- %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
- %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }* }
- %llvm.dbg.derivedtype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }* }
- %llvm.dbg.global_variable.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1, { }* }
- %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.basictype.type = type { i32, ptr, ptr, ptr, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, ptr, i32, ptr, ptr, ptr, i1, i1, ptr }
+ %llvm.dbg.composite.type = type { i32, ptr, ptr, ptr, i32, i64, i64, i64, i32, ptr, ptr }
+ %llvm.dbg.derivedtype.type = type { i32, ptr, ptr, ptr, i32, i64, i64, i64, i32, ptr }
+ %llvm.dbg.global_variable.type = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, i32, ptr, i1, i1, ptr }
+ %llvm.dbg.subprogram.type = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, i32, ptr, i1, i1 }
%llvm.dbg.subrange.type = type { i32, i64, i64 }
%struct.Group = type { %struct.Scene, %struct.Sphere, %"struct.std::list<Scene*,std::allocator<Scene*> >" }
%struct.Ray = type { %struct.Vec, %struct.Vec }
- %struct.Scene = type { i32 (...)** }
+ %struct.Scene = type { ptr }
%struct.Sphere = type { %struct.Scene, %struct.Vec, double }
%struct.Vec = type { double, double, double }
%struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo }
%struct.__false_type = type <{ i8 }>
%"struct.__gnu_cxx::new_allocator<Scene*>" = type <{ i8 }>
%"struct.__gnu_cxx::new_allocator<std::_List_node<Scene*> >" = type <{ i8 }>
- %struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, %"struct.std::type_info"* }
- %struct.__type_info_pseudo = type { i8*, i8* }
+ %struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, ptr }
+ %struct.__type_info_pseudo = type { ptr, ptr }
%"struct.std::Hit" = type { double, %struct.Vec }
%"struct.std::_List_base<Scene*,std::allocator<Scene*> >" = type { %"struct.std::_List_base<Scene*,std::allocator<Scene*> >::_List_impl" }
%"struct.std::_List_base<Scene*,std::allocator<Scene*> >::_List_impl" = type { %"struct.std::_List_node_base" }
- %"struct.std::_List_const_iterator<Scene*>" = type { %"struct.std::_List_node_base"* }
- %"struct.std::_List_iterator<Scene*>" = type { %"struct.std::_List_node_base"* }
- %"struct.std::_List_node<Scene*>" = type { %"struct.std::_List_node_base", %struct.Scene* }
- %"struct.std::_List_node_base" = type { %"struct.std::_List_node_base"*, %"struct.std::_List_node_base"* }
+ %"struct.std::_List_const_iterator<Scene*>" = type { ptr }
+ %"struct.std::_List_iterator<Scene*>" = type { ptr }
+ %"struct.std::_List_node<Scene*>" = type { %"struct.std::_List_node_base", ptr }
+ %"struct.std::_List_node_base" = type { ptr, ptr }
%"struct.std::allocator<Scene*>" = type <{ i8 }>
%"struct.std::allocator<std::_List_node<Scene*> >" = type <{ i8 }>
- %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
- %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
- %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
- %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }
- %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { ptr, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, %"struct.std::locale" }
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", ptr, i8, ptr, ptr, ptr, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::ios_base" = type { ptr, i32, i32, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"struct.std::locale" }
%"struct.std::ios_base::Init" = type <{ i8 }>
- %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
- %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::ios_base::_Callback_list" = type { ptr, ptr, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { ptr, i32 }
%"struct.std::list<Scene*,std::allocator<Scene*> >" = type { %"struct.std::_List_base<Scene*,std::allocator<Scene*> >" }
- %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
- %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
- %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::locale" = type { ptr }
+ %"struct.std::locale::_Impl" = type { i32, ptr, i32, ptr, ptr }
+ %"struct.std::locale::facet" = type { ptr, i32 }
%"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
%"struct.std::num_put<char,std::ostreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
%"struct.std::numeric_limits<double>" = type <{ i8 }>
- %"struct.std::type_info" = type { i32 (...)**, i8* }
-@llvm.dbg.subprogram947 = external constant %llvm.dbg.subprogram.type ; <%llvm.dbg.subprogram.type*> [#uses=1]
+ %"struct.std::type_info" = type { ptr, ptr }
+@llvm.dbg.subprogram947 = external constant %llvm.dbg.subprogram.type ; <ptr> [#uses=1]
-declare void @llvm.dbg.func.start({ }*) nounwind
+declare void @llvm.dbg.func.start(ptr) nounwind
-declare void @llvm.dbg.region.end({ }*) nounwind
+declare void @llvm.dbg.region.end(ptr) nounwind
-declare void @_ZN9__gnu_cxx13new_allocatorIP5SceneED2Ev(%struct.__false_type*) nounwind
+declare void @_ZN9__gnu_cxx13new_allocatorIP5SceneED2Ev(ptr) nounwind
-define void @_ZNSaIP5SceneED1Ev(%struct.__false_type* %this) nounwind {
+define void @_ZNSaIP5SceneED1Ev(ptr %this) nounwind {
; CHECK-LABEL: @_ZNSaIP5SceneED1Ev(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.__false_type*, align 8
+; CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
; CHECK-NEXT: %"alloca point" = bitcast i32 0 to i32
-; CHECK-NEXT: call void @llvm.dbg.func.start({}* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram947 to {}*))
-; CHECK-NEXT: store %struct.__false_type* [[THIS:%.*]], %struct.__false_type** [[THIS_ADDR]], align 8
-; CHECK-NEXT: [[TMP0:%.*]] = load %struct.__false_type*, %struct.__false_type** [[THIS_ADDR]], align 4
-; CHECK-NEXT: call void @_ZN9__gnu_cxx13new_allocatorIP5SceneED2Ev(%struct.__false_type* [[TMP0]]) #[[ATTR0:[0-9]+]]
-; CHECK-NEXT: call void @llvm.dbg.region.end({}* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram947 to {}*))
+; CHECK-NEXT: call void @llvm.dbg.func.start(ptr @llvm.dbg.subprogram947)
+; CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+; CHECK-NEXT: call void @_ZN9__gnu_cxx13new_allocatorIP5SceneED2Ev(ptr [[TMP0]]) #[[ATTR0:[0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.region.end(ptr @llvm.dbg.subprogram947)
; CHECK-NEXT: ret void
;
entry:
- %this_addr = alloca %struct.__false_type* ; <%struct.__false_type**> [#uses=2]
+ %this_addr = alloca ptr ; <ptr> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram947 to { }*))
- store %struct.__false_type* %this, %struct.__false_type** %this_addr
- %0 = load %struct.__false_type*, %struct.__false_type** %this_addr, align 4 ; <%struct.__false_type*> [#uses=1]
- call void @_ZN9__gnu_cxx13new_allocatorIP5SceneED2Ev(%struct.__false_type* %0) nounwind
+ call void @llvm.dbg.func.start(ptr @llvm.dbg.subprogram947)
+ store ptr %this, ptr %this_addr
+ %0 = load ptr, ptr %this_addr, align 4 ; <ptr> [#uses=1]
+ call void @_ZN9__gnu_cxx13new_allocatorIP5SceneED2Ev(ptr %0) nounwind
br label %bb
bb: ; preds = %entry
br label %return
return: ; preds = %bb
- call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram947 to { }*))
+ call void @llvm.dbg.region.end(ptr @llvm.dbg.subprogram947)
ret void
}
; CHECK-NEXT: entry:
; CHECK-NEXT: ret void
- %label = bitcast i8* blockaddress(@test_indirectbr, %L1) to i8*
- indirectbr i8* %label, [label %L1, label %L2]
+ %label = bitcast ptr blockaddress(@test_indirectbr, %L1) to ptr
+ indirectbr ptr %label, [label %L1, label %L2]
L1: ; preds = %entry
ret void
entry:
%aa.addr = alloca i32, align 4
%bb = alloca i32, align 4
- store i32 %aa, i32* %aa.addr, align 4
- store i32 0, i32* %bb, align 4
+ store i32 %aa, ptr %aa.addr, align 4
+ store i32 0, ptr %bb, align 4
%tobool = icmp ne i32 %aa, 0
br i1 %tobool, label %if.then, label %if.end
br label %if.end
if.end: ; preds = %if.then, %entry
- store i32 1, i32* %bb, align 4
+ store i32 1, ptr %bb, align 4
br i1 %tobool, label %if.then.1, label %if.end.1 ; "line 10" to -debugify
if.then.1: ; preds = %if.end
br label %if.end.1
if.end.1: ; preds = %if.then.1, %if.end
- store i32 2, i32* %bb, align 4
+ store i32 2, ptr %bb, align 4
br label %for.end
for.end: ; preds = %if.end.1
declare void @fn()
-define void @test1() personality i32 (...)* @__gxx_personality_v0 {
+define void @test1() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @fn()
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: lpad2:
-; CHECK-NEXT: [[EXN2:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EXN2:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @fn()
; CHECK-NEXT: br label [[COMMON_RET]]
ret void
lpad1:
- %exn = landingpad {i8*, i32}
+ %exn = landingpad {ptr, i32}
cleanup
br label %shared_resume
lpad2:
- %exn2 = landingpad {i8*, i32}
+ %exn2 = landingpad {ptr, i32}
cleanup
br label %shared_resume
}
; Don't trigger if blocks aren't the same/empty
-define void @neg1() personality i32 (...)* @__gxx_personality_v0 {
+define void @neg1() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @neg1(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @fn()
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: lpad1:
-; CHECK-NEXT: [[EXN:%.*]] = landingpad { i8*, i32 }
-; CHECK-NEXT: filter [0 x i8*] zeroinitializer
+; CHECK-NEXT: [[EXN:%.*]] = landingpad { ptr, i32 }
+; CHECK-NEXT: filter [0 x ptr] zeroinitializer
; CHECK-NEXT: call void @fn()
; CHECK-NEXT: br label [[SHARED_RESUME:%.*]]
; CHECK: lpad2:
-; CHECK-NEXT: [[EXN2:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EXN2:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: br label [[SHARED_RESUME]]
; CHECK: shared_resume:
ret void
lpad1:
- %exn = landingpad {i8*, i32}
- filter [0 x i8*] zeroinitializer
+ %exn = landingpad {ptr, i32}
+ filter [0 x ptr] zeroinitializer
call void @fn()
br label %shared_resume
lpad2:
- %exn2 = landingpad {i8*, i32}
+ %exn2 = landingpad {ptr, i32}
cleanup
br label %shared_resume
}
; Should not trigger when the landing pads are not the exact same
-define void @neg2() personality i32 (...)* @__gxx_personality_v0 {
+define void @neg2() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @neg2(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @fn()
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: lpad1:
-; CHECK-NEXT: [[EXN:%.*]] = landingpad { i8*, i32 }
-; CHECK-NEXT: filter [0 x i8*] zeroinitializer
+; CHECK-NEXT: [[EXN:%.*]] = landingpad { ptr, i32 }
+; CHECK-NEXT: filter [0 x ptr] zeroinitializer
; CHECK-NEXT: br label [[SHARED_RESUME:%.*]]
; CHECK: lpad2:
-; CHECK-NEXT: [[EXN2:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EXN2:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: br label [[SHARED_RESUME]]
; CHECK: shared_resume:
ret void
lpad1:
- %exn = landingpad {i8*, i32}
- filter [0 x i8*] zeroinitializer
+ %exn = landingpad {ptr, i32}
+ filter [0 x ptr] zeroinitializer
br label %shared_resume
lpad2:
- %exn2 = landingpad {i8*, i32}
+ %exn2 = landingpad {ptr, i32}
cleanup
br label %shared_resume
declare void @llvm.foo(i32) nounwind
declare void @ProcessCLRException()
-define void @test1() personality void ()* @ProcessCLRException {
+define void @test1() personality ptr @ProcessCLRException {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
; Remove unreachble catch2, leave catch1 as-is
; Remove both catchpads and the catchswitch from exn.dispatch
-define void @test2() personality void ()* @ProcessCLRException {
+define void @test2() personality ptr @ProcessCLRException {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @f()
; Same as @test2, but exn.dispatch catchswitch has an unwind dest that
; preds need to be reidrected to
-define void @test3() personality void ()* @ProcessCLRException {
+define void @test3() personality ptr @ProcessCLRException {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -passes=simplifycfg -bonus-inst-threshold=1 | FileCheck %s
-declare i8* @llvm.strip.invariant.group.p0i8(i8*)
+declare ptr @llvm.strip.invariant.group.p0(ptr)
declare void @g1()
declare void @g2()
-define void @f(i8* %a, i8* %b, i1 %c, i1 %d, i1 %e) {
+define void @f(ptr %a, ptr %b, i1 %c, i1 %d, i1 %e) {
; CHECK-LABEL: @f(
-; CHECK-NEXT: [[A1:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* [[A:%.*]])
-; CHECK-NEXT: [[B1:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* [[B:%.*]])
-; CHECK-NEXT: [[I:%.*]] = icmp eq i8* [[A1]], [[B1]]
+; CHECK-NEXT: [[A1:%.*]] = call ptr @llvm.strip.invariant.group.p0(ptr [[A:%.*]])
+; CHECK-NEXT: [[B1:%.*]] = call ptr @llvm.strip.invariant.group.p0(ptr [[B:%.*]])
+; CHECK-NEXT: [[I:%.*]] = icmp eq ptr [[A1]], [[B1]]
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[C:%.*]], i1 [[I]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[L2:%.*]], label [[L3:%.*]]
; CHECK: l2:
;
br i1 %c, label %l1, label %l3
l1:
- %a1 = call i8* @llvm.strip.invariant.group.p0i8(i8* %a)
- %b1 = call i8* @llvm.strip.invariant.group.p0i8(i8* %b)
- %i = icmp eq i8* %a1, %b1
+ %a1 = call ptr @llvm.strip.invariant.group.p0(ptr %a)
+ %b1 = call ptr @llvm.strip.invariant.group.p0(ptr %b)
+ %i = icmp eq ptr %a1, %b1
br i1 %i, label %l2, label %l3
l2:
call void @g1()
; CHECK-NEXT: entr:
; CHECK-NEXT: br i1 %c, label [[NEXT:%.*]], label [[EXIT:%.*]]
; CHECK: next:
-; CHECK-NEXT: [[PAT:%.*]] = getelementptr [16 x i8], [16 x i8]* @glob
+; CHECK-NEXT: [[PAT:%.*]] = getelementptr [16 x i8], ptr @glob
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %c, label %next, label %exit
next:
- %pat = getelementptr [16 x i8], [16 x i8]* @glob
+ %pat = getelementptr [16 x i8], ptr @glob
br label %exit
exit:
ret i32 20
}
-define i32 @f_2(i1 %c, i32* %buf) {
+define i32 @f_2(i1 %c, ptr %buf) {
; CHECK-LABEL: @f_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[GUARD_BLOCK:%.*]], label [[MERGE_BLOCK:%.*]]
guard_block:
call void(i1, ...) @llvm.experimental.guard(i1 false) [ "deopt"() ]
- %val = load i32, i32* %buf
+ %val = load i32, ptr %buf
br label %merge_block
merge_block:
}
-define i32 @f_3(i1* %c, i32* %buf) {
+define i32 @f_3(ptr %c, ptr %buf) {
; CHECK-LABEL: @f_3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[C0:%.*]] = load volatile i1, i1* [[C:%.*]], align 1
+; CHECK-NEXT: [[C0:%.*]] = load volatile i1, ptr [[C:%.*]], align 1
; CHECK-NEXT: br i1 [[C0]], label [[GUARD_BLOCK:%.*]], label [[MERGE_BLOCK:%.*]]
; CHECK: guard_block:
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 false) [ "deopt"() ]
; CHECK-NEXT: unreachable
; CHECK: merge_block:
-; CHECK-NEXT: [[C1:%.*]] = load volatile i1, i1* [[C]], align 1
+; CHECK-NEXT: [[C1:%.*]] = load volatile i1, ptr [[C]], align 1
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[C1]], i32 50, i32 100
; CHECK-NEXT: ret i32 [[DOT]]
;
entry:
- %c0 = load volatile i1, i1* %c
+ %c0 = load volatile i1, ptr %c
br i1 %c0, label %guard_block, label %merge_block
guard_block:
call void(i1, ...) @llvm.experimental.guard(i1 false) [ "deopt"() ]
- %val = load i32, i32* %buf
- %c2 = load volatile i1, i1* %c
+ %val = load i32, ptr %buf
+ %c2 = load volatile i1, ptr %c
br i1 %c2, label %left, label %right
merge_block:
- %c1 = load volatile i1, i1* %c
+ %c1 = load volatile i1, ptr %c
br i1 %c1, label %left, label %right
left:
declare void @bar(i32)
-define void @test(i1 %P, i32* %Q) {
+define void @test(i1 %P, ptr %Q) {
; CHECK-LABEL: @test(
; CHECK-NEXT: common.ret:
-; CHECK-NEXT: store i32 1, i32* [[Q:%.*]], align 4
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: store i32 1, ptr [[Q:%.*]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[Q]], align 4
; CHECK-NEXT: call void @bar(i32 [[A]])
; CHECK-NEXT: ret void
;
br i1 %P, label %T, label %F
T: ; preds = %0
- store i32 1, i32* %Q
- %A = load i32, i32* %Q ; <i32> [#uses=1]
+ store i32 1, ptr %Q
+ %A = load i32, ptr %Q ; <i32> [#uses=1]
call void @bar( i32 %A )
ret void
F: ; preds = %0
- store i32 1, i32* %Q
- %B = load i32, i32* %Q ; <i32> [#uses=1]
+ store i32 1, ptr %Q
+ %B = load i32, ptr %Q ; <i32> [#uses=1]
call void @bar( i32 %B )
ret void
}
; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true -S < %s | FileCheck %s
; Verify that we don't crash due an invalid !dbg location on the hoisted llvm.dbg.value
-define i64 @caller(i64* %ptr, i64 %flag) !dbg !10 {
+define i64 @caller(ptr %ptr, i64 %flag) !dbg !10 {
init:
%v9 = icmp eq i64 %flag, 0
br i1 %v9, label %a, label %b
-; CHECK: %vala = load i64, i64* %ptr
+; CHECK: %vala = load i64, ptr %ptr
; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 %vala, metadata [[MD:![0-9]*]]
; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 %vala, metadata [[MD]]
; CHECK-NEXT: %valbmasked = and i64 %vala, 1
a: ; preds = %init
- %vala = load i64, i64* %ptr, align 8
+ %vala = load i64, ptr %ptr, align 8
call void @llvm.dbg.value(metadata i64 %vala, metadata !8, metadata !DIExpression()), !dbg !12
br label %test.exit
b: ; preds = %init
- %valb = load i64, i64* %ptr, align 8
+ %valb = load i64, ptr %ptr, align 8
call void @llvm.dbg.value(metadata i64 %valb, metadata !8, metadata !DIExpression()), !dbg !13
%valbmasked = and i64 %valb, 1
br label %test.exit
define i32 @test_inline_constraint_S_label_tailmerged(i1 %in) {
; CHECK-LABEL: @test_inline_constraint_S_label_tailmerged(
-; CHECK-NEXT: call void asm sideeffect "adr x0, $0", "S"(i8* blockaddress(@test_inline_constraint_S_label_tailmerged, [[COMMON_RET:%.*]]))
+; CHECK-NEXT: call void asm sideeffect "adr x0, $0", "S"(ptr blockaddress(@test_inline_constraint_S_label_tailmerged, [[COMMON_RET:%.*]]))
; CHECK-NEXT: [[COMMON_RETVAL:%.*]] = select i1 [[IN:%.*]], i32 0, i32 42
; CHECK-NEXT: br label [[COMMON_RET]]
; CHECK: common.ret:
; CHECK-NEXT: ret i32 [[COMMON_RETVAL]]
;
- call void asm sideeffect "adr x0, $0", "S"(i8* blockaddress(@test_inline_constraint_S_label_tailmerged, %loc))
+ call void asm sideeffect "adr x0, $0", "S"(ptr blockaddress(@test_inline_constraint_S_label_tailmerged, %loc))
br i1 %in, label %loc, label %loc2
loc:
br label %common.ret
define i32 @test_inline_constraint_S_label_tailmerged2(i1 %in) {
; CHECK-LABEL: @test_inline_constraint_S_label_tailmerged2(
; CHECK-NEXT: common.ret:
-; CHECK-NEXT: call void asm sideeffect "adr x0, $0", "S"(i8* blockaddress(@test_inline_constraint_S_label_tailmerged, [[COMMON_RET:%.*]]))
+; CHECK-NEXT: call void asm sideeffect "adr x0, $0", "S"(ptr blockaddress(@test_inline_constraint_S_label_tailmerged, [[COMMON_RET:%.*]]))
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[IN:%.*]], i32 0, i32 42
; CHECK-NEXT: ret i32 [[DOT]]
;
- call void asm sideeffect "adr x0, $0", "S"(i8* blockaddress(@test_inline_constraint_S_label_tailmerged, %loc))
+ call void asm sideeffect "adr x0, $0", "S"(ptr blockaddress(@test_inline_constraint_S_label_tailmerged, %loc))
br i1 %in, label %loc, label %loc2
common.ret:
%common.retval = phi i32 [ 0, %loc ], [ 42, %loc2 ]
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true -S | FileCheck %s
-define void @foo(i1 %c, i8* %p) {
+define void @foo(i1 %c, ptr %p) {
; CHECK: if:
-; CHECK-NEXT: load i8, i8* %p, align 1, !range !0
+; CHECK-NEXT: load i8, ptr %p, align 1, !range !0
; CHECK: !0 = !{i8 0, i8 1, i8 3, i8 5}
if:
br i1 %c, label %then, label %else
then:
- %t = load i8, i8* %p, !range !0
+ %t = load i8, ptr %p, !range !0
br label %out
else:
- %e = load i8, i8* %p, !range !1
+ %e = load i8, ptr %p, !range !1
br label %out
out:
ret void
declare void @B(i32)
declare void @C()
-define void @indbrtest0(i8** %P, i8** %Q) {
+define void @indbrtest0(ptr %P, ptr %Q) {
; CHECK-LABEL: @indbrtest0(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i8* blockaddress(@indbrtest0, [[BB0:%.*]]), i8** [[P:%.*]], align 8
-; CHECK-NEXT: store i8* blockaddress(@indbrtest0, [[BB1:%.*]]), i8** [[P]], align 8
-; CHECK-NEXT: store i8* blockaddress(@indbrtest0, [[BB2:%.*]]), i8** [[P]], align 8
+; CHECK-NEXT: store ptr blockaddress(@indbrtest0, [[BB0:%.*]]), ptr [[P:%.*]], align 8
+; CHECK-NEXT: store ptr blockaddress(@indbrtest0, [[BB1:%.*]]), ptr [[P]], align 8
+; CHECK-NEXT: store ptr blockaddress(@indbrtest0, [[BB2:%.*]]), ptr [[P]], align 8
; CHECK-NEXT: call void @foo()
-; CHECK-NEXT: [[T:%.*]] = load i8*, i8** [[Q:%.*]], align 8
-; CHECK-NEXT: indirectbr i8* [[T]], [label [[BB0]], label [[BB1]], label %BB2]
+; CHECK-NEXT: [[T:%.*]] = load ptr, ptr [[Q:%.*]], align 8
+; CHECK-NEXT: indirectbr ptr [[T]], [label [[BB0]], label [[BB1]], label %BB2]
; CHECK: BB0:
; CHECK-NEXT: call void @A()
; CHECK-NEXT: br label [[BB1]]
; CHECK-NEXT: br label [[COMMON_RET]]
;
entry:
- store i8* blockaddress(@indbrtest0, %BB0), i8** %P
- store i8* blockaddress(@indbrtest0, %BB1), i8** %P
- store i8* blockaddress(@indbrtest0, %BB2), i8** %P
+ store ptr blockaddress(@indbrtest0, %BB0), ptr %P
+ store ptr blockaddress(@indbrtest0, %BB1), ptr %P
+ store ptr blockaddress(@indbrtest0, %BB2), ptr %P
call void @foo()
- %t = load i8*, i8** %Q
- indirectbr i8* %t, [label %BB0, label %BB1, label %BB2, label %BB0, label %BB1, label %BB2]
+ %t = load ptr, ptr %Q
+ indirectbr ptr %t, [label %BB0, label %BB1, label %BB2, label %BB0, label %BB1, label %BB2]
BB0:
call void @A()
br label %BB1
; that because the predecessor is the entry block.
-define void @indbrtest1(i8** %P, i8** %Q) {
+define void @indbrtest1(ptr %P, ptr %Q) {
; CHECK-LABEL: @indbrtest1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i8* blockaddress(@indbrtest1, [[BB0:%.*]]), i8** [[P:%.*]], align 8
+; CHECK-NEXT: store ptr blockaddress(@indbrtest1, [[BB0:%.*]]), ptr [[P:%.*]], align 8
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB0]]
; CHECK: BB0:
; CHECK-NEXT: ret void
;
entry:
- store i8* blockaddress(@indbrtest1, %BB0), i8** %P
+ store ptr blockaddress(@indbrtest1, %BB0), ptr %P
call void @foo()
- %t = load i8*, i8** %Q
- indirectbr i8* %t, [label %BB0, label %BB0]
+ %t = load ptr, ptr %Q
+ indirectbr ptr %t, [label %BB0, label %BB0]
BB0:
call void @A()
ret void
; remove it from entry's successor list.
-define void @indbrtest2(i8* %t) {
+define void @indbrtest2(ptr %t) {
; CHECK-LABEL: @indbrtest2(
; CHECK-NEXT: entry:
; CHECK-NEXT: unreachable
;
entry:
- indirectbr i8* %t, [label %BB0, label %BB0]
+ indirectbr ptr %t, [label %BB0, label %BB0]
BB0:
ret void
}
; Make sure the blocks in the next few tests aren't trivially removable as
; successors by taking their addresses.
-@anchor = constant [13 x i8*] [
- i8* blockaddress(@indbrtest3, %L1), i8* blockaddress(@indbrtest3, %L2), i8* blockaddress(@indbrtest3, %L3),
- i8* blockaddress(@indbrtest4, %L1), i8* blockaddress(@indbrtest4, %L2), i8* blockaddress(@indbrtest4, %L3),
- i8* blockaddress(@indbrtest5, %L1), i8* blockaddress(@indbrtest5, %L2), i8* blockaddress(@indbrtest5, %L3), i8* blockaddress(@indbrtest5, %L4),
- i8* blockaddress(@indbrtest6, %L1), i8* blockaddress(@indbrtest6, %L2), i8* blockaddress(@indbrtest6, %L3)
+@anchor = constant [13 x ptr] [
+ ptr blockaddress(@indbrtest3, %L1), ptr blockaddress(@indbrtest3, %L2), ptr blockaddress(@indbrtest3, %L3),
+ ptr blockaddress(@indbrtest4, %L1), ptr blockaddress(@indbrtest4, %L2), ptr blockaddress(@indbrtest4, %L3),
+ ptr blockaddress(@indbrtest5, %L1), ptr blockaddress(@indbrtest5, %L2), ptr blockaddress(@indbrtest5, %L3), ptr blockaddress(@indbrtest5, %L4),
+ ptr blockaddress(@indbrtest6, %L1), ptr blockaddress(@indbrtest6, %L2), ptr blockaddress(@indbrtest6, %L3)
]
; SimplifyCFG should turn the indirectbr into a conditional branch on the
; condition of the select.
-define void @indbrtest3(i1 %cond, i8* %address) nounwind {
+define void @indbrtest3(i1 %cond, ptr %address) nounwind {
; CHECK-LABEL: @indbrtest3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[L1:%.*]], label [[L2:%.*]]
; CHECK-NEXT: br label [[COMMON_RET]]
;
entry:
- %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest3, %L1), i8* blockaddress(@indbrtest3, %L2)
- indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3]
+ %indirect.goto.dest = select i1 %cond, ptr blockaddress(@indbrtest3, %L1), ptr blockaddress(@indbrtest3, %L2)
+ indirectbr ptr %indirect.goto.dest, [label %L1, label %L2, label %L3]
L1:
call void @A()
; CHECK-NEXT: ret void
;
entry:
- %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest4, %L1), i8* blockaddress(@indbrtest4, %L1)
- indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3]
+ %indirect.goto.dest = select i1 %cond, ptr blockaddress(@indbrtest4, %L1), ptr blockaddress(@indbrtest4, %L1)
+ indirectbr ptr %indirect.goto.dest, [label %L1, label %L2, label %L3]
L1:
call void @A()
; SimplifyCFG should turn the indirectbr into an unreachable because neither
; destination is listed as a successor.
-define void @indbrtest5(i1 %cond, i8* %anchor) nounwind {
+define void @indbrtest5(i1 %cond, ptr %anchor) nounwind {
; CHECK-LABEL: @indbrtest5(
; CHECK-NEXT: entry:
; CHECK-NEXT: unreachable
;
entry:
- %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest5, %L1), i8* blockaddress(@indbrtest5, %L2)
+ %indirect.goto.dest = select i1 %cond, ptr blockaddress(@indbrtest5, %L1), ptr blockaddress(@indbrtest5, %L2)
; This needs to have more than one successor for this test, otherwise it gets
; replaced with an unconditional branch to the single successor.
- indirectbr i8* %indirect.goto.dest, [label %L3, label %L4]
+ indirectbr ptr %indirect.goto.dest, [label %L3, label %L4]
L1:
call void @A()
; This keeps blockaddresses not otherwise listed as successors from being zapped
; before SimplifyCFG even looks at the indirectbr.
- indirectbr i8* %anchor, [label %L1, label %L2]
+ indirectbr ptr %anchor, [label %L1, label %L2]
}
; The same as above, except the selected addresses are equal.
-define void @indbrtest6(i1 %cond, i8* %anchor) nounwind {
+define void @indbrtest6(i1 %cond, ptr %anchor) nounwind {
; CHECK-LABEL: @indbrtest6(
; CHECK-NEXT: entry:
; CHECK-NEXT: unreachable
;
entry:
- %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest6, %L1), i8* blockaddress(@indbrtest6, %L1)
+ %indirect.goto.dest = select i1 %cond, ptr blockaddress(@indbrtest6, %L1), ptr blockaddress(@indbrtest6, %L1)
; This needs to have more than one successor for this test, otherwise it gets
; replaced with an unconditional branch to the single successor.
- indirectbr i8* %indirect.goto.dest, [label %L2, label %L3]
+ indirectbr ptr %indirect.goto.dest, [label %L2, label %L3]
L1:
call void @A()
; This keeps blockaddresses not otherwise listed as successors from being zapped
; before SimplifyCFG even looks at the indirectbr.
- indirectbr i8* %anchor, [label %L1, label %L2]
+ indirectbr ptr %anchor, [label %L1, label %L2]
}
; PR10072
-@xblkx.bbs = internal unnamed_addr constant [9 x i8*] [i8* blockaddress(@indbrtest7, %xblkx.begin), i8* blockaddress(@indbrtest7, %xblkx.begin3), i8* blockaddress(@indbrtest7, %xblkx.begin4), i8* blockaddress(@indbrtest7, %xblkx.begin5), i8* blockaddress(@indbrtest7, %xblkx.begin6), i8* blockaddress(@indbrtest7, %xblkx.begin7), i8* blockaddress(@indbrtest7, %xblkx.begin8), i8* blockaddress(@indbrtest7, %xblkx.begin9), i8* blockaddress(@indbrtest7, %xblkx.end)]
+@xblkx.bbs = internal unnamed_addr constant [9 x ptr] [ptr blockaddress(@indbrtest7, %xblkx.begin), ptr blockaddress(@indbrtest7, %xblkx.begin3), ptr blockaddress(@indbrtest7, %xblkx.begin4), ptr blockaddress(@indbrtest7, %xblkx.begin5), ptr blockaddress(@indbrtest7, %xblkx.begin6), ptr blockaddress(@indbrtest7, %xblkx.begin7), ptr blockaddress(@indbrtest7, %xblkx.begin8), ptr blockaddress(@indbrtest7, %xblkx.begin9), ptr blockaddress(@indbrtest7, %xblkx.end)]
define void @indbrtest7() {
; CHECK-LABEL: @indbrtest7(
; CHECK-NEXT: br label [[XLAB5X:%.*]]
; CHECK: xlab8x:
; CHECK-NEXT: [[XVALUEX:%.*]] = call i32 @xselectorx()
-; CHECK-NEXT: [[XBLKX_X:%.*]] = getelementptr [9 x i8*], [9 x i8*]* @xblkx.bbs, i32 0, i32 [[XVALUEX]]
-; CHECK-NEXT: [[XBLKX_LOAD:%.*]] = load i8*, i8** [[XBLKX_X]], align 8
-; CHECK-NEXT: indirectbr i8* [[XBLKX_LOAD]], [label [[XLAB4X:%.*]], label %v2j]
+; CHECK-NEXT: [[XBLKX_X:%.*]] = getelementptr [9 x ptr], ptr @xblkx.bbs, i32 0, i32 [[XVALUEX]]
+; CHECK-NEXT: [[XBLKX_LOAD:%.*]] = load ptr, ptr [[XBLKX_X]], align 8
+; CHECK-NEXT: indirectbr ptr [[XBLKX_LOAD]], [label [[XLAB4X:%.*]], label %v2j]
; CHECK: v2j:
; CHECK-NEXT: [[XUNUSEDX:%.*]] = call i32 @xactionx()
; CHECK-NEXT: br label [[XLAB4X]]
xlab8x: ; preds = %xlab5x
%xvaluex = call i32 @xselectorx()
- %xblkx.x = getelementptr [9 x i8*], [9 x i8*]* @xblkx.bbs, i32 0, i32 %xvaluex
- %xblkx.load = load i8*, i8** %xblkx.x
- indirectbr i8* %xblkx.load, [label %xblkx.begin, label %xblkx.begin3, label %xblkx.begin4, label %xblkx.begin5, label %xblkx.begin6, label %xblkx.begin7, label %xblkx.begin8, label %xblkx.begin9, label %xblkx.end]
+ %xblkx.x = getelementptr [9 x ptr], ptr @xblkx.bbs, i32 0, i32 %xvaluex
+ %xblkx.load = load ptr, ptr %xblkx.x
+ indirectbr ptr %xblkx.load, [label %xblkx.begin, label %xblkx.begin3, label %xblkx.begin4, label %xblkx.begin5, label %xblkx.begin6, label %xblkx.begin7, label %xblkx.begin8, label %xblkx.begin9, label %xblkx.end]
xblkx.begin:
br label %xblkx.end
; CHECK-NEXT: ret void
;
entry:
- indirectbr i8* blockaddress(@indbrtest8, %BB1), [label %BB0, label %BB1]
+ indirectbr ptr blockaddress(@indbrtest8, %BB1), [label %BB0, label %BB1]
BB0:
call void @A()
ret void
; CHECK-NEXT: unreachable
;
entry:
- indirectbr i8* blockaddress(@indbrtest9, %BB1), [label %BB0]
+ indirectbr ptr blockaddress(@indbrtest9, %BB1), [label %BB0]
BB0:
call void @A()
ret void
; CHECK-NEXT: ret void
;
entry:
- indirectbr i8* blockaddress(@indbrtest10, %BB1), [label %BB1]
+ indirectbr ptr blockaddress(@indbrtest10, %BB1), [label %BB1]
BB0:
call void @A()
ret void
; CHECK-NEXT: ret void
;
entry:
- indirectbr i8* blockaddress(@indbrtest11, %BB0), [label %BB0, label %BB1, label %BB1]
+ indirectbr ptr blockaddress(@indbrtest11, %BB0), [label %BB0, label %BB1, label %BB1]
BB0:
call void @A()
ret void
; CHECK-NEXT: ret void
;
entry:
- indirectbr i8* blockaddress(@indbrtest12, %BB1), [label %BB0, label %BB1, label %BB1]
+ indirectbr ptr blockaddress(@indbrtest12, %BB1), [label %BB0, label %BB1, label %BB1]
BB0:
call void @A()
ret void
if.then:
%tmp1 = call i32 asm "mov $0, #1", "=r"() nounwind readnone
- store i32 %tmp1, i32* %y, align 4
+ store i32 %tmp1, ptr %y, align 4
br label %if.end
if.else:
%tmp2 = call i32 asm "mov $0, #2", "=r"() nounwind readnone
- store i32 %tmp2, i32* %y, align 4
+ store i32 %tmp2, ptr %y, align 4
br label %if.end
if.end:
- %tmp3 = load i32, i32* %y, align 4
+ %tmp3 = load i32, ptr %y, align 4
ret i32 %tmp3
}
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
declare i32 @__gxx_personality_v0(...)
-declare void @__cxa_call_unexpected(i8*)
+declare void @__cxa_call_unexpected(ptr)
declare void @purefn() nounwind readnone willreturn
declare i32 @readonly() nounwind readonly
declare i32 @readonly_willreturn() nounwind readonly willreturn
declare i32 @fn()
-define i8* @f1() nounwind uwtable ssp personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define ptr @f1() nounwind uwtable ssp personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
; CHECK-NEXT: unreachable
;
entry:
- %call = invoke noalias i8* undef()
+ %call = invoke noalias ptr undef()
to label %invoke.cont unwind label %lpad
invoke.cont:
- ret i8* %call
+ ret ptr %call
lpad:
- %0 = landingpad { i8*, i32 }
- filter [0 x i8*] zeroinitializer
- %1 = extractvalue { i8*, i32 } %0, 0
- tail call void @__cxa_call_unexpected(i8* %1) noreturn nounwind
+ %0 = landingpad { ptr, i32 }
+ filter [0 x ptr] zeroinitializer
+ %1 = extractvalue { ptr, i32 } %0, 0
+ tail call void @__cxa_call_unexpected(ptr %1) noreturn nounwind
unreachable
}
-define i8* @f2() nounwind uwtable ssp personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define ptr @f2() nounwind uwtable ssp personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @f2(
; CHECK-NEXT: entry:
; CHECK-NEXT: unreachable
;
entry:
- %call = invoke noalias i8* null()
+ %call = invoke noalias ptr null()
to label %invoke.cont unwind label %lpad
invoke.cont:
- ret i8* %call
+ ret ptr %call
lpad:
- %0 = landingpad { i8*, i32 }
- filter [0 x i8*] zeroinitializer
- %1 = extractvalue { i8*, i32 } %0, 0
- tail call void @__cxa_call_unexpected(i8* %1) noreturn nounwind
+ %0 = landingpad { ptr, i32 }
+ filter [0 x ptr] zeroinitializer
+ %1 = extractvalue { ptr, i32 } %0, 0
+ tail call void @__cxa_call_unexpected(ptr %1) noreturn nounwind
unreachable
}
-define i8* @f2_no_null_opt() nounwind uwtable ssp #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define ptr @f2_no_null_opt() nounwind uwtable ssp #0 personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @f2_no_null_opt(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CALL:%.*]] = invoke noalias i8* null()
+; CHECK-NEXT: [[CALL:%.*]] = invoke noalias ptr null()
; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: invoke.cont:
-; CHECK-NEXT: ret i8* [[CALL]]
+; CHECK-NEXT: ret ptr [[CALL]]
; CHECK: lpad:
-; CHECK-NEXT: [[TMP0:%.*]] = landingpad { i8*, i32 }
-; CHECK-NEXT: filter [0 x i8*] zeroinitializer
-; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i8*, i32 } [[TMP0]], 0
-; CHECK-NEXT: tail call void @__cxa_call_unexpected(i8* [[TMP1]]) #[[ATTR7:[0-9]+]]
+; CHECK-NEXT: [[TMP0:%.*]] = landingpad { ptr, i32 }
+; CHECK-NEXT: filter [0 x ptr] zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { ptr, i32 } [[TMP0]], 0
+; CHECK-NEXT: tail call void @__cxa_call_unexpected(ptr [[TMP1]]) #[[ATTR7:[0-9]+]]
; CHECK-NEXT: unreachable
;
entry:
- %call = invoke noalias i8* null()
+ %call = invoke noalias ptr null()
to label %invoke.cont unwind label %lpad
invoke.cont:
- ret i8* %call
+ ret ptr %call
lpad:
- %0 = landingpad { i8*, i32 }
- filter [0 x i8*] zeroinitializer
- %1 = extractvalue { i8*, i32 } %0, 0
- tail call void @__cxa_call_unexpected(i8* %1) noreturn nounwind
+ %0 = landingpad { ptr, i32 }
+ filter [0 x ptr] zeroinitializer
+ %1 = extractvalue { ptr, i32 } %0, 0
+ tail call void @__cxa_call_unexpected(ptr %1) noreturn nounwind
unreachable
}
-define i32 @invoke_readonly_may_not_return() nounwind personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define i32 @invoke_readonly_may_not_return() nounwind personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @invoke_readonly_may_not_return(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CALL:%.*]] = call i32 @readonly()
ret i32 3
lpad:
- %0 = landingpad { i8*, i32 }
- filter [0 x i8*] zeroinitializer
- %1 = extractvalue { i8*, i32 } %0, 0
- tail call void @__cxa_call_unexpected(i8* %1) noreturn nounwind
+ %0 = landingpad { ptr, i32 }
+ filter [0 x ptr] zeroinitializer
+ %1 = extractvalue { ptr, i32 } %0, 0
+ tail call void @__cxa_call_unexpected(ptr %1) noreturn nounwind
unreachable
}
-define i32 @invoke_readonly_willreturn() nounwind personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define i32 @invoke_readonly_willreturn() nounwind personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @invoke_readonly_willreturn(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret i32 3
ret i32 3
lpad:
- %0 = landingpad { i8*, i32 }
- filter [0 x i8*] zeroinitializer
- %1 = extractvalue { i8*, i32 } %0, 0
- tail call void @__cxa_call_unexpected(i8* %1) noreturn nounwind
+ %0 = landingpad { ptr, i32 }
+ filter [0 x ptr] zeroinitializer
+ %1 = extractvalue { ptr, i32 } %0, 0
+ tail call void @__cxa_call_unexpected(ptr %1) noreturn nounwind
unreachable
}
-define i32 @invoke_readonly_willreturn_with_used_retval() nounwind personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define i32 @invoke_readonly_willreturn_with_used_retval() nounwind personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @invoke_readonly_willreturn_with_used_retval(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CALL:%.*]] = call i32 @readonly_willreturn()
ret i32 %call
lpad:
- %0 = landingpad { i8*, i32 }
- filter [0 x i8*] zeroinitializer
- %1 = extractvalue { i8*, i32 } %0, 0
- tail call void @__cxa_call_unexpected(i8* %1) noreturn nounwind
+ %0 = landingpad { ptr, i32 }
+ filter [0 x ptr] zeroinitializer
+ %1 = extractvalue { ptr, i32 } %0, 0
+ tail call void @__cxa_call_unexpected(ptr %1) noreturn nounwind
unreachable
}
-define i32 @f5(i1 %cond, i8* %a, i8* %b) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define i32 @f5(i1 %cond, ptr %a, ptr %b) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @f5(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[X:%.*]], label [[Y:%.*]]
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[CALL]], [[X]] ], [ [[CALL2]], [[Y]] ]
; CHECK-NEXT: ret i32 [[PHI]]
; CHECK: lpad:
-; CHECK-NEXT: [[TMP0:%.*]] = landingpad { i8*, i32 }
-; CHECK-NEXT: filter [0 x i8*] zeroinitializer
-; CHECK-NEXT: tail call void @__cxa_call_unexpected(i8* [[A:%.*]]) #[[ATTR7]]
+; CHECK-NEXT: [[TMP0:%.*]] = landingpad { ptr, i32 }
+; CHECK-NEXT: filter [0 x ptr] zeroinitializer
+; CHECK-NEXT: tail call void @__cxa_call_unexpected(ptr [[A:%.*]]) #[[ATTR7]]
; CHECK-NEXT: unreachable
;
entry:
ret i32 %phi
lpad:
- %phi2 = phi i8* [%a, %x], [%b, %y]
- %0 = landingpad { i8*, i32 }
- filter [0 x i8*] zeroinitializer
- tail call void @__cxa_call_unexpected(i8* %phi2) noreturn nounwind
+ %phi2 = phi ptr [%a, %x], [%b, %y]
+ %0 = landingpad { ptr, i32 }
+ filter [0 x ptr] zeroinitializer
+ tail call void @__cxa_call_unexpected(ptr %phi2) noreturn nounwind
unreachable
}
-define void @f6() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @f6() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @f6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[FOO:%.*]] = invoke i32 @fn()
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: lpad:
-; CHECK-NEXT: [[TMP0:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[TMP0:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: br label [[COMMON_RET]]
;
ret void
lpad:
- %tmp = phi i8* [ null, %invoke.cont1 ], [ null, %entry ]
- landingpad { i8*, i32 }
+ %tmp = phi ptr [ null, %invoke.cont1 ], [ null, %entry ]
+ landingpad { ptr, i32 }
cleanup
ret void
}
-define void @invoke_of_noreturn() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @invoke_of_noreturn() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @invoke_of_noreturn(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @simple_throw()
; CHECK: invoke.cont.unreachable:
; CHECK-NEXT: unreachable
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @sideeffect(i32 1)
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
;
entry:
invoke void @simple_throw() to label %invoke.cont unwind label %lpad
ret void
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @sideeffect(i32 1)
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
}
-define void @invoke_of_noreturn_with_shared_normal_destination(i1 %c) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @invoke_of_noreturn_with_shared_normal_destination(i1 %c) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @invoke_of_noreturn_with_shared_normal_destination(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[INVOKE:%.*]], label [[INVOKE_CONT:%.*]]
; CHECK-NEXT: call void @sideeffect(i32 -1)
; CHECK-NEXT: ret void
; CHECK: lpad:
-; CHECK-NEXT: [[EH:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[EH:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @sideeffect(i32 1)
-; CHECK-NEXT: resume { i8*, i32 } [[EH]]
+; CHECK-NEXT: resume { ptr, i32 } [[EH]]
;
entry:
br i1 %c, label %invoke, label %invoke.cont
ret void
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @sideeffect(i32 1)
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
}
-define void @invoke_of_nounwind() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @invoke_of_nounwind() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @invoke_of_nounwind(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @simple_return()
ret void
lpad:
- %eh = landingpad { i8*, i32 } cleanup
+ %eh = landingpad { ptr, i32 } cleanup
call void @sideeffect(i32 1)
- resume { i8*, i32 } %eh
+ resume { ptr, i32 } %eh
}
declare void @simple_throw() noreturn
; This testcase checks to see if the simplifycfg pass is converting invoke
; instructions to call instructions if the handler just rethrows the exception.
-define i32 @test1() personality i32 (...)* @__gxx_personality_v0 {
+define i32 @test1() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @test1(
; CHECK-NEXT: call void @bar(), !prof !0
; CHECK-NEXT: ret i32 0
to label %1 unwind label %Rethrow, !prof !0
ret i32 0
Rethrow:
- %exn = landingpad {i8*, i32}
- catch i8* null
- resume { i8*, i32 } %exn
+ %exn = landingpad {ptr, i32}
+ catch ptr null
+ resume { ptr, i32 } %exn
}
!0 = !{!"branch_weights", i32 369, i32 2}
-define i32 @test2() personality i32 (...)* @__gxx_personality_v0 {
+define i32 @test2() personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @test2(
; CHECK-NEXT: call void @bar() [ "foo"(i32 100) ]
; CHECK-NEXT: ret i32 0
to label %1 unwind label %Rethrow
ret i32 0
Rethrow:
- %exn = landingpad {i8*, i32}
- catch i8* null
- resume { i8*, i32 } %exn
+ %exn = landingpad {ptr, i32}
+ catch ptr null
+ resume { ptr, i32 } %exn
}
declare i64 @dummy1()
; This testcase checks to see if simplifycfg pass can convert two invoke
; instructions to call instructions if they share a common trivial unwind
; block.
-define i64 @test3(i1 %cond) personality i32 (...)* @__gxx_personality_v0 {
+define i64 @test3(i1 %cond) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BR1:%.*]], label [[BR2:%.*]]
lpad1:
- %0 = landingpad { i8*, i32 }
+ %0 = landingpad { ptr, i32 }
cleanup
br label %rethrow
rethrow:
- %lp = phi { i8*, i32 } [%0, %lpad1], [%1, %lpad2]
- resume { i8*, i32 } %lp
+ %lp = phi { ptr, i32 } [%0, %lpad1], [%1, %lpad2]
+ resume { ptr, i32 } %lp
lpad2:
- %1 = landingpad { i8*, i32 }
+ %1 = landingpad { ptr, i32 }
cleanup
br label %rethrow
}
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
-declare void @llvm.lifetime.start.p0i8(i64, i8*)
-declare void @llvm.lifetime.end.p0i8(i64, i8*)
+declare void @llvm.lifetime.start.p0(i64, ptr)
+declare void @llvm.lifetime.end.p0(i64, ptr)
-declare void @escape(i32*)
+declare void @escape(ptr)
declare void @throwing_callee_foo()
declare void @throwing_callee_bar()
declare i32 @__gxx_personality_v0(...)
-define void @caller(i1 %c) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @caller(i1 %c) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @caller(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[I0:%.*]] = alloca i32, align 4
-; CHECK-NEXT: [[I1:%.*]] = bitcast i32* [[I0]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull [[I1]])
-; CHECK-NEXT: call void @escape(i32* [[I0]])
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[I0]])
+; CHECK-NEXT: call void @escape(ptr [[I0]])
; CHECK-NEXT: [[I2:%.*]] = alloca i32, align 4
-; CHECK-NEXT: [[I3:%.*]] = bitcast i32* [[I2]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull [[I3]])
-; CHECK-NEXT: call void @escape(i32* [[I2]])
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[I2]])
+; CHECK-NEXT: call void @escape(ptr [[I2]])
; CHECK-NEXT: [[I4:%.*]] = alloca i32, align 4
-; CHECK-NEXT: [[I5:%.*]] = bitcast i32* [[I4]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull [[I5]])
-; CHECK-NEXT: call void @escape(i32* [[I4]])
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[I4]])
+; CHECK-NEXT: call void @escape(ptr [[I4]])
; CHECK-NEXT: [[I6:%.*]] = alloca i32, align 4
-; CHECK-NEXT: [[I7:%.*]] = bitcast i32* [[I6]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull [[I7]])
-; CHECK-NEXT: call void @escape(i32* [[I6]])
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[I6]])
+; CHECK-NEXT: call void @escape(ptr [[I6]])
; CHECK-NEXT: br i1 [[C:%.*]], label [[V0:%.*]], label [[V1:%.*]]
; CHECK: v0:
; CHECK-NEXT: call void @throwing_callee_foo()
;
entry:
%i0 = alloca i32
- %i1 = bitcast i32* %i0 to i8*
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i1)
- call void @escape(i32* %i0)
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %i0)
+ call void @escape(ptr %i0)
%i2 = alloca i32
- %i3 = bitcast i32* %i2 to i8*
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i3)
- call void @escape(i32* %i2)
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %i2)
+ call void @escape(ptr %i2)
%i4 = alloca i32
- %i5 = bitcast i32* %i4 to i8*
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i5)
- call void @escape(i32* %i4)
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %i4)
+ call void @escape(ptr %i4)
%i6 = alloca i32
- %i7 = bitcast i32* %i6 to i8*
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i7)
- call void @escape(i32* %i6)
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %i6)
+ call void @escape(ptr %i6)
br i1 %c, label %v0, label %v1
unreachable
lpad.v0:
- %i8 = landingpad { i8*, i32 } cleanup
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i1)
+ %i8 = landingpad { ptr, i32 } cleanup
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %i0)
br label %end
lpad.v1:
- %i9 = landingpad { i8*, i32 } cleanup
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i3)
+ %i9 = landingpad { ptr, i32 } cleanup
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %i2)
br label %end
end:
- %i10 = phi { i8*, i32 } [ %i8, %lpad.v0 ], [ %i9, %lpad.v1 ]
- %i11 = phi i8* [ %i5, %lpad.v0 ], [ %i7, %lpad.v1 ]
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i11)
- resume { i8*, i32 } %i10
+ %i10 = phi { ptr, i32 } [ %i8, %lpad.v0 ], [ %i9, %lpad.v1 ]
+ %i11 = phi ptr [ %i4, %lpad.v0 ], [ %i6, %lpad.v1 ]
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %i11)
+ resume { ptr, i32 } %i10
}
; CHECK-NEXT: [[Z:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[Z16:%.*]] = alloca i32, align 4
; CHECK-NEXT: %"alloca point" = bitcast i32 0 to i32
-; CHECK-NEXT: store i32 0, i32* [[I]], align 4
+; CHECK-NEXT: store i32 0, ptr [[I]], align 4
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 1, 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[COND_TRUE:%.*]], label [[COND_FALSE33:%.*]]
; CHECK: cond_true:
-; CHECK-NEXT: store i32 0, i32* [[Z]], align 4
+; CHECK-NEXT: store i32 0, ptr [[Z]], align 4
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
-; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[Z]], align 4
+; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr [[Z]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP]], 16384
-; CHECK-NEXT: store i32 [[TMP1]], i32* [[Z]], align 4
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4
+; CHECK-NEXT: store i32 [[TMP1]], ptr [[Z]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1
-; CHECK-NEXT: store i32 [[TMP3]], i32* [[I]], align 4
-; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4
+; CHECK-NEXT: store i32 [[TMP3]], ptr [[I]], align 4
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4
; CHECK-NEXT: [[TMP5:%.*]] = icmp sgt i32 [[TMP4]], 262144
; CHECK-NEXT: [[TMP56:%.*]] = zext i1 [[TMP5]] to i8
; CHECK-NEXT: [[TOBOOL7:%.*]] = icmp ne i8 [[TMP56]], 0
; CHECK-NEXT: call void @abort()
; CHECK-NEXT: unreachable
; CHECK: cond_next:
-; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[Z]], align 4
+; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[Z]], align 4
; CHECK-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
; CHECK-NEXT: [[TMP1011:%.*]] = zext i1 [[TMP10]] to i8
; CHECK-NEXT: [[TOBOOL12:%.*]] = icmp ne i8 [[TMP1011]], 0
; CHECK-NEXT: unreachable
;
entry:
- %retval = alloca i32, align 4 ; <i32*> [#uses=1]
- %i = alloca i32, align 4 ; <i32*> [#uses=7]
- %z = alloca i32, align 4 ; <i32*> [#uses=4]
- %z16 = alloca i32, align 4 ; <i32*> [#uses=4]
+ %retval = alloca i32, align 4 ; <ptr> [#uses=1]
+ %i = alloca i32, align 4 ; <ptr> [#uses=7]
+ %z = alloca i32, align 4 ; <ptr> [#uses=4]
+ %z16 = alloca i32, align 4 ; <ptr> [#uses=4]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- store i32 0, i32* %i
+ store i32 0, ptr %i
%toBool = icmp ne i8 1, 0 ; <i1> [#uses=1]
br i1 %toBool, label %cond_true, label %cond_false
cond_true: ; preds = %entry
- store i32 0, i32* %z
+ store i32 0, ptr %z
br label %bb
bb: ; preds = %cond_next, %cond_true
- %tmp = load i32, i32* %z ; <i32> [#uses=1]
+ %tmp = load i32, ptr %z ; <i32> [#uses=1]
%tmp1 = sub i32 %tmp, 16384 ; <i32> [#uses=1]
- store i32 %tmp1, i32* %z
- %tmp2 = load i32, i32* %i ; <i32> [#uses=1]
+ store i32 %tmp1, ptr %z
+ %tmp2 = load i32, ptr %i ; <i32> [#uses=1]
%tmp3 = add i32 %tmp2, 1 ; <i32> [#uses=1]
- store i32 %tmp3, i32* %i
- %tmp4 = load i32, i32* %i ; <i32> [#uses=1]
+ store i32 %tmp3, ptr %i
+ %tmp4 = load i32, ptr %i ; <i32> [#uses=1]
%tmp5 = icmp sgt i32 %tmp4, 262144 ; <i1> [#uses=1]
%tmp56 = zext i1 %tmp5 to i8 ; <i8> [#uses=1]
%toBool7 = icmp ne i8 %tmp56, 0 ; <i1> [#uses=1]
unreachable
cond_next: ; preds = %bb
- %tmp9 = load i32, i32* %z ; <i32> [#uses=1]
+ %tmp9 = load i32, ptr %z ; <i32> [#uses=1]
%tmp10 = icmp ne i32 %tmp9, 0 ; <i1> [#uses=1]
%tmp1011 = zext i1 %tmp10 to i8 ; <i8> [#uses=1]
%toBool12 = icmp ne i8 %tmp1011, 0 ; <i1> [#uses=1]
br i1 %toBool14, label %cond_true15, label %cond_false33
cond_true15: ; preds = %cond_false
- store i32 0, i32* %z16
+ store i32 0, ptr %z16
br label %bb17
bb17: ; preds = %cond_next27, %cond_true15
- %tmp18 = load i32, i32* %z16 ; <i32> [#uses=1]
+ %tmp18 = load i32, ptr %z16 ; <i32> [#uses=1]
%tmp19 = sub i32 %tmp18, 16384 ; <i32> [#uses=1]
- store i32 %tmp19, i32* %z16
- %tmp20 = load i32, i32* %i ; <i32> [#uses=1]
+ store i32 %tmp19, ptr %z16
+ %tmp20 = load i32, ptr %i ; <i32> [#uses=1]
%tmp21 = add i32 %tmp20, 1 ; <i32> [#uses=1]
- store i32 %tmp21, i32* %i
- %tmp22 = load i32, i32* %i ; <i32> [#uses=1]
+ store i32 %tmp21, ptr %i
+ %tmp22 = load i32, ptr %i ; <i32> [#uses=1]
%tmp23 = icmp sgt i32 %tmp22, 262144 ; <i1> [#uses=1]
%tmp2324 = zext i1 %tmp23 to i8 ; <i8> [#uses=1]
%toBool25 = icmp ne i8 %tmp2324, 0 ; <i1> [#uses=1]
unreachable
cond_next27: ; preds = %bb17
- %tmp28 = load i32, i32* %z16 ; <i32> [#uses=1]
+ %tmp28 = load i32, ptr %z16 ; <i32> [#uses=1]
%tmp29 = icmp ne i32 %tmp28, 0 ; <i1> [#uses=1]
%tmp2930 = zext i1 %tmp29 to i8 ; <i8> [#uses=1]
%toBool31 = icmp ne i8 %tmp2930, 0 ; <i1> [#uses=1]
br label %return
return: ; preds = %cond_next35
- %retval36 = load i32, i32* %retval ; <i32> [#uses=1]
+ %retval36 = load i32, ptr %retval ; <i32> [#uses=1]
ret i32 %retval36
}
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
; CHECK-LABEL: define void @foo
-define void @foo() personality i32 (...)* @__gxx_personality_v0 {
+define void @foo() personality ptr @__gxx_personality_v0 {
entry:
; CHECK: alloca i8
-; CHECK: call void @llvm.lifetime.start.p0i8
+; CHECK: call void @llvm.lifetime.start.p0
; CHECK: call void @bar()
-; CHECK: call void @llvm.lifetime.end.p0i8
+; CHECK: call void @llvm.lifetime.end.p0
; CHECK: ret void
%a = alloca i8
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %a) nounwind
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %a) nounwind
invoke void @bar() to label %invoke.cont unwind label %lpad
invoke.cont:
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %a) nounwind
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %a) nounwind
ret void
lpad:
; CHECK-NOT: landingpad
- %b = landingpad { i8*, i32 }
+ %b = landingpad { ptr, i32 }
cleanup
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %a) nounwind
- resume { i8*, i32 } %b
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %a) nounwind
+ resume { ptr, i32 } %b
}
declare void @bar()
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) nounwind
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) nounwind
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) nounwind
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) nounwind
declare i32 @__gxx_personality_v0(...)
define void @foo(i1 %x) {
entry:
%a = alloca i8
- call void @llvm.lifetime.start.p0i8(i64 -1, i8* %a) nounwind
+ call void @llvm.lifetime.start.p0(i64 -1, ptr %a) nounwind
br i1 %x, label %bb0, label %bb1
bb0:
- call void @llvm.lifetime.end.p0i8(i64 -1, i8* %a) nounwind
+ call void @llvm.lifetime.end.p0(i64 -1, ptr %a) nounwind
br label %bb1
bb1:
declare void @f()
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) nounwind
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture) nounwind
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) nounwind
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture) nounwind
; There should be no additional PHIs created at all. The store should be on its own in a predicated
; block and there should be no PHIs.
-define i32 @f(i32* %b) {
+define i32 @f(ptr %b) {
; CHECK-LABEL: @f(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[AND:%.*]] = and i32 [[TMP0]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
; CHECK-NEXT: [[OR:%.*]] = or i32 [[TMP0]], -2147483648
; CHECK-NEXT: [[TMP61:%.*]] = or i1 [[TMP60]], [[TMP59]]
; CHECK-NEXT: br i1 [[TMP61]], label [[TMP62:%.*]], label [[TMP63:%.*]]
; CHECK: 62:
-; CHECK-NEXT: store i32 [[SPEC_SELECT13]], i32* [[B]], align 4
+; CHECK-NEXT: store i32 [[SPEC_SELECT13]], ptr [[B]], align 4
; CHECK-NEXT: br label [[TMP63]]
; CHECK: 63:
; CHECK-NEXT: ret i32 0
;
entry:
- %0 = load i32, i32* %b, align 4
+ %0 = load i32, ptr %b, align 4
%and = and i32 %0, 1
%tobool = icmp eq i32 %and, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
%or = or i32 %0, -2147483648
- store i32 %or, i32* %b, align 4
+ store i32 %or, ptr %b, align 4
br label %if.end
if.end: ; preds = %entry, %if.then
if.then3: ; preds = %if.end
%or4 = or i32 %1, 1073741824
- store i32 %or4, i32* %b, align 4
+ store i32 %or4, ptr %b, align 4
br label %if.end5
if.end5: ; preds = %if.end, %if.then3
if.then8: ; preds = %if.end5
%or9 = or i32 %2, 536870912
- store i32 %or9, i32* %b, align 4
+ store i32 %or9, ptr %b, align 4
br label %if.end10
if.end10: ; preds = %if.end5, %if.then8
if.then13: ; preds = %if.end10
%or14 = or i32 %3, 268435456
- store i32 %or14, i32* %b, align 4
+ store i32 %or14, ptr %b, align 4
br label %if.end15
if.end15: ; preds = %if.end10, %if.then13
if.then18: ; preds = %if.end15
%or19 = or i32 %4, 134217728
- store i32 %or19, i32* %b, align 4
+ store i32 %or19, ptr %b, align 4
br label %if.end20
if.end20: ; preds = %if.end15, %if.then18
if.then23: ; preds = %if.end20
%or24 = or i32 %5, 67108864
- store i32 %or24, i32* %b, align 4
+ store i32 %or24, ptr %b, align 4
br label %if.end25
if.end25: ; preds = %if.end20, %if.then23
if.then28: ; preds = %if.end25
%or29 = or i32 %6, 33554432
- store i32 %or29, i32* %b, align 4
+ store i32 %or29, ptr %b, align 4
br label %if.end30
if.end30: ; preds = %if.end25, %if.then28
if.then33: ; preds = %if.end30
%or34 = or i32 %7, 8388608
- store i32 %or34, i32* %b, align 4
+ store i32 %or34, ptr %b, align 4
br label %if.end35
if.end35: ; preds = %if.end30, %if.then33
if.then38: ; preds = %if.end35
%or39 = or i32 %8, 4194304
- store i32 %or39, i32* %b, align 4
+ store i32 %or39, ptr %b, align 4
br label %if.end40
if.end40: ; preds = %if.end35, %if.then38
if.then43: ; preds = %if.end40
%or44 = or i32 %9, 2097152
- store i32 %or44, i32* %b, align 4
+ store i32 %or44, ptr %b, align 4
br label %if.end45
if.end45: ; preds = %if.end40, %if.then43
if.then48: ; preds = %if.end45
%or49 = or i32 %10, 1048576
- store i32 %or49, i32* %b, align 4
+ store i32 %or49, ptr %b, align 4
br label %if.end50
if.end50: ; preds = %if.end45, %if.then48
if.then53: ; preds = %if.end50
%or54 = or i32 %11, 524288
- store i32 %or54, i32* %b, align 4
+ store i32 %or54, ptr %b, align 4
br label %if.end55
if.end55: ; preds = %if.end50, %if.then53
if.then58: ; preds = %if.end55
%or59 = or i32 %12, 262144
- store i32 %or59, i32* %b, align 4
+ store i32 %or59, ptr %b, align 4
br label %if.end60
if.end60: ; preds = %if.end55, %if.then58
if.then63: ; preds = %if.end60
%or64 = or i32 %13, 131072
- store i32 %or64, i32* %b, align 4
+ store i32 %or64, ptr %b, align 4
br label %if.end65
if.end65: ; preds = %if.end60, %if.then63
if.then68: ; preds = %if.end65
%or69 = or i32 %14, 65536
- store i32 %or69, i32* %b, align 4
+ store i32 %or69, ptr %b, align 4
br label %if.end70
if.end70: ; preds = %if.end65, %if.then68
if.then73: ; preds = %if.end70
%or74 = or i32 %15, 16777216
- store i32 %or74, i32* %b, align 4
+ store i32 %or74, ptr %b, align 4
br label %if.end75
if.end75: ; preds = %if.end70, %if.then73
; RUN: opt -passes=simplifycfg,instcombine -simplifycfg-require-and-preserve-domtree=1 < %s -simplifycfg-merge-cond-stores=true -simplifycfg-merge-cond-stores-aggressively=false -phi-node-folding-threshold=2 -S | FileCheck %s
; This test should succeed and end up if-converted.
-define void @test_simple(i32* %p, i32 %a, i32 %b) {
+define void @test_simple(ptr %p, i32 %a, i32 %b) {
; CHECK-LABEL: @test_simple(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = or i32 [[B:%.*]], [[A:%.*]]
; CHECK: 2:
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B]], 0
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X2]] to i32
-; CHECK-NEXT: store i32 [[SPEC_SELECT]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[SPEC_SELECT]], ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[TMP3]]
; CHECK: 3:
; CHECK-NEXT: ret void
br i1 %x1, label %fallthrough, label %yes1
yes1:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %fallthrough
fallthrough:
br i1 %x2, label %end, label %yes2
yes2:
- store i32 1, i32* %p
+ store i32 1, ptr %p
br label %end
end:
}
; This is the same as test_simple, but the branch target order has been swapped
-define void @test_simple_commuted(i32* %p, i32 %a, i32 %b) {
+define void @test_simple_commuted(ptr %p, i32 %a, i32 %b) {
; CHECK-LABEL: @test_simple_commuted(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X1_NOT:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[TMP0]], label [[TMP1:%.*]], label [[TMP2:%.*]]
; CHECK: 1:
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X2]] to i32
-; CHECK-NEXT: store i32 [[SPEC_SELECT]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[SPEC_SELECT]], ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[TMP2]]
; CHECK: 2:
; CHECK-NEXT: ret void
br i1 %x1, label %yes1, label %fallthrough
yes1:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %fallthrough
fallthrough:
br i1 %x2, label %yes2, label %end
yes2:
- store i32 1, i32* %p
+ store i32 1, ptr %p
br label %end
end:
}
; This test should entirely fold away, leaving one large basic block.
-define void @test_recursive(i32* %p, i32 %a, i32 %b, i32 %c, i32 %d) {
+define void @test_recursive(ptr %p, i32 %a, i32 %b, i32 %c, i32 %d) {
; CHECK-LABEL: @test_recursive(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = or i32 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X2]] to i32
; CHECK-NEXT: [[SPEC_SELECT1:%.*]] = select i1 [[X3]], i32 [[SPEC_SELECT]], i32 2
; CHECK-NEXT: [[SPEC_SELECT2:%.*]] = select i1 [[X4]], i32 [[SPEC_SELECT1]], i32 3
-; CHECK-NEXT: store i32 [[SPEC_SELECT2]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[SPEC_SELECT2]], ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[TMP5]]
; CHECK: 5:
; CHECK-NEXT: ret void
br i1 %x1, label %fallthrough, label %yes1
yes1:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %fallthrough
fallthrough:
br i1 %x2, label %next, label %yes2
yes2:
- store i32 1, i32* %p
+ store i32 1, ptr %p
br label %next
next:
br i1 %x3, label %fallthrough2, label %yes3
yes3:
- store i32 2, i32* %p
+ store i32 2, ptr %p
br label %fallthrough2
fallthrough2:
br i1 %x4, label %end, label %yes4
yes4:
- store i32 3, i32* %p
+ store i32 3, ptr %p
br label %end
; The code in each diamond is too large - it won't be if-converted so our
; heuristics should say no.
-define void @test_not_ifconverted(i32* %p, i32 %a, i32 %b) {
+define void @test_not_ifconverted(ptr %p, i32 %a, i32 %b) {
; CHECK-LABEL: @test_not_ifconverted(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X1:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: [[Y1:%.*]] = or i32 [[B:%.*]], 55
; CHECK-NEXT: [[Y2:%.*]] = add i32 [[Y1]], 24
; CHECK-NEXT: [[Y3:%.*]] = and i32 [[Y2]], 67
-; CHECK-NEXT: store i32 [[Y3]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[Y3]], ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[FALLTHROUGH]]
; CHECK: fallthrough:
; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B]], 0
; CHECK-NEXT: [[Z1:%.*]] = or i32 [[A]], 55
; CHECK-NEXT: [[Z2:%.*]] = add i32 [[Z1]], 24
; CHECK-NEXT: [[Z3:%.*]] = and i32 [[Z2]], 67
-; CHECK-NEXT: store i32 [[Z3]], i32* [[P]], align 4
+; CHECK-NEXT: store i32 [[Z3]], ptr [[P]], align 4
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: ret void
%y1 = or i32 %b, 55
%y2 = add i32 %y1, 24
%y3 = and i32 %y2, 67
- store i32 %y3, i32* %p
+ store i32 %y3, ptr %p
br label %fallthrough
fallthrough:
%z1 = or i32 %a, 55
%z2 = add i32 %z1, 24
%z3 = and i32 %z2, 67
- store i32 %z3, i32* %p
+ store i32 %z3, ptr %p
br label %end
end:
; The store to %p clobbers the previous store, so if-converting this would
; be illegal.
-define void @test_aliasing1(i32* %p, i32 %a, i32 %b) {
+define void @test_aliasing1(ptr %p, i32 %a, i32 %b) {
; CHECK-LABEL: @test_aliasing1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X1:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[X1]], label [[FALLTHROUGH:%.*]], label [[YES1:%.*]]
; CHECK: yes1:
-; CHECK-NEXT: store i32 0, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[FALLTHROUGH]]
; CHECK: fallthrough:
-; CHECK-NEXT: [[Y1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[Y1:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[Y1]], 0
; CHECK-NEXT: br i1 [[X2]], label [[END:%.*]], label [[YES2:%.*]]
; CHECK: yes2:
-; CHECK-NEXT: store i32 1, i32* [[P]], align 4
+; CHECK-NEXT: store i32 1, ptr [[P]], align 4
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: ret void
br i1 %x1, label %fallthrough, label %yes1
yes1:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %fallthrough
fallthrough:
- %y1 = load i32, i32* %p
+ %y1 = load i32, ptr %p
%x2 = icmp eq i32 %y1, 0
br i1 %x2, label %end, label %yes2
yes2:
- store i32 1, i32* %p
+ store i32 1, ptr %p
br label %end
end:
}
; The load from %q aliases with %p, so if-converting this would be illegal.
-define void @test_aliasing2(i32* %p, i32* %q, i32 %a, i32 %b) {
+define void @test_aliasing2(ptr %p, ptr %q, i32 %a, i32 %b) {
; CHECK-LABEL: @test_aliasing2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X1:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[X1]], label [[FALLTHROUGH:%.*]], label [[YES1:%.*]]
; CHECK: yes1:
-; CHECK-NEXT: store i32 0, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[FALLTHROUGH]]
; CHECK: fallthrough:
-; CHECK-NEXT: [[Y1:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[Y1:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[Y1]], 0
; CHECK-NEXT: br i1 [[X2]], label [[END:%.*]], label [[YES2:%.*]]
; CHECK: yes2:
-; CHECK-NEXT: store i32 1, i32* [[P]], align 4
+; CHECK-NEXT: store i32 1, ptr [[P]], align 4
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: ret void
br i1 %x1, label %fallthrough, label %yes1
yes1:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %fallthrough
fallthrough:
- %y1 = load i32, i32* %q
+ %y1 = load i32, ptr %q
%x2 = icmp eq i32 %y1, 0
br i1 %x2, label %end, label %yes2
yes2:
- store i32 1, i32* %p
+ store i32 1, ptr %p
br label %end
end:
declare void @f()
; This should get if-converted.
-define i32 @test_diamond_simple(i32* %p, i32* %q, i32 %a, i32 %b) {
+define i32 @test_diamond_simple(ptr %p, ptr %q, i32 %a, i32 %b) {
; CHECK-LABEL: @test_diamond_simple(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B:%.*]], 0
; CHECK: 2:
; CHECK-NEXT: [[NOT_X2:%.*]] = xor i1 [[X2]], true
; CHECK-NEXT: [[SIMPLIFYCFG_MERGE:%.*]] = zext i1 [[NOT_X2]] to i32
-; CHECK-NEXT: store i32 [[SIMPLIFYCFG_MERGE]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[SIMPLIFYCFG_MERGE]], ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[TMP3]]
; CHECK: 3:
; CHECK-NEXT: [[Z4:%.*]] = select i1 [[X2]], i32 0, i32 3
br i1 %x1, label %no1, label %yes1
yes1:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %fallthrough
no1:
br i1 %x2, label %no2, label %yes2
yes2:
- store i32 1, i32* %p
+ store i32 1, ptr %p
br label %end
no2:
; Now there is a call to f() in the bottom branch. The store in the first
; branch would now be reordered with respect to the call if we if-converted,
; so we must not.
-define i32 @test_diamond_alias3(i32* %p, i32* %q, i32 %a, i32 %b) {
+define i32 @test_diamond_alias3(ptr %p, ptr %q, i32 %a, i32 %b) {
; CHECK-LABEL: @test_diamond_alias3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X1:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[X1]], label [[NO1:%.*]], label [[YES1:%.*]]
; CHECK: yes1:
-; CHECK-NEXT: store i32 0, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[FALLTHROUGH:%.*]]
; CHECK: no1:
; CHECK-NEXT: call void @f()
; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B]], 0
; CHECK-NEXT: br i1 [[X2]], label [[NO2:%.*]], label [[YES2:%.*]]
; CHECK: yes2:
-; CHECK-NEXT: store i32 1, i32* [[P]], align 4
+; CHECK-NEXT: store i32 1, ptr [[P]], align 4
; CHECK-NEXT: br label [[END:%.*]]
; CHECK: no2:
; CHECK-NEXT: call void @f()
br i1 %x1, label %no1, label %yes1
yes1:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %fallthrough
no1:
br i1 %x2, label %no2, label %yes2
yes2:
- store i32 1, i32* %p
+ store i32 1, ptr %p
br label %end
no2:
}
; This test has an outer if over the two triangles. This requires creating a new BB to hold the store.
-define void @test_outer_if(i32* %p, i32 %a, i32 %b, i32 %c) {
+define void @test_outer_if(ptr %p, i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @test_outer_if(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X3:%.*]] = icmp eq i32 [[C:%.*]], 0
; CHECK: 2:
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B]], 0
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X2]] to i32
-; CHECK-NEXT: store i32 [[SPEC_SELECT]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[SPEC_SELECT]], ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: ret void
%x1 = icmp eq i32 %a, 0
br i1 %x1, label %fallthrough, label %yes1
yes1:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %fallthrough
fallthrough:
%x2 = icmp eq i32 %b, 0
br i1 %x2, label %end, label %yes2
yes2:
- store i32 1, i32* %p
+ store i32 1, ptr %p
br label %end
end:
ret void
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
target triple = "x86_64-unknown-linux-gnu"
-define void @test_01(i1 %cond) gc "statepoint-example" personality i32* ()* @zot {
+define void @test_01(i1 %cond) gc "statepoint-example" personality ptr @zot {
; CHECK-LABEL: @test_01(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[COND:%.*]], i32 0, i32 1
-; CHECK-NEXT: [[TMP4:%.*]] = call i8* @wibble()
-; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to i8 addrspace(1)* (i8 addrspace(1)*)*
-; CHECK-NEXT: [[TMP0:%.*]] = invoke align 8 dereferenceable_or_null(8) i8 addrspace(1)* [[TMP5]](i8 addrspace(1)* undef) [ "deopt"(i32 [[DOT]]) ]
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @wibble()
+; CHECK-NEXT: [[TMP0:%.*]] = invoke align 8 dereferenceable_or_null(8) ptr addrspace(1) [[TMP4]](ptr addrspace(1) undef) [ "deopt"(i32 [[DOT]]) ]
; CHECK-NEXT: to label [[BB8_CONT:%.*]] unwind label [[BB13:%.*]]
; CHECK: bb8.cont:
; CHECK-NEXT: unreachable
; CHECK: bb13:
-; CHECK-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[TMP14:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: ret void
;
ret void
bb3: ; preds = %bb
- %tmp4 = call i8* @wibble()
- %tmp5 = bitcast i8* %tmp4 to i8 addrspace(1)* (i8 addrspace(1)*)*
- %tmp6 = invoke align 8 dereferenceable_or_null(8) i8 addrspace(1)* %tmp5(i8 addrspace(1)* undef) [ "deopt"(i32 0) ]
+ %tmp4 = call ptr @wibble()
+ %tmp6 = invoke align 8 dereferenceable_or_null(8) ptr addrspace(1) %tmp4(ptr addrspace(1) undef) [ "deopt"(i32 0) ]
to label %bb7 unwind label %bb13
bb7: ; preds = %bb3
unreachable
bb8: ; preds = %bb
- %tmp9 = call i8* @wibble()
- %tmp10 = bitcast i8* %tmp9 to i8 addrspace(1)* (i8 addrspace(1)*)*
- %tmp11 = invoke align 8 dereferenceable_or_null(8) i8 addrspace(1)* %tmp10(i8 addrspace(1)* undef) [ "deopt"(i32 1) ]
+ %tmp9 = call ptr @wibble()
+ %tmp11 = invoke align 8 dereferenceable_or_null(8) ptr addrspace(1) %tmp9(ptr addrspace(1) undef) [ "deopt"(i32 1) ]
to label %bb12 unwind label %bb13
bb12: ; preds = %bb8
unreachable
bb13: ; preds = %bb8, %bb3
- %tmp14 = landingpad { i8*, i32 }
+ %tmp14 = landingpad { ptr, i32 }
cleanup
br label %bb1
}
-define void @test_02(i1 %cond) gc "statepoint-example" personality i32* ()* @zot {
+define void @test_02(i1 %cond) gc "statepoint-example" personality ptr @zot {
; CHECK-LABEL: @test_02(
; CHECK-NEXT: bb:
-; CHECK-NEXT: [[TMP4:%.*]] = call i8* @wibble()
-; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to i8 addrspace(1)* (i8 addrspace(1)*)*
-; CHECK-NEXT: [[TMP0:%.*]] = invoke align 8 dereferenceable_or_null(8) i8 addrspace(1)* [[TMP5]](i8 addrspace(1)* undef) [ "deopt"(i32 0) ]
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @wibble()
+; CHECK-NEXT: [[TMP0:%.*]] = invoke align 8 dereferenceable_or_null(8) ptr addrspace(1) [[TMP4]](ptr addrspace(1) undef) [ "deopt"(i32 0) ]
; CHECK-NEXT: to label [[BB8_CONT:%.*]] unwind label [[BB13:%.*]]
; CHECK: bb8.cont:
; CHECK-NEXT: unreachable
; CHECK: bb13:
-; CHECK-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[TMP14:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: ret void
;
ret void
bb3: ; preds = %bb
- %tmp4 = call i8* @wibble()
- %tmp5 = bitcast i8* %tmp4 to i8 addrspace(1)* (i8 addrspace(1)*)*
- %tmp6 = invoke align 8 dereferenceable_or_null(8) i8 addrspace(1)* %tmp5(i8 addrspace(1)* undef) [ "deopt"(i32 0) ]
+ %tmp4 = call ptr @wibble()
+ %tmp6 = invoke align 8 dereferenceable_or_null(8) ptr addrspace(1) %tmp4(ptr addrspace(1) undef) [ "deopt"(i32 0) ]
to label %bb7 unwind label %bb13
bb7: ; preds = %bb3
unreachable
bb8: ; preds = %bb
- %tmp9 = call i8* @wibble()
- %tmp10 = bitcast i8* %tmp9 to i8 addrspace(1)* (i8 addrspace(1)*)*
- %tmp11 = invoke align 8 dereferenceable_or_null(8) i8 addrspace(1)* %tmp10(i8 addrspace(1)* undef) [ "deopt"(i32 0) ]
+ %tmp9 = call ptr @wibble()
+ %tmp11 = invoke align 8 dereferenceable_or_null(8) ptr addrspace(1) %tmp9(ptr addrspace(1) undef) [ "deopt"(i32 0) ]
to label %bb12 unwind label %bb13
bb12: ; preds = %bb8
unreachable
bb13: ; preds = %bb8, %bb3
- %tmp14 = landingpad { i8*, i32 }
+ %tmp14 = landingpad { ptr, i32 }
cleanup
br label %bb1
}
-declare i32* @zot()
+declare ptr @zot()
-declare i8* @wibble()
+declare ptr @wibble()
; the other behind, because that still requires a branch. If
; SimplifyCFG if-converts one of the phis, it should do both.
-define i32 @upper_bound(i32* %r, i32 %high, i32 %k) nounwind {
+define i32 @upper_bound(ptr %r, i32 %high, i32 %k) nounwind {
; CHECK-LABEL: @upper_bound(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LOW_0]], [[HIGH_ADDR_0]]
; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 2
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[DIV]] to i64
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[R:%.*]], i64 [[IDXPROM]]
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[R:%.*]], i64 [[IDXPROM]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[K:%.*]], [[TMP0]]
; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[DIV]], 1
; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i32 [[DIV]], i32 [[HIGH_ADDR_0]]
%add = add i32 %low.0, %high.addr.0
%div = udiv i32 %add, 2
%idxprom = zext i32 %div to i64
- %arrayidx = getelementptr inbounds i32, i32* %r, i64 %idxprom
- %0 = load i32, i32* %arrayidx
+ %arrayidx = getelementptr inbounds i32, ptr %r, i64 %idxprom
+ %0 = load i32, ptr %arrayidx
%cmp1 = icmp ult i32 %k, %0
br i1 %cmp1, label %if.then, label %if.else
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -sink-common-insts -S | FileCheck %s
; RUN: opt < %s -passes='simplifycfg<sink-common-insts>' -S | FileCheck %s
-define i1 @test1(i1 zeroext %flag, i8* %y) #0 {
+define i1 @test1(i1 zeroext %flag, ptr %y) #0 {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[S:%.*]] = call i1 @llvm.type.test(i8* [[Y:%.*]], metadata [[META0:![0-9]+]])
-; CHECK-NEXT: [[R:%.*]] = call i1 @llvm.type.test(i8* [[Y]], metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[S:%.*]] = call i1 @llvm.type.test(ptr [[Y:%.*]], metadata [[META0:![0-9]+]])
+; CHECK-NEXT: [[R:%.*]] = call i1 @llvm.type.test(ptr [[Y]], metadata [[META1:![0-9]+]])
; CHECK-NEXT: [[T:%.*]] = select i1 [[FLAG:%.*]], i1 [[R]], i1 [[S]]
; CHECK-NEXT: ret i1 [[T]]
;
br i1 %flag, label %if.then, label %if.else
if.then:
- %r = call i1 @llvm.type.test(i8* %y, metadata !0)
+ %r = call i1 @llvm.type.test(ptr %y, metadata !0)
br label %if.end
if.else:
- %s = call i1 @llvm.type.test(i8* %y, metadata !1)
+ %s = call i1 @llvm.type.test(ptr %y, metadata !1)
br label %if.end
if.end:
!0 = !{i32 0, !"typeid1"}
!1 = !{i32 4, !"typeid1"}
-declare i1 @llvm.type.test(i8* %ptr, metadata %bitset) nounwind readnone
+declare i1 @llvm.type.test(ptr %ptr, metadata %bitset) nounwind readnone
-define i1 @test2(i1 zeroext %flag, i8* %y, i8* %z) #0 {
+define i1 @test2(i1 zeroext %flag, ptr %y, ptr %z) #0 {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[Y_Z:%.*]] = select i1 [[FLAG:%.*]], i8* [[Y:%.*]], i8* [[Z:%.*]]
-; CHECK-NEXT: [[S:%.*]] = call i1 @llvm.type.test(i8* [[Y_Z]], metadata [[META1]])
+; CHECK-NEXT: [[Y_Z:%.*]] = select i1 [[FLAG:%.*]], ptr [[Y:%.*]], ptr [[Z:%.*]]
+; CHECK-NEXT: [[S:%.*]] = call i1 @llvm.type.test(ptr [[Y_Z]], metadata [[META1]])
; CHECK-NEXT: ret i1 [[S]]
;
entry:
br i1 %flag, label %if.then, label %if.else
if.then:
- %r = call i1 @llvm.type.test(i8* %y, metadata !0)
+ %r = call i1 @llvm.type.test(ptr %y, metadata !0)
br label %if.end
if.else:
- %s = call i1 @llvm.type.test(i8* %z, metadata !0)
+ %s = call i1 @llvm.type.test(ptr %z, metadata !0)
br label %if.end
if.end:
; CHECK-LABEL: @TestNoAsan(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @g, align 4
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL]], i32 0, i32 [[TMP0]]
; CHECK-NEXT: ret i32 [[SPEC_SELECT]]
;
br i1 %tobool, label %return, label %if.then
if.then: ; preds = %entry
- %0 = load i32, i32* @g, align 4
+ %0 = load i32, ptr @g, align 4
br label %return
return: ; preds = %entry, %if.then
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @g, align 4
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL:%.*]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %tobool, label %return, label %if.then
if.then: ; preds = %entry
- %0 = load i32, i32* @g, align 4
+ %0 = load i32, ptr @g, align 4
br label %return
return: ; preds = %entry, %if.then
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @g, align 4
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL:%.*]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %tobool, label %return, label %if.then
if.then: ; preds = %entry
- %0 = load i32, i32* @g, align 4
+ %0 = load i32, ptr @g, align 4
br label %return
return: ; preds = %entry, %if.then
; CHECK-LABEL: @TestNoTsan(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @g, align 4
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL]], i32 0, i32 [[TMP0]]
; CHECK-NEXT: ret i32 [[SPEC_SELECT]]
;
br i1 %tobool, label %return, label %if.then
if.then: ; preds = %entry
- %0 = load i32, i32* @g, align 4
+ %0 = load i32, ptr @g, align 4
br label %return
return: ; preds = %entry, %if.then
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @g, align 4
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL:%.*]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
br i1 %tobool, label %return, label %if.then
if.then: ; preds = %entry
- %0 = load i32, i32* @g, align 4
+ %0 = load i32, ptr @g, align 4
br label %return
return: ; preds = %entry, %if.then
define void @hoist(i32 %i) {
entry:
%i.addr = alloca i32, align 4
- store i32 %i, i32* %i.addr, align 4
- %0 = load i32, i32* %i.addr, align 4
+ store i32 %i, ptr %i.addr, align 4
+ %0 = load i32, ptr %i.addr, align 4
%cmp = icmp eq i32 %0, 5
br i1 %cmp, label %if.then, label %if.else
unreachable
if.else:
- %1 = load i32, i32* %i.addr, align 4
+ %1 = load i32, ptr %i.addr, align 4
%cmp1 = icmp eq i32 %i, 7
br i1 %cmp1, label %if.then2, label %if.end
target datalayout = "ni:1"
-define void @test_01(i64 addrspace(1)* align 8 %ptr) {
+define void @test_01(ptr addrspace(1) align 8 %ptr) {
; CHECK-LABEL: @test_01(
; CHECK-NOT: ptrtoint
-; CHECK-NEXT: icmp eq i64 addrspace(1)* %ptr, null
+; CHECK-NEXT: icmp eq ptr addrspace(1) %ptr, null
; CHECK-NOT: ptrtoint
- %cond1 = icmp eq i64 addrspace(1)* %ptr, null
- %cond2 = icmp eq i64 addrspace(1)* %ptr, null
+ %cond1 = icmp eq ptr addrspace(1) %ptr, null
+ %cond2 = icmp eq ptr addrspace(1) %ptr, null
br i1 %cond1, label %true1, label %false1
true1:
br i1 %cond2, label %true2, label %false2
false1:
- store i64 1, i64 addrspace(1)* %ptr, align 8
+ store i64 1, ptr addrspace(1) %ptr, align 8
br label %true1
true2:
- store i64 2, i64 addrspace(1)* %ptr, align 8
+ store i64 2, ptr addrspace(1) %ptr, align 8
ret void
false2:
- store i64 3, i64 addrspace(1)* %ptr, align 8
+ store i64 3, ptr addrspace(1) %ptr, align 8
ret void
}
define i32 @foo(i32 %x) optforfuzzing {
entry:
%x.addr = alloca i32, align 4
- store i32 %x, i32* %x.addr, align 4
- %0 = load i32, i32* %x.addr, align 4
+ store i32 %x, ptr %x.addr, align 4
+ %0 = load i32, ptr %x.addr, align 4
%cmp = icmp sgt i32 %0, 16
br i1 %cmp, label %land.rhs, label %land.end
land.rhs:
- %1 = load i32, i32* %x.addr, align 4
+ %1 = load i32, ptr %x.addr, align 4
%cmp1 = icmp slt i32 %1, 32
br label %land.end
define i32 @bar(i32 %x) {
entry:
%x.addr = alloca i32, align 4
- store i32 %x, i32* %x.addr, align 4
- %0 = load i32, i32* %x.addr, align 4
+ store i32 %x, ptr %x.addr, align 4
+ %0 = load i32, ptr %x.addr, align 4
%cmp = icmp sgt i32 %0, 16
br i1 %cmp, label %land.rhs, label %land.end
land.rhs:
- %1 = load i32, i32* %x.addr, align 4
+ %1 = load i32, ptr %x.addr, align 4
%cmp1 = icmp slt i32 %1, 32
br label %land.end
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S %s | FileCheck %s
-@glob = internal constant [5 x i8*] zeroinitializer, align 16
+@glob = internal constant [5 x ptr] zeroinitializer, align 16
; Make sure simplifycfg does not crash when dealing with icmp constant
; expressions.
define i1 @test(i1 %c) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], i1 false, i1 icmp ult (i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @glob, i64 0, i64 0), i8** inttoptr (i64 -40 to i8**))
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], i1 false, i1 icmp ugt (ptr inttoptr (i64 -40 to ptr), ptr @glob)
; CHECK-NEXT: ret i1 [[SPEC_SELECT]]
;
entry:
br label %exit
exit:
- %p = phi i1 [ false, %if.then ], [ icmp ult (i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @glob, i64 0, i64 0), i8** inttoptr (i64 -40 to i8**)), %entry ]
+ %p = phi i1 [ false, %if.then ], [ icmp ult (ptr @glob, ptr inttoptr (i64 -40 to ptr)), %entry ]
ret i1 %p
}
declare void @bar() nounwind
-define i32 @test1(i32* %a, i32 %b, i32* %c, i32 %d) nounwind {
+define i32 @test1(ptr %a, i32 %b, ptr %c, i32 %d) nounwind {
entry:
%tobool = icmp eq i32 %b, 0
br i1 %tobool, label %if.else, label %if.then
br label %if.end7
if.end7: ; preds = %if.else, %if.then4, %if.then
- %x.0 = phi i32* [ %a, %if.then ], [ %c, %if.then4 ], [ null, %if.else ]
- %tmp9 = load i32, i32* %x.0
+ %x.0 = phi ptr [ %a, %if.then ], [ %c, %if.then4 ], [ null, %if.else ]
+ %tmp9 = load i32, ptr %x.0
ret i32 %tmp9
; CHECK-LABEL: @test1(
; CHECK: if.else:
; CHECK: br label %if.end7
-; CHECK: phi i32* [ %a, %if.then ], [ %c, %if.else ]
+; CHECK: phi ptr [ %a, %if.then ], [ %c, %if.else ]
}
-define i32 @test1_no_null_opt(i32* %a, i32 %b, i32* %c, i32 %d) nounwind #0 {
+define i32 @test1_no_null_opt(ptr %a, i32 %b, ptr %c, i32 %d) nounwind #0 {
entry:
%tobool = icmp eq i32 %b, 0
br i1 %tobool, label %if.else, label %if.then
br label %if.end7
if.end7: ; preds = %if.else, %if.then4, %if.then
- %x.0 = phi i32* [ %a, %if.then ], [ %c, %if.then4 ], [ null, %if.else ]
- %tmp9 = load i32, i32* %x.0
+ %x.0 = phi ptr [ %a, %if.then ], [ %c, %if.then4 ], [ null, %if.else ]
+ %tmp9 = load i32, ptr %x.0
ret i32 %tmp9
; CHECK-LABEL: @test1_no_null_opt(
; CHECK: if.then4:
; CHECK: br label %if.end7
; CHECK: if.end7:
-; CHECK-NEXT: phi i32* [ %a, %if.then ], [ %c, %if.then4 ], [ null, %if.else ]
+; CHECK-NEXT: phi ptr [ %a, %if.then ], [ %c, %if.then4 ], [ null, %if.else ]
}
-define i32 @test2(i32* %a, i32 %b, i32* %c, i32 %d) nounwind {
+define i32 @test2(ptr %a, i32 %b, ptr %c, i32 %d) nounwind {
entry:
%tobool = icmp eq i32 %b, 0
br i1 %tobool, label %if.else, label %if.then
br label %if.end7
if.end7: ; preds = %if.else, %if.then4, %if.then
- %x.0 = phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
- %tmp9 = load i32, i32* %x.0
+ %x.0 = phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+ %tmp9 = load i32, ptr %x.0
ret i32 %tmp9
; CHECK-LABEL: @test2(
; CHECK: if.else:
; CHECK-NOT: phi
}
-define i32 @test2_no_null_opt(i32* %a, i32 %b, i32* %c, i32 %d) nounwind #0 {
+define i32 @test2_no_null_opt(ptr %a, i32 %b, ptr %c, i32 %d) nounwind #0 {
entry:
%tobool = icmp eq i32 %b, 0
br i1 %tobool, label %if.else, label %if.then
br label %if.end7
if.end7: ; preds = %if.else, %if.then4, %if.then
- %x.0 = phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
- %tmp9 = load i32, i32* %x.0
+ %x.0 = phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+ %tmp9 = load i32, ptr %x.0
ret i32 %tmp9
; CHECK-LABEL: @test2_no_null_opt(
; CHECK: if.then:
; CHECK: if.else:
; CHECK: if.then4:
; CHECK: if.end7:
-; CHECK-NEXT: phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+; CHECK-NEXT: phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
}
-define i32 @test3(i32* %a, i32 %b, i32* %c, i32 %d) nounwind {
+define i32 @test3(ptr %a, i32 %b, ptr %c, i32 %d) nounwind {
entry:
%tobool = icmp eq i32 %b, 0
br i1 %tobool, label %if.else, label %if.then
br label %if.end7
if.end7: ; preds = %if.else, %if.then4, %if.then
- %x.0 = phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+ %x.0 = phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
tail call void @bar() nounwind
- %tmp9 = load i32, i32* %x.0
+ %tmp9 = load i32, ptr %x.0
ret i32 %tmp9
; CHECK-LABEL: @test3(
; CHECK: if.end7:
-; CHECK: phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+; CHECK: phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
}
-define i32 @test3_no_null_opt(i32* %a, i32 %b, i32* %c, i32 %d) nounwind #0 {
+define i32 @test3_no_null_opt(ptr %a, i32 %b, ptr %c, i32 %d) nounwind #0 {
entry:
%tobool = icmp eq i32 %b, 0
br i1 %tobool, label %if.else, label %if.then
br label %if.end7
if.end7: ; preds = %if.else, %if.then4, %if.then
- %x.0 = phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+ %x.0 = phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
tail call void @bar() nounwind
- %tmp9 = load i32, i32* %x.0
+ %tmp9 = load i32, ptr %x.0
ret i32 %tmp9
; CHECK-LABEL: @test3_no_null_opt(
; CHECK: if.then:
; CHECK: if.else:
; CHECK: if.then4:
; CHECK: if.end7:
-; CHECK-NEXT: phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+; CHECK-NEXT: phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
}
-define i32 @test4(i32* %a, i32 %b, i32* %c, i32 %d) nounwind {
+define i32 @test4(ptr %a, i32 %b, ptr %c, i32 %d) nounwind {
entry:
%tobool = icmp eq i32 %b, 0
br i1 %tobool, label %if.else, label %if.then
br label %if.end7
if.end7: ; preds = %if.else, %if.then4, %if.then
- %x.0 = phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
- %gep = getelementptr i32, i32* %x.0, i32 10
- %tmp9 = load i32, i32* %gep
+ %x.0 = phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+ %gep = getelementptr i32, ptr %x.0, i32 10
+ %tmp9 = load i32, ptr %gep
%tmp10 = or i32 %tmp9, 1
- store i32 %tmp10, i32* %gep
+ store i32 %tmp10, ptr %gep
ret i32 %tmp9
; CHECK-LABEL: @test4(
; CHECK-NOT: phi
}
-define i32 @test4_no_null_opt(i32* %a, i32 %b, i32* %c, i32 %d) nounwind #0 {
+define i32 @test4_no_null_opt(ptr %a, i32 %b, ptr %c, i32 %d) nounwind #0 {
entry:
%tobool = icmp eq i32 %b, 0
br i1 %tobool, label %if.else, label %if.then
br label %if.end7
if.end7: ; preds = %if.else, %if.then4, %if.then
- %x.0 = phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
- %gep = getelementptr i32, i32* %x.0, i32 10
- %tmp9 = load i32, i32* %gep
+ %x.0 = phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+ %gep = getelementptr i32, ptr %x.0, i32 10
+ %tmp9 = load i32, ptr %gep
%tmp10 = or i32 %tmp9, 1
- store i32 %tmp10, i32* %gep
+ store i32 %tmp10, ptr %gep
ret i32 %tmp9
; CHECK-LABEL: @test4_no_null_opt(
; CHECK: if.then:
; CHECK: if.else:
; CHECK: if.then4:
; CHECK: if.end7:
-; CHECK-NEXT: phi i32* [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
+; CHECK-NEXT: phi ptr [ %a, %if.then ], [ null, %if.then4 ], [ null, %if.else ]
}
attributes #0 = { null_pointer_is_valid }
; CHECK-NOT: br label %for.cond
; CHECK: if.end:
; CHECK: br label %for.cond
-define i1 @test(i32 %a, i32 %b, i32* %c) {
+define i1 @test(i32 %a, i32 %b, ptr %c) {
entry:
br label %for.cond
for.body: ; preds = %for.cond
%or = or i32 %a, %b
%idxprom = sext i32 %dec to i64
- %arrayidx = getelementptr inbounds i32, i32* %c, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %c, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%cmp = icmp eq i32 %or, %0
br i1 %cmp, label %if.end, label %if.then
if.then: ; preds = %for.body
- store i32 %or, i32* %arrayidx, align 4
+ store i32 %or, ptr %arrayidx, align 4
call void @foo()
br label %if.end
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S %s | FileCheck %s
-%foo = type { i32 (%foo)*, i32 }
+%foo = type { ptr, i32 }
declare i32 @putchar(i32)
declare void @personality()
-define void @test(i1 %b) personality void()* @personality !dbg !1 {
+define void @test(i1 %b) personality ptr @personality !dbg !1 {
; CHECK: invoke void @inlinable()
; CHECK-NEXT: to label %common.ret unwind label %failure, !dbg ![[DBGLOC:[0-9]+]]
br i1 %b, label %if, label %else
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
-define i32 @foo_add(i8* %arg, i32 %arg1, i32 %arg2) {
+define i32 @foo_add(ptr %arg, i32 %arg1, i32 %arg2) {
; CHECK-LABEL: @foo_add(
; CHECK-NEXT: common.ret:
; CHECK-NEXT: [[I:%.*]] = sext i32 [[ARG1:%.*]] to i64
-; CHECK-NEXT: [[I3:%.*]] = getelementptr inbounds i8, i8* [[ARG:%.*]], i64 [[I]]
-; CHECK-NEXT: [[I4:%.*]] = load i8, i8* [[I3]], align 1
+; CHECK-NEXT: [[I3:%.*]] = getelementptr inbounds i8, ptr [[ARG:%.*]], i64 [[I]]
+; CHECK-NEXT: [[I4:%.*]] = load i8, ptr [[I3]], align 1
; CHECK-NEXT: [[I5:%.*]] = zext i8 [[I4]] to i32
; CHECK-NEXT: [[I6:%.*]] = add nsw i32 [[I5]], [[ARG2:%.*]]
; CHECK-NEXT: [[I7:%.*]] = icmp sgt i32 [[I6]], 255
; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
;
%i = sext i32 %arg1 to i64
- %i3 = getelementptr inbounds i8, i8* %arg, i64 %i
- %i4 = load i8, i8* %i3, align 1
+ %i3 = getelementptr inbounds i8, ptr %arg, i64 %i
+ %i4 = load i8, ptr %i3, align 1
%i5 = zext i8 %i4 to i32
%i6 = add nsw i32 %i5, %arg2
%i7 = icmp sgt i32 %i6, 255
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
; CHECK-NEXT: br label [[DO_BODY:%.*]]
; CHECK: do.body:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @C, align 4, !tbaa [[TBAA2:![0-9]+]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @C, align 4, !tbaa [[TBAA2:![0-9]+]]
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[J]] to i8*
-; CHECK-NEXT: call addrspace(1) void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP1]]) #[[ATTR2:[0-9]+]]
-; CHECK-NEXT: store i32 0, i32* [[J]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: call addrspace(1) void @llvm.lifetime.start.p0(i64 4, ptr [[J]]) #[[ATTR2:[0-9]+]]
+; CHECK-NEXT: store i32 0, ptr [[J]], align 4, !tbaa [[TBAA2]]
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[J]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[J]], align 4, !tbaa [[TBAA2]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 3
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[J]] to i8*
-; CHECK-NEXT: call addrspace(1) void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR2]]
+; CHECK-NEXT: call addrspace(1) void @llvm.lifetime.end.p0(i64 4, ptr [[J]]) #[[ATTR2]]
; CHECK-NEXT: br label [[DO_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
; CHECK: for.body:
-; CHECK-NEXT: store i32 undef, i32* [[I]], align 4
-; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*
-; CHECK-NEXT: call addrspace(1) void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR2]]
-; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: store i32 undef, ptr [[I]], align 4
+; CHECK-NEXT: call addrspace(1) void @llvm.lifetime.start.p0(i64 4, ptr [[I]]) #[[ATTR2]]
+; CHECK-NEXT: store i32 0, ptr [[I]], align 4, !tbaa [[TBAA2]]
; CHECK-NEXT: br label [[FOR_COND1:%.*]]
; CHECK: for.cond1:
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !tbaa [[TBAA2]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* @n, align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr @n, align 4, !tbaa [[TBAA2]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]]
; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY4:%.*]], label [[FOR_COND_CLEANUP3:%.*]]
; CHECK: for.cond.cleanup3:
-; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[I]] to i8*
-; CHECK-NEXT: call addrspace(1) void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR2]]
-; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[J]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: call addrspace(1) void @llvm.lifetime.end.p0(i64 4, ptr [[I]]) #[[ATTR2]]
+; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[J]], align 4, !tbaa [[TBAA2]]
; CHECK-NEXT: [[INC7:%.*]] = add nsw i32 [[TMP8]], 1
-; CHECK-NEXT: store i32 [[INC7]], i32* [[J]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: store i32 [[INC7]], ptr [[J]], align 4, !tbaa [[TBAA2]]
; CHECK-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
; CHECK: for.body4:
-; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !tbaa [[TBAA2]]
-; CHECK-NEXT: store volatile i32 [[TMP9]], i32* @C, align 4, !tbaa [[TBAA2]]
-; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: store volatile i32 [[TMP9]], ptr @C, align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !tbaa [[TBAA2]]
; CHECK-NEXT: [[INC5:%.*]] = add nsw i32 [[TMP10]], 1
-; CHECK-NEXT: store i32 [[INC5]], i32* [[I]], align 4, !tbaa [[TBAA2]]
+; CHECK-NEXT: store i32 [[INC5]], ptr [[I]], align 4, !tbaa [[TBAA2]]
; CHECK-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP11:![0-9]+]]
;
entry:
br label %do.body
do.body: ; preds = %do.cond, %entry
- %0 = load i32, i32* @C, align 4, !tbaa !2
+ %0 = load i32, ptr @C, align 4, !tbaa !2
%inc = add nsw i32 %0, 1
- %1 = bitcast i32* %j to i8*
- call addrspace(1) void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #2
- store i32 0, i32* %j, align 4, !tbaa !2
+ call addrspace(1) void @llvm.lifetime.start.p0(i64 4, ptr %j) #2
+ store i32 0, ptr %j, align 4, !tbaa !2
br label %for.cond
for.cond: ; preds = %for.inc6, %do.body
- %2 = load i32, i32* %j, align 4, !tbaa !2
- %cmp = icmp slt i32 %2, 3
+ %1 = load i32, ptr %j, align 4, !tbaa !2
+ %cmp = icmp slt i32 %1, 3
br i1 %cmp, label %for.body, label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.cond
- %3 = bitcast i32* %j to i8*
- call addrspace(1) void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #2
+ call addrspace(1) void @llvm.lifetime.end.p0(i64 4, ptr %j) #2
br label %for.end8
for.body: ; preds = %for.cond
- store i32 undef, i32* %i, align 4
- %4 = bitcast i32* %i to i8*
- call addrspace(1) void @llvm.lifetime.start.p0i8(i64 4, i8* %4) #2
- store i32 0, i32* %i, align 4, !tbaa !2
+ store i32 undef, ptr %i, align 4
+ call addrspace(1) void @llvm.lifetime.start.p0(i64 4, ptr %i) #2
+ store i32 0, ptr %i, align 4, !tbaa !2
br label %for.cond1
for.cond1: ; preds = %for.inc, %for.body
- %5 = load i32, i32* %i, align 4, !tbaa !2
- %6 = load i32, i32* @n, align 4, !tbaa !2
- %cmp2 = icmp slt i32 %5, %6
+ %2 = load i32, ptr %i, align 4, !tbaa !2
+ %3 = load i32, ptr @n, align 4, !tbaa !2
+ %cmp2 = icmp slt i32 %2, %3
br i1 %cmp2, label %for.body4, label %for.cond.cleanup3
for.cond.cleanup3: ; preds = %for.cond1
- %7 = bitcast i32* %i to i8*
- call addrspace(1) void @llvm.lifetime.end.p0i8(i64 4, i8* %7) #2
+ call addrspace(1) void @llvm.lifetime.end.p0(i64 4, ptr %i) #2
br label %for.end
for.body4: ; preds = %for.cond1
- %8 = load i32, i32* %i, align 4, !tbaa !2
- store volatile i32 %8, i32* @C, align 4, !tbaa !2
+ %4 = load i32, ptr %i, align 4, !tbaa !2
+ store volatile i32 %4, ptr @C, align 4, !tbaa !2
br label %for.inc
for.inc: ; preds = %for.body4
- %9 = load i32, i32* %i, align 4, !tbaa !2
- %inc5 = add nsw i32 %9, 1
- store i32 %inc5, i32* %i, align 4, !tbaa !2
+ %5 = load i32, ptr %i, align 4, !tbaa !2
+ %inc5 = add nsw i32 %5, 1
+ store i32 %inc5, ptr %i, align 4, !tbaa !2
br label %for.cond1, !llvm.loop !6
for.end: ; preds = %for.cond.cleanup3
br label %for.inc6
for.inc6: ; preds = %for.end
- %10 = load i32, i32* %j, align 4, !tbaa !2
- %inc7 = add nsw i32 %10, 1
- store i32 %inc7, i32* %j, align 4, !tbaa !2
+ %6 = load i32, ptr %j, align 4, !tbaa !2
+ %inc7 = add nsw i32 %6, 1
+ store i32 %inc7, ptr %j, align 4, !tbaa !2
br label %for.cond, !llvm.loop !8
for.end8: ; preds = %for.cond.cleanup
}
; Function Attrs: argmemonly nofree nosync nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) addrspace(1) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) addrspace(1) #1
; Function Attrs: argmemonly nofree nosync nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) addrspace(1) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) addrspace(1) #1
attributes #0 = { nounwind "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { argmemonly nofree nosync nounwind willreturn }
; ModuleID = 'test/Transforms/SimplifyCFG/pr-new.ll'
source_filename = "test/Transforms/SimplifyCFG/pr-new.ll"
-define i32 @test(float %arg, i1 %c) gc "statepoint-example" personality i32* ()* @blam {
+define i32 @test(float %arg, i1 %c) gc "statepoint-example" personality ptr @blam {
; CHECK-LABEL: @test(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK: bb1:
; CHECK-NEXT: br i1 [[C:%.*]], label [[BB7:%.*]], label [[BB5:%.*]]
; CHECK: bb2:
-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8 addrspace(1)* undef, i64 16
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr addrspace(1) undef, i64 16
; CHECK-NEXT: br i1 [[C]], label [[BB7]], label [[BB4:%.*]]
; CHECK: bb4:
; CHECK-NEXT: call void @snork() [ "deopt"() ]
br i1 %c, label %bb7, label %bb5
bb2: ; preds = %bb
- %tmp3 = getelementptr inbounds i8, i8 addrspace(1)* undef, i64 16
+ %tmp3 = getelementptr inbounds i8, ptr addrspace(1) undef, i64 16
br i1 %c, label %bb6, label %bb4
bb4: ; preds = %bb2
ret i32 %tmp8
}
-declare i32* @blam()
+declare ptr @blam()
declare void @snork()
;; can exceed uint32 by more than factor of 2. We should keep halving the
;; weights until they can fit into uint32.
@max_regno = common global i32 0, align 4
-define void @test14(i32* %old, i32 %final) {
+define void @test14(ptr %old, i32 %final) {
; CHECK-LABEL: @test14(
; CHECK-NEXT: for.cond:
; CHECK-NEXT: br label [[FOR_COND2:%.*]]
; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[INC19:%.*]], [[FOR_INC:%.*]] ], [ 0, [[FOR_COND:%.*]] ]
; CHECK-NEXT: [[BIT_0:%.*]] = phi i32 [ [[SHL:%.*]], [[FOR_INC]] ], [ 1, [[FOR_COND]] ]
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[BIT_0]], 0
-; CHECK-NEXT: [[V3:%.*]] = load i32, i32* @max_regno, align 4
+; CHECK-NEXT: [[V3:%.*]] = load i32, ptr @max_regno, align 4
; CHECK-NEXT: [[CMP4:%.*]] = icmp eq i32 [[I_1]], [[V3]]
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[CMP4]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[FOR_EXIT:%.*]], label [[FOR_INC]], !prof [[PROF11:![0-9]+]]
%tobool = icmp eq i32 %bit.0, 0
br i1 %tobool, label %for.exit, label %for.body3, !prof !10
for.body3:
- %v3 = load i32, i32* @max_regno, align 4
+ %v3 = load i32, ptr @max_regno, align 4
%cmp4 = icmp eq i32 %i.1, %v3
br i1 %cmp4, label %for.exit, label %for.inc, !prof !11
for.inc:
; Merging the icmps with logic-op defeats the purpose of the metadata.
; We can't tell which condition is expensive if they are combined.
-define void @or_icmps_harmful(i32 %x, i32 %y, i8* %p) {
+define void @or_icmps_harmful(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @or_icmps_harmful(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[EXPENSIVE:%.*]] = icmp eq i32 [[Y:%.*]], 0
; CHECK-NEXT: br i1 [[EXPENSIVE]], label [[EXIT]], label [[FALSE:%.*]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %exit, label %false
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; Merging the icmps with logic-op defeats the purpose of the metadata.
; We can't tell which condition is expensive if they are combined.
-define void @or_icmps_harmful_inverted(i32 %x, i32 %y, i8* %p) {
+define void @or_icmps_harmful_inverted(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @or_icmps_harmful_inverted(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_FALSE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[EXPENSIVE:%.*]] = icmp eq i32 [[Y:%.*]], 0
; CHECK-NEXT: br i1 [[EXPENSIVE]], label [[EXIT]], label [[FALSE:%.*]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %exit, label %false
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
}
-define void @or_icmps_probably_not_harmful(i32 %x, i32 %y, i8* %p) {
+define void @or_icmps_probably_not_harmful(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @or_icmps_probably_not_harmful(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_TRUE]], i1 true, i1 [[EXPENSIVE]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[EXIT:%.*]], label [[FALSE:%.*]], !prof [[PROF21:![0-9]+]], !unpredictable !22
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %exit, label %false
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; The probability threshold is determined by a TTI setting.
; In this example, we are just short of strongly expected, so speculate.
-define void @or_icmps_not_that_harmful(i32 %x, i32 %y, i8* %p) {
+define void @or_icmps_not_that_harmful(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @or_icmps_not_that_harmful(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_TRUE]], i1 true, i1 [[EXPENSIVE]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[EXIT:%.*]], label [[FALSE:%.*]], !prof [[PROF23:![0-9]+]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %exit, label %false
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; The probability threshold is determined by a TTI setting.
; In this example, we are just short of strongly expected, so speculate.
-define void @or_icmps_not_that_harmful_inverted(i32 %x, i32 %y, i8* %p) {
+define void @or_icmps_not_that_harmful_inverted(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @or_icmps_not_that_harmful_inverted(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_TRUE]], i1 true, i1 [[EXPENSIVE]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[EXIT:%.*]], label [[FALSE:%.*]], !prof [[PROF24:![0-9]+]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %exit, label %false
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; The 1st cmp is probably true, so speculating the 2nd is probably a win.
-define void @or_icmps_useful(i32 %x, i32 %y, i8* %p) {
+define void @or_icmps_useful(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @or_icmps_useful(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sle i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_TRUE]], i1 true, i1 [[EXPENSIVE]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[EXIT:%.*]], label [[FALSE:%.*]], !prof [[PROF25:![0-9]+]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %exit, label %false
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; The 1st cmp is probably false, so speculating the 2nd is probably a win.
-define void @or_icmps_useful_inverted(i32 %x, i32 %y, i8* %p) {
+define void @or_icmps_useful_inverted(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @or_icmps_useful_inverted(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_FALSE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_FALSE]], i1 true, i1 [[EXPENSIVE]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[EXIT:%.*]], label [[FALSE:%.*]], !prof [[PROF25]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %exit, label %false
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; Don't crash processing degenerate metadata.
-define void @or_icmps_empty_metadata(i32 %x, i32 %y, i8* %p) {
+define void @or_icmps_empty_metadata(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @or_icmps_empty_metadata(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_TRUE]], i1 true, i1 [[EXPENSIVE]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[EXIT:%.*]], label [[MORE_RARE:%.*]]
; CHECK: more_rare:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %exit, label %more_rare
more_rare:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; Merging the icmps with logic-op defeats the purpose of the metadata.
; We can't tell which condition is expensive if they are combined.
-define void @and_icmps_harmful(i32 %x, i32 %y, i8* %p) {
+define void @and_icmps_harmful(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @and_icmps_harmful(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_FALSE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[EXPENSIVE:%.*]] = icmp eq i32 [[Y:%.*]], 0
; CHECK-NEXT: br i1 [[EXPENSIVE]], label [[FALSE:%.*]], label [[EXIT]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %false, label %exit
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; Merging the icmps with logic-op defeats the purpose of the metadata.
; We can't tell which condition is expensive if they are combined.
-define void @and_icmps_harmful_inverted(i32 %x, i32 %y, i8* %p) {
+define void @and_icmps_harmful_inverted(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @and_icmps_harmful_inverted(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[EXPENSIVE:%.*]] = icmp eq i32 [[Y:%.*]], 0
; CHECK-NEXT: br i1 [[EXPENSIVE]], label [[FALSE:%.*]], label [[EXIT]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %false, label %exit
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; The probability threshold is determined by a TTI setting.
; In this example, we are just short of strongly expected, so speculate.
-define void @and_icmps_not_that_harmful(i32 %x, i32 %y, i8* %p) {
+define void @and_icmps_not_that_harmful(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @and_icmps_not_that_harmful(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_FALSE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_FALSE]], i1 [[EXPENSIVE]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[FALSE:%.*]], label [[EXIT:%.*]], !prof [[PROF26:![0-9]+]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %false, label %exit
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; The probability threshold is determined by a TTI setting.
; In this example, we are just short of strongly expected, so speculate.
-define void @and_icmps_not_that_harmful_inverted(i32 %x, i32 %y, i8* %p) {
+define void @and_icmps_not_that_harmful_inverted(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @and_icmps_not_that_harmful_inverted(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sle i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_TRUE]], i1 [[EXPENSIVE]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[FALSE:%.*]], label [[EXIT:%.*]], !prof [[PROF26]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %false, label %exit
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; The 1st cmp is probably true, so speculating the 2nd is probably a win.
-define void @and_icmps_useful(i32 %x, i32 %y, i8* %p) {
+define void @and_icmps_useful(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @and_icmps_useful(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_TRUE:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_TRUE]], i1 [[EXPENSIVE]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[FALSE:%.*]], label [[EXIT:%.*]], !prof [[PROF27:![0-9]+]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %false, label %exit
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; The 1st cmp is probably false, so speculating the 2nd is probably a win.
-define void @and_icmps_useful_inverted(i32 %x, i32 %y, i8* %p) {
+define void @and_icmps_useful_inverted(i32 %x, i32 %y, ptr %p) {
; CHECK-LABEL: @and_icmps_useful_inverted(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[EXPECTED_FALSE:%.*]] = icmp sle i32 [[X:%.*]], -1
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[EXPECTED_FALSE]], i1 [[EXPENSIVE]], i1 false
; CHECK-NEXT: br i1 [[OR_COND]], label [[FALSE:%.*]], label [[EXIT:%.*]], !prof [[PROF27]]
; CHECK: false:
-; CHECK-NEXT: store i8 42, i8* [[P:%.*]], align 1
+; CHECK-NEXT: store i8 42, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
br i1 %expensive, label %false, label %exit
false:
- store i8 42, i8* %p, align 1
+ store i8 42, ptr %p, align 1
br label %exit
exit:
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true -S | FileCheck %s
-declare void @bar(i32*)
-declare void @baz(i32*)
+declare void @bar(ptr)
+declare void @baz(ptr)
; CHECK-LABEL: @test_load_combine_metadata(
; Check that dereferenceable metadata is combined
-; CHECK: load i32*, i32** %p
+; CHECK: load ptr, ptr %p
; CHECK-SAME: !dereferenceable ![[DEREF:[0-9]+]]
; CHECK: t:
; CHECK: f:
-define void @test_load_combine_metadata(i1 %c, i32** %p) {
+define void @test_load_combine_metadata(i1 %c, ptr %p) {
br i1 %c, label %t, label %f
t:
- %v1 = load i32*, i32** %p, !dereferenceable !0
- call void @bar(i32* %v1)
+ %v1 = load ptr, ptr %p, !dereferenceable !0
+ call void @bar(ptr %v1)
br label %cont
f:
- %v2 = load i32*, i32** %p, !dereferenceable !1
- call void @baz(i32* %v2)
+ %v2 = load ptr, ptr %p, !dereferenceable !1
+ call void @baz(ptr %v2)
br label %cont
cont:
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true -S | FileCheck %s
-declare void @bar(i32*)
-declare void @baz(i32*)
+declare void @bar(ptr)
+declare void @baz(ptr)
; CHECK-LABEL: @test_load_combine_metadata(
; Check that dereferenceable_or_null metadata is combined
-; CHECK: load i32*, i32** %p
+; CHECK: load ptr, ptr %p
; CHECK-SAME: !dereferenceable_or_null ![[DEREF:[0-9]+]]
; CHECK: t:
; CHECK: f:
-define void @test_load_combine_metadata(i1 %c, i32** %p) {
+define void @test_load_combine_metadata(i1 %c, ptr %p) {
br i1 %c, label %t, label %f
t:
- %v1 = load i32*, i32** %p, !dereferenceable_or_null !0
- call void @bar(i32* %v1)
+ %v1 = load ptr, ptr %p, !dereferenceable_or_null !0
+ call void @bar(ptr %v1)
br label %cont
f:
- %v2 = load i32*, i32** %p, !dereferenceable_or_null !1
- call void @baz(i32* %v2)
+ %v2 = load ptr, ptr %p, !dereferenceable_or_null !1
+ call void @baz(ptr %v2)
br label %cont
cont:
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true -S | FileCheck %s
-declare void @bar(i32*)
-declare void @baz(i32*)
+declare void @bar(ptr)
+declare void @baz(ptr)
; CHECK-LABEL: @test_load_combine_metadata(
; Check that align metadata is combined
-; CHECK: load i32*, i32** %p
+; CHECK: load ptr, ptr %p
; CHECK-SAME: !align ![[ALIGN:[0-9]+]]
; CHECK: t:
; CHECK: f:
-define void @test_load_combine_metadata(i1 %c, i32** %p) {
+define void @test_load_combine_metadata(i1 %c, ptr %p) {
br i1 %c, label %t, label %f
t:
- %v1 = load i32*, i32** %p, !align !0
- call void @bar(i32* %v1)
+ %v1 = load ptr, ptr %p, !align !0
+ call void @bar(ptr %v1)
br label %cont
f:
- %v2 = load i32*, i32** %p, !align !1
- call void @baz(i32* %v2)
+ %v2 = load ptr, ptr %p, !align !1
+ call void @baz(ptr %v2)
br label %cont
cont:
; a conditional BranchInst. This test checks the converted BranchInst preserve the
; make.implicit metadata.
-declare i32 @consume(i32*)
+declare i32 @consume(ptr)
declare void @trap()
-define i32 @copy-metadata(i32* %x) {
+define i32 @copy-metadata(ptr %x) {
entry:
- %x.int = ptrtoint i32* %x to i64
+ %x.int = ptrtoint ptr %x to i64
; CHECK: br i1 %cond, label %is_null, label %default, !make.implicit !0
switch i64 %x.int, label %default [
], !make.implicit !0
default:
- %0 = call i32 @consume(i32* %x)
+ %0 = call i32 @consume(ptr %x)
ret i32 %0
is_null:
define i32 @align_both_equal() local_unnamed_addr {
; CHECK-LABEL: @align_both_equal(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], ptr @counters, i64 0, i32 1), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 2, i64 2>
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
; CHECK: 9:
-; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 8
; CHECK-NEXT: br label [[TMP10]]
; CHECK: 10:
; CHECK-NEXT: ret i32 0
;
entry:
- %0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ %0 = load <2 x i64>, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
%1 = add nsw <2 x i64> %0, <i64 1, i64 1>
- store <2 x i64> %1, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
- %2 = load i64, i64* @m, align 8
+ store <2 x i64> %1, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
+ %2 = load i64, ptr @m, align 8
%and = and i64 %2, 1
%tobool = icmp eq i64 %and, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
%3 = add nsw <2 x i64> %0, <i64 2, i64 2>
- store <2 x i64> %3, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ store <2 x i64> %3, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
br label %if.end
if.end: ; preds = %entry, %if.then
if.then6: ; preds = %if.end
%5 = add nsw <2 x i64> %4, <i64 1, i64 1>
- store <2 x i64> %5, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ store <2 x i64> %5, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
br label %if.end9
if.end9: ; preds = %if.end, %if.then6
define i32 @align_not_equal() local_unnamed_addr {
; CHECK-LABEL: @align_not_equal(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], ptr @counters, i64 0, i32 1), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 2, i64 2>
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
; CHECK: 9:
-; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 8
; CHECK-NEXT: br label [[TMP10]]
; CHECK: 10:
; CHECK-NEXT: ret i32 0
;
entry:
- %0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ %0 = load <2 x i64>, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
%1 = add nsw <2 x i64> %0, <i64 1, i64 1>
- store <2 x i64> %1, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
- %2 = load i64, i64* @m, align 8
+ store <2 x i64> %1, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
+ %2 = load i64, ptr @m, align 8
%and = and i64 %2, 1
%tobool = icmp eq i64 %and, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
%3 = add nsw <2 x i64> %0, <i64 2, i64 2>
- store <2 x i64> %3, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 16
+ store <2 x i64> %3, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 16
br label %if.end
if.end: ; preds = %entry, %if.then
if.then6: ; preds = %if.end
%5 = add nsw <2 x i64> %4, <i64 1, i64 1>
- store <2 x i64> %5, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ store <2 x i64> %5, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
br label %if.end9
if.end9: ; preds = %if.end, %if.then6
define i32 @align_single_zero() local_unnamed_addr {
; CHECK-LABEL: @align_single_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], ptr @counters, i64 0, i32 1), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 2, i64 2>
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
; CHECK: 9:
-; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 8
; CHECK-NEXT: br label [[TMP10]]
; CHECK: 10:
; CHECK-NEXT: ret i32 0
;
entry:
- %0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ %0 = load <2 x i64>, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
%1 = add nsw <2 x i64> %0, <i64 1, i64 1>
- store <2 x i64> %1, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
- %2 = load i64, i64* @m, align 8
+ store <2 x i64> %1, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
+ %2 = load i64, ptr @m, align 8
%and = and i64 %2, 1
%tobool = icmp eq i64 %and, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
%3 = add nsw <2 x i64> %0, <i64 2, i64 2>
- store <2 x i64> %3, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*)
+ store <2 x i64> %3, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1)
br label %if.end
if.end: ; preds = %entry, %if.then
if.then6: ; preds = %if.end
%5 = add nsw <2 x i64> %4, <i64 1, i64 1>
- store <2 x i64> %5, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ store <2 x i64> %5, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
br label %if.end9
if.end9: ; preds = %if.end, %if.then6
define i32 @align_single_zero_second_greater_default() local_unnamed_addr {
; CHECK-LABEL: @align_single_zero_second_greater_default(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], ptr @counters, i64 0, i32 1), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 2, i64 2>
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
; CHECK: 9:
-; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 16
+; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 16
; CHECK-NEXT: br label [[TMP10]]
; CHECK: 10:
; CHECK-NEXT: ret i32 0
;
entry:
- %0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ %0 = load <2 x i64>, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
%1 = add nsw <2 x i64> %0, <i64 1, i64 1>
- store <2 x i64> %1, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
- %2 = load i64, i64* @m, align 8
+ store <2 x i64> %1, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
+ %2 = load i64, ptr @m, align 8
%and = and i64 %2, 1
%tobool = icmp eq i64 %and, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
%3 = add nsw <2 x i64> %0, <i64 2, i64 2>
- store <2 x i64> %3, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 32
+ store <2 x i64> %3, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 32
br label %if.end
if.end: ; preds = %entry, %if.then
if.then6: ; preds = %if.end
%5 = add nsw <2 x i64> %4, <i64 1, i64 1>
- store <2 x i64> %5, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*)
+ store <2 x i64> %5, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1)
br label %if.end9
if.end9: ; preds = %if.end, %if.then6
define i32 @align_both_zero() local_unnamed_addr {
; CHECK-LABEL: @align_both_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr getelementptr inbounds ([[STRUCT_COUNTERS:%.*]], ptr @counters, i64 0, i32 1), align 8
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 1, i64 1>
-; CHECK-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @m, align 8
+; CHECK-NEXT: store <2 x i64> [[TMP1]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr @m, align 8
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], 1
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[AND]], 0
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <2 x i64> [[TMP0]], <i64 2, i64 2>
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
; CHECK-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
; CHECK: 9:
-; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], <2 x i64>* bitcast (i64* getelementptr inbounds ([[STRUCT_COUNTERS]], %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 16
+; CHECK-NEXT: store <2 x i64> [[SIMPLIFYCFG_MERGE]], ptr getelementptr inbounds ([[STRUCT_COUNTERS]], ptr @counters, i64 0, i32 1), align 16
; CHECK-NEXT: br label [[TMP10]]
; CHECK: 10:
; CHECK-NEXT: ret i32 0
;
entry:
- %0 = load <2 x i64>, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
+ %0 = load <2 x i64>, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
%1 = add nsw <2 x i64> %0, <i64 1, i64 1>
- store <2 x i64> %1, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*), align 8
- %2 = load i64, i64* @m, align 8
+ store <2 x i64> %1, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1), align 8
+ %2 = load i64, ptr @m, align 8
%and = and i64 %2, 1
%tobool = icmp eq i64 %and, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
%3 = add nsw <2 x i64> %0, <i64 2, i64 2>
- store <2 x i64> %3, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*)
+ store <2 x i64> %3, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1)
br label %if.end
if.end: ; preds = %entry, %if.then
if.then6: ; preds = %if.end
%5 = add nsw <2 x i64> %4, <i64 1, i64 1>
- store <2 x i64> %5, <2 x i64>* bitcast (i64* getelementptr inbounds (%struct.Counters, %struct.Counters* @counters, i64 0, i32 1) to <2 x i64>*)
+ store <2 x i64> %5, ptr getelementptr inbounds (%struct.Counters, ptr @counters, i64 0, i32 1)
br label %if.end9
if.end9: ; preds = %if.end, %if.then6
ret i32 %div
}
-define i32 @main() nounwind personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) {
+define i32 @main() nounwind personality ptr @__C_specific_handler {
entry:
%call = invoke i32 @div(i32 10, i32 0)
to label %__try.cont unwind label %lpad
lpad:
- %0 = landingpad { i8*, i32 }
- catch i8* null
+ %0 = landingpad { ptr, i32 }
+ catch ptr null
br label %__try.cont
__try.cont:
; CHECK-NEXT: unreachable
;
bb:
- %i = load i16, i16* @global, align 1
+ %i = load i16, ptr @global, align 1
%i13 = icmp ne i16 %i, 0
br i1 %i13, label %bb16, label %bb14
bb14: ; preds = %bb
- %i15 = load i16, i16* @global.1, align 1
+ %i15 = load i16, ptr @global.1, align 1
br label %bb23
bb16: ; preds = %bb
- %i17 = load i16, i16* @global, align 1
+ %i17 = load i16, ptr @global, align 1
%i18 = sdiv i16 2, %i17
%i19 = icmp ne i16 %i18, 0
%i20 = zext i1 %i19 to i16
- %i21 = load i16, i16* @global.1, align 1
+ %i21 = load i16, ptr @global.1, align 1
br i1 %i19, label %bb22, label %bb23
bb22: ; preds = %bb16
bb23: ; preds = %bb22, %bb16, %bb14
%i24 = phi i16 [ %i20, %bb22 ], [ %i21, %bb16 ], [ %i15, %bb14 ]
- store i16 %i24, i16* @global.2, align 1
+ store i16 %i24, ptr @global.2, align 1
unreachable
}
; This would infinite-loop because we allowed code sinking to examine an infinite-loop block (%j).
-define void @PR49541(i32* %t1, i32 %a, i1 %bool) {
+define void @PR49541(ptr %t1, i32 %a, i1 %bool) {
; CHECK-LABEL: @PR49541(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[I:%.*]]
; CHECK: j:
; CHECK-NEXT: [[T3:%.*]] = phi i32 [ [[B:%.*]], [[J:%.*]] ], [ [[A:%.*]], [[COND_TRUE:%.*]] ], [ [[A]], [[COND_FALSE:%.*]] ]
; CHECK-NEXT: [[T2:%.*]] = phi i32 [ [[T2]], [[J]] ], [ [[PRE2:%.*]], [[COND_TRUE]] ], [ 0, [[COND_FALSE]] ]
-; CHECK-NEXT: [[B]] = load i32, i32* [[T1:%.*]], align 4
+; CHECK-NEXT: [[B]] = load i32, ptr [[T1:%.*]], align 4
; CHECK-NEXT: br label [[J]]
; CHECK: i:
; CHECK-NEXT: [[G_1:%.*]] = phi i16 [ undef, [[ENTRY:%.*]] ], [ [[G_1]], [[COND_FALSE]] ]
; CHECK-NEXT: br i1 [[BOOL:%.*]], label [[COND_FALSE]], label [[COND_TRUE]]
; CHECK: cond.true:
; CHECK-NEXT: [[TOBOOL9_NOT:%.*]] = icmp eq i16 [[G_1]], 0
-; CHECK-NEXT: [[PRE2]] = load i32, i32* [[T1]], align 4
+; CHECK-NEXT: [[PRE2]] = load i32, ptr [[T1]], align 4
; CHECK-NEXT: br label [[J]]
; CHECK: cond.false:
-; CHECK-NEXT: [[T5:%.*]] = load i32, i32* [[T1]], align 4
+; CHECK-NEXT: [[T5:%.*]] = load i32, ptr [[T1]], align 4
; CHECK-NEXT: [[B2:%.*]] = icmp eq i32 [[T5]], 0
; CHECK-NEXT: br i1 [[B2]], label [[J]], label [[I]]
;
j:
%t3 = phi i32 [ %b, %j ], [ %a, %cond.true ], [ %a, %cond.false ]
%t2 = phi i32 [ %t2, %j ], [ %pre2, %cond.true ], [ 0, %cond.false ]
- %b = load i32, i32* %t1, align 4
+ %b = load i32, ptr %t1, align 4
br label %j
i:
cond.true:
%tobool9.not = icmp eq i16 %g.1, 0
- %pre2 = load i32, i32* %t1, align 4
+ %pre2 = load i32, ptr %t1, align 4
br label %j
cond.false:
- %t5 = load i32, i32* %t1, align 4
+ %t5 = load i32, ptr %t1, align 4
%b2 = icmp eq i32 %t5, 0
br i1 %b2, label %j, label %i
}
; Since the function is speculatable, the nonnull attribute need not be dropped
; since it propagates poison (and call executes fine) if the parameter is indeed
; null.
-define i32 @strip_attr(i32 * %p) {
+define i32 @strip_attr(ptr %p) {
; CHECK-LABEL: strip_attr
; CHECK-LABEL: entry:
-; CHECK: %nullchk = icmp ne i32* %p, null
-; CHECK: %val = call i32 @func_nonnull(i32* nonnull %p)
+; CHECK: %nullchk = icmp ne ptr %p, null
+; CHECK: %val = call i32 @func_nonnull(ptr nonnull %p)
; CHECK: select
entry:
- %nullchk = icmp ne i32* %p, null
+ %nullchk = icmp ne ptr %p, null
br i1 %nullchk, label %if, label %end
if:
- %val = call i32 @func_nonnull(i32* nonnull %p) #1
+ %val = call i32 @func_nonnull(ptr nonnull %p) #1
br label %end
end:
; We should strip the deref attribute since it can cause UB when the
; speculatable call is moved.
-define i32 @strip_attr2(i32 * %p) {
+define i32 @strip_attr2(ptr %p) {
; CHECK-LABEL: strip_attr2
; CHECK-LABEL: entry:
-; CHECK: %nullchk = icmp ne i32* %p, null
-; CHECK: %val = call i32 @func_nonnull(i32* %p)
+; CHECK: %nullchk = icmp ne ptr %p, null
+; CHECK: %val = call i32 @func_nonnull(ptr %p)
; CHECK: select
entry:
- %nullchk = icmp ne i32* %p, null
+ %nullchk = icmp ne ptr %p, null
br i1 %nullchk, label %if, label %end
if:
- %val = call i32 @func_nonnull(i32* dereferenceable(12) %p) #1
+ %val = call i32 @func_nonnull(ptr dereferenceable(12) %p) #1
br label %end
end:
ret i32 %ret
}
-declare i32 @func_nonnull(i32*) #1
+declare i32 @func_nonnull(ptr) #1
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind argmemonly speculatable }
ret double %cond
}
-define void @sqrt_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
+define void @sqrt_test(ptr addrspace(1) noalias nocapture %out, float %a) nounwind {
; CHECK-LABEL: @sqrt_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
; CHECK-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
test_sqrt.exit: ; preds = %cond.else.i, %entry
%cond.i = phi afn float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @fabs_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
+define void @fabs_test(ptr addrspace(1) noalias nocapture %out, float %a) nounwind {
; CHECK-LABEL: @fabs_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
; CHECK-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
test_fabs.exit: ; preds = %cond.else.i, %entry
%cond.i = phi reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @fma_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
+define void @fma_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b, float %c) nounwind {
; CHECK-LABEL: @fma_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
; CHECK-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
test_fma.exit: ; preds = %cond.else.i, %entry
%cond.i = phi nsz reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @fmuladd_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
+define void @fmuladd_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b, float %c) nounwind {
; CHECK-LABEL: @fmuladd_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
; CHECK-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
test_fmuladd.exit: ; preds = %cond.else.i, %entry
%cond.i = phi ninf float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @minnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
+define void @minnum_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b) nounwind {
; CHECK-LABEL: @minnum_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
test_minnum.exit: ; preds = %cond.else.i, %entry
%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @maxnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
+define void @maxnum_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b) nounwind {
; CHECK-LABEL: @maxnum_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
test_maxnum.exit: ; preds = %cond.else.i, %entry
%cond.i = phi ninf nsz float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @minimum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
+define void @minimum_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b) nounwind {
; CHECK-LABEL: @minimum_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
test_minimum.exit: ; preds = %cond.else.i, %entry
%cond.i = phi reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
-define void @maximum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
+define void @maximum_test(ptr addrspace(1) noalias nocapture %out, float %a, float %b) nounwind {
; CHECK-LABEL: @maximum_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
; CHECK-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
-; CHECK-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
+; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
test_maximum.exit: ; preds = %cond.else.i, %entry
%cond.i = phi nsz float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
- store float %cond.i, float addrspace(1)* %out, align 4
+ store float %cond.i, ptr addrspace(1) %out, align 4
ret void
}
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s
-define void @ifconvertstore(i32* %A, i32 %B, i32 %C, i32 %D) {
+define void @ifconvertstore(ptr %A, i32 %B, i32 %C, i32 %D) {
; CHECK-LABEL: @ifconvertstore(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 [[B:%.*]], i32* [[A:%.*]], align 4
+; CHECK-NEXT: store i32 [[B:%.*]], ptr [[A:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 42
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[CMP]], i32 [[C:%.*]], i32 [[B]], !prof [[PROF0:![0-9]+]]
-; CHECK-NEXT: store i32 [[SPEC_STORE_SELECT]], i32* [[A]], align 4
+; CHECK-NEXT: store i32 [[SPEC_STORE_SELECT]], ptr [[A]], align 4
; CHECK-NEXT: ret void
;
entry:
; First store to the location.
- store i32 %B, i32* %A
+ store i32 %B, ptr %A
%cmp = icmp sgt i32 %D, 42
br i1 %cmp, label %if.then, label %ret.end, !prof !0
; Make sure we speculate stores like the following one. It is cheap compared to
; a mispredicated branch.
if.then:
- store i32 %C, i32* %A
+ store i32 %C, ptr %A
br label %ret.end
ret.end:
; Store to a different location.
-define void @noifconvertstore1(i32* %A1, i32* %A2, i32 %B, i32 %C, i32 %D) {
+define void @noifconvertstore1(ptr %A1, ptr %A2, i32 %B, i32 %C, i32 %D) {
; CHECK-LABEL: @noifconvertstore1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 [[B:%.*]], i32* [[A1:%.*]], align 4
+; CHECK-NEXT: store i32 [[B:%.*]], ptr [[A1:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D:%.*]], 42
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RET_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 [[C:%.*]], i32* [[A2:%.*]], align 4
+; CHECK-NEXT: store i32 [[C:%.*]], ptr [[A2:%.*]], align 4
; CHECK-NEXT: br label [[RET_END]]
; CHECK: ret.end:
; CHECK-NEXT: ret void
;
entry:
- store i32 %B, i32* %A1
+ store i32 %B, ptr %A1
%cmp = icmp sgt i32 %D, 42
br i1 %cmp, label %if.then, label %ret.end
if.then:
- store i32 %C, i32* %A2
+ store i32 %C, ptr %A2
br label %ret.end
ret.end:
; This function could store to our address, so we can't repeat the first store a second time.
declare void @unknown_fun()
-define void @noifconvertstore2(i32* %A, i32 %B, i32 %C, i32 %D) {
+define void @noifconvertstore2(ptr %A, i32 %B, i32 %C, i32 %D) {
; CHECK-LABEL: @noifconvertstore2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 [[B:%.*]], i32* [[A:%.*]], align 4
+; CHECK-NEXT: store i32 [[B:%.*]], ptr [[A:%.*]], align 4
; CHECK-NEXT: call void @unknown_fun()
; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[D:%.*]], 42
; CHECK-NEXT: br i1 [[CMP6]], label [[IF_THEN:%.*]], label [[RET_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 [[C:%.*]], i32* [[A]], align 4
+; CHECK-NEXT: store i32 [[C:%.*]], ptr [[A]], align 4
; CHECK-NEXT: br label [[RET_END]]
; CHECK: ret.end:
; CHECK-NEXT: ret void
;
entry:
; First store to the location.
- store i32 %B, i32* %A
+ store i32 %B, ptr %A
call void @unknown_fun()
%cmp6 = icmp sgt i32 %D, 42
br i1 %cmp6, label %if.then, label %ret.end
if.then:
- store i32 %C, i32* %A
+ store i32 %C, ptr %A
br label %ret.end
ret.end:
; Make sure we don't speculate volatile stores.
-define void @noifconvertstore_volatile(i32* %A, i32 %B, i32 %C, i32 %D) {
+define void @noifconvertstore_volatile(ptr %A, i32 %B, i32 %C, i32 %D) {
; CHECK-LABEL: @noifconvertstore_volatile(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 [[B:%.*]], i32* [[A:%.*]], align 4
+; CHECK-NEXT: store i32 [[B:%.*]], ptr [[A:%.*]], align 4
; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[D:%.*]], 42
; CHECK-NEXT: br i1 [[CMP6]], label [[IF_THEN:%.*]], label [[RET_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store volatile i32 [[C:%.*]], i32* [[A]], align 4
+; CHECK-NEXT: store volatile i32 [[C:%.*]], ptr [[A]], align 4
; CHECK-NEXT: br label [[RET_END]]
; CHECK: ret.end:
; CHECK-NEXT: ret void
;
entry:
; First store to the location.
- store i32 %B, i32* %A
+ store i32 %B, ptr %A
%cmp6 = icmp sgt i32 %D, 42
br i1 %cmp6, label %if.then, label %ret.end
if.then:
- store volatile i32 %C, i32* %A
+ store volatile i32 %C, ptr %A
br label %ret.end
ret.end:
; CHECK-LABEL: @load_before_store_noescape(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca [2 x i32], align 8
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[A]] to i64*
-; CHECK-NEXT: store i64 4294967296, i64* [[TMP0]], align 8
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 [[I:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: store i64 4294967296, ptr [[A]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 [[I:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[B:%.*]]
; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[CMP]], i32 [[B]], i32 [[TMP1]]
-; CHECK-NEXT: store i32 [[SPEC_STORE_SELECT]], i32* [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 0
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 1
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: store i32 [[SPEC_STORE_SELECT]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 1
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP3]]
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
%a = alloca [2 x i32], align 8
- %0 = bitcast [2 x i32]* %a to i64*
- store i64 4294967296, i64* %0, align 8
- %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 %i
- %1 = load i32, i32* %arrayidx, align 4
- %cmp = icmp slt i32 %1, %b
+ store i64 4294967296, ptr %a, align 8
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 %i
+ %0 = load i32, ptr %arrayidx, align 4
+ %cmp = icmp slt i32 %0, %b
br i1 %cmp, label %if.then, label %if.end
if.then:
- store i32 %b, i32* %arrayidx, align 4
+ store i32 %b, ptr %arrayidx, align 4
br label %if.end
if.end:
- %arrayidx1 = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 0
- %2 = load i32, i32* %arrayidx1, align 4
- %arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 1
- %3 = load i32, i32* %arrayidx2, align 4
- %add = add nsw i32 %2, %3
+ %1 = load i32, ptr %a, align 4
+ %arrayidx2 = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 1
+ %2 = load i32, ptr %arrayidx2, align 4
+ %add = add nsw i32 %1, %2
ret i32 %add
}
; CHECK-LABEL: @load_before_store_escape(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca [2 x i32], align 8
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[A]] to i64*
-; CHECK-NEXT: store i64 4294967296, i64* [[TMP0]], align 8
-; CHECK-NEXT: call void @fork_some_threads([2 x i32]* [[A]])
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 [[I:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: store i64 4294967296, ptr [[A]], align 8
+; CHECK-NEXT: call void @fork_some_threads(ptr [[A]])
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 [[I:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[B:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 [[B]], i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: store i32 [[B]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
-; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 0
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 1
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 1
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP3]]
; CHECK-NEXT: call void @join_some_threads()
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
%a = alloca [2 x i32], align 8
- %0 = bitcast [2 x i32]* %a to i64*
- store i64 4294967296, i64* %0, align 8
- call void @fork_some_threads([2 x i32]* %a)
- %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 %i
- %1 = load i32, i32* %arrayidx, align 4
- %cmp = icmp slt i32 %1, %b
+ store i64 4294967296, ptr %a, align 8
+ call void @fork_some_threads(ptr %a)
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 %i
+ %0 = load i32, ptr %arrayidx, align 4
+ %cmp = icmp slt i32 %0, %b
br i1 %cmp, label %if.then, label %if.end
if.then:
- store i32 %b, i32* %arrayidx, align 4
+ store i32 %b, ptr %arrayidx, align 4
br label %if.end
if.end:
- %arrayidx1 = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 0
- %2 = load i32, i32* %arrayidx1, align 4
- %arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 1
- %3 = load i32, i32* %arrayidx2, align 4
- %add = add nsw i32 %2, %3
+ %1 = load i32, ptr %a, align 4
+ %arrayidx2 = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 1
+ %2 = load i32, ptr %arrayidx2, align 4
+ %add = add nsw i32 %1, %2
call void @join_some_threads()
ret i32 %add
}
-declare void @fork_some_threads([2 x i32] *);
+declare void @fork_some_threads(ptr);
declare void @join_some_threads();
; Don't speculate if it's not the only instruction in the block (not counting
; CHECK-LABEL: @not_alone_in_block(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca [2 x i32], align 8
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[A]] to i64*
-; CHECK-NEXT: store i64 4294967296, i64* [[TMP0]], align 8
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 [[I:%.*]]
-; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: store i64 4294967296, ptr [[A]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 [[I:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[B:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 [[B]], i32* [[ARRAYIDX]], align 4
-; CHECK-NEXT: store i32 [[B]], i32* [[ARRAYIDX1]], align 4
+; CHECK-NEXT: store i32 [[B]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: store i32 [[B]], ptr [[A]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[A]], i64 0, i64 1
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x i32], ptr [[A]], i64 0, i64 1
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP3]]
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
%a = alloca [2 x i32], align 8
- %0 = bitcast [2 x i32]* %a to i64*
- store i64 4294967296, i64* %0, align 8
- %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 %i
- %arrayidx1 = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 0
- %1 = load i32, i32* %arrayidx, align 4
- %cmp = icmp slt i32 %1, %b
+ store i64 4294967296, ptr %a, align 8
+ %arrayidx = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 %i
+ %0 = load i32, ptr %arrayidx, align 4
+ %cmp = icmp slt i32 %0, %b
br i1 %cmp, label %if.then, label %if.end
if.then:
- store i32 %b, i32* %arrayidx, align 4
- store i32 %b, i32* %arrayidx1, align 4
+ store i32 %b, ptr %arrayidx, align 4
+ store i32 %b, ptr %a, align 4
br label %if.end
if.end:
- %2 = load i32, i32* %arrayidx1, align 4
- %arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %a, i64 0, i64 1
- %3 = load i32, i32* %arrayidx2, align 4
- %add = add nsw i32 %2, %3
+ %1 = load i32, ptr %a, align 4
+ %arrayidx2 = getelementptr inbounds [2 x i32], ptr %a, i64 0, i64 1
+ %2 = load i32, ptr %arrayidx2, align 4
+ %add = add nsw i32 %1, %2
ret i32 %add
}
define void @yes(i1 %c) nounwind {
entry:
- %a = alloca [4 x i64*], align 8
- %__a.addr = getelementptr [4 x i64*], [4 x i64*]* %a, i64 0, i64 3
- call void @frob(i64** %__a.addr)
+ %a = alloca [4 x ptr], align 8
+ %__a.addr = getelementptr [4 x ptr], ptr %a, i64 0, i64 3
+ call void @frob(ptr %__a.addr)
br i1 %c, label %if.then, label %if.end
if.then: ; preds = %entry
br label %return
if.end: ; preds = %entry
- %tmp5 = load i64*, i64** %__a.addr, align 8
+ %tmp5 = load ptr, ptr %__a.addr, align 8
br label %return
return: ; preds = %if.end, %if.then
- %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ]
+ %storemerge = phi ptr [ undef, %if.then ], [ %tmp5, %if.end ]
ret void
}
define void @no0(i1 %c) nounwind {
entry:
- %a = alloca [4 x i64*], align 8
- %__a.addr = getelementptr [4 x i64*], [4 x i64*]* %a, i64 0, i64 4
- call void @frob(i64** %__a.addr)
+ %a = alloca [4 x ptr], align 8
+ %__a.addr = getelementptr [4 x ptr], ptr %a, i64 0, i64 4
+ call void @frob(ptr %__a.addr)
br i1 %c, label %if.then, label %if.end
if.then: ; preds = %entry
br label %return
if.end: ; preds = %entry
- %tmp5 = load i64*, i64** %__a.addr, align 8
+ %tmp5 = load ptr, ptr %__a.addr, align 8
br label %return
return: ; preds = %if.end, %if.then
- %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ]
+ %storemerge = phi ptr [ undef, %if.then ], [ %tmp5, %if.end ]
ret void
}
define void @no1(i1 %c, i64 %n) nounwind {
entry:
- %a = alloca [4 x i64*], align 8
- %__a.addr = getelementptr [4 x i64*], [4 x i64*]* %a, i64 0, i64 %n
- call void @frob(i64** %__a.addr)
+ %a = alloca [4 x ptr], align 8
+ %__a.addr = getelementptr [4 x ptr], ptr %a, i64 0, i64 %n
+ call void @frob(ptr %__a.addr)
br i1 %c, label %if.then, label %if.end
if.then: ; preds = %entry
br label %return
if.end: ; preds = %entry
- %tmp5 = load i64*, i64** %__a.addr, align 8
+ %tmp5 = load ptr, ptr %__a.addr, align 8
br label %return
return: ; preds = %if.end, %if.then
- %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ]
+ %storemerge = phi ptr [ undef, %if.then ], [ %tmp5, %if.end ]
ret void
}
define void @no2(i1 %c, i64 %n) nounwind {
entry:
- %a = alloca [4 x i64*], align 8
- %__a.addr = getelementptr [4 x i64*], [4 x i64*]* %a, i64 1, i64 0
- call void @frob(i64** %__a.addr)
+ %a = alloca [4 x ptr], align 8
+ %__a.addr = getelementptr [4 x ptr], ptr %a, i64 1, i64 0
+ call void @frob(ptr %__a.addr)
br i1 %c, label %if.then, label %if.end
if.then: ; preds = %entry
br label %return
if.end: ; preds = %entry
- %tmp5 = load i64*, i64** %__a.addr, align 8
+ %tmp5 = load ptr, ptr %__a.addr, align 8
br label %return
return: ; preds = %if.end, %if.then
- %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ]
+ %storemerge = phi ptr [ undef, %if.then ], [ %tmp5, %if.end ]
ret void
}
-declare void @frob(i64** nocapture %p)
+declare void @frob(ptr nocapture %p)
; Test that statepoint intrinsic is marked with Throwable attribute and it is
; not optimized into call
-declare i64 addrspace(1)* @gc_call()
-declare token @llvm.experimental.gc.statepoint.p0f_p1i64f(i64, i32, i64 addrspace(1)* ()*, i32, i32, ...)
-declare i32* @fake_personality_function()
+declare ptr addrspace(1) @gc_call()
+declare token @llvm.experimental.gc.statepoint.p0(i64, i32, ptr addrspace(1) ()*, i32, i32, ...)
+declare ptr @fake_personality_function()
-define i32 @test() gc "statepoint-example" personality i32* ()* @fake_personality_function {
+define i32 @test() gc "statepoint-example" personality ptr @fake_personality_function {
; CHECK-LABEL: test
entry:
; CHECK-LABEL: entry:
- ; CHECK-NEXT: %sp = invoke token (i64, i32, i64 addrspace(1)* ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_p1i64f
- %sp = invoke token (i64, i32, i64 addrspace(1)* ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_p1i64f(i64 0, i32 0, i64 addrspace(1)* ()* elementtype(i64 addrspace(1)* ()) @gc_call, i32 0, i32 0, i32 0, i32 0)
+ ; CHECK-NEXT: %sp = invoke token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0
+ %sp = invoke token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(ptr addrspace(1) ()) @gc_call, i32 0, i32 0, i32 0, i32 0)
to label %normal unwind label %exception
exception:
- %lpad = landingpad { i8*, i32 }
+ %lpad = landingpad { ptr, i32 }
cleanup
ret i32 0
; This would crash because we did not clean up the
; default block of the switch before removing the switch.
-define void @PR42737(i32* %a, i1 %c) {
+define void @PR42737(ptr %a, i1 %c) {
; CHECK-LABEL: @PR42737(
; CHECK-NEXT: entry:
; CHECK-NEXT: unreachable
br i1 %c, label %switch, label %else
else:
- store i32 2, i32* %a
+ store i32 2, ptr %a
br label %switch
switch:
}
-define void @pr53208_single_reachable_dest(i8 %sw, i32* %p0) {
+define void @pr53208_single_reachable_dest(i8 %sw, ptr %p0) {
; CHECK-LABEL: @pr53208_single_reachable_dest(
; CHECK-NEXT: group2:
-; CHECK-NEXT: call void @bar(i32* [[P0:%.*]])
+; CHECK-NEXT: call void @bar(ptr [[P0:%.*]])
; CHECK-NEXT: ret void
;
switch i8 %sw, label %group3 [
br label %exit
exit:
- %phi = phi i32* [ null, %group3 ], [ %p0, %group2 ], [ null, %group1 ]
- call void @bar(i32* %phi)
+ %phi = phi ptr [ null, %group3 ], [ %p0, %group2 ], [ null, %group1 ]
+ call void @bar(ptr %phi)
ret void
}
-declare void @bar(i32* nonnull dereferenceable(4))
+declare void @bar(ptr nonnull dereferenceable(4))
then.6: ; preds = %label.9
br label %endif.6
endif.6: ; preds = %then.6, %label.9
- store i32 0, i32* null
+ store i32 0, ptr null
br label %switchexit
switchexit: ; preds = %endif.6, %loopentry.2, %loopentry.1, %loopentry.0, %endif.0
br i1 false, label %endif.7, label %then.7
define i32 @fn1() {
; CHECK-LABEL: @fn1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @b, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @b, align 4
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4
; CHECK-NEXT: [[SWITCH_SELECTCMP:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: [[SWITCH_SELECT:%.*]] = select i1 [[SWITCH_SELECTCMP]], i32 0, i32 0
; CHECK-NEXT: [[SWITCH_SELECTCMP1:%.*]] = icmp eq i32 [[TMP1]], 5
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
entry:
- %0 = load i32, i32* @b, align 4
+ %0 = load i32, ptr @b, align 4
%tobool = icmp eq i32 %0, 0
br i1 %tobool, label %if.end3, label %if.then
if.then:
- %1 = load i32, i32* @a, align 4
+ %1 = load i32, ptr @a, align 4
switch i32 %1, label %if.end3 [
i32 5, label %return
i32 0, label %return
ret void
}
-define void @test1_ptr(i32* %V) {
+define void @test1_ptr(ptr %V) {
; CHECK-LABEL: @test1_ptr(
-; CHECK-NEXT: [[MAGICPTR:%.*]] = ptrtoint i32* [[V:%.*]] to i40
+; CHECK-NEXT: [[MAGICPTR:%.*]] = ptrtoint ptr [[V:%.*]] to i40
; CHECK-NEXT: switch i40 [[MAGICPTR]], label [[F:%.*]] [
; CHECK-NEXT: i40 17, label [[T:%.*]]
; CHECK-NEXT: i40 4, label [[T]]
; CHECK-NEXT: call void @foo2()
; CHECK-NEXT: br label [[COMMON_RET]]
;
- %C1 = icmp eq i32* %V, inttoptr (i32 4 to i32*)
- %C2 = icmp eq i32* %V, inttoptr (i32 17 to i32*)
+ %C1 = icmp eq ptr %V, inttoptr (i32 4 to ptr)
+ %C2 = icmp eq ptr %V, inttoptr (i32 17 to ptr)
%CN = or i1 %C1, %C2 ; <i1> [#uses=1]
br i1 %CN, label %T, label %F
T: ; preds = %0
ret void
}
-define void @test1_ptr_as1(i32 addrspace(1)* %V) {
+define void @test1_ptr_as1(ptr addrspace(1) %V) {
; CHECK-LABEL: @test1_ptr_as1(
-; CHECK-NEXT: [[MAGICPTR:%.*]] = ptrtoint i32 addrspace(1)* [[V:%.*]] to i40
+; CHECK-NEXT: [[MAGICPTR:%.*]] = ptrtoint ptr addrspace(1) [[V:%.*]] to i40
; CHECK-NEXT: switch i40 [[MAGICPTR]], label [[F:%.*]] [
; CHECK-NEXT: i40 17, label [[T:%.*]]
; CHECK-NEXT: i40 4, label [[T]]
; CHECK-NEXT: call void @foo2()
; CHECK-NEXT: br label [[COMMON_RET]]
;
- %C1 = icmp eq i32 addrspace(1)* %V, inttoptr (i32 4 to i32 addrspace(1)*)
- %C2 = icmp eq i32 addrspace(1)* %V, inttoptr (i32 17 to i32 addrspace(1)*)
+ %C1 = icmp eq ptr addrspace(1) %V, inttoptr (i32 4 to ptr addrspace(1))
+ %C2 = icmp eq ptr addrspace(1) %V, inttoptr (i32 17 to ptr addrspace(1))
%CN = or i1 %C1, %C2 ; <i1> [#uses=1]
br i1 %CN, label %T, label %F
T: ; preds = %0
}
-define i1 @test6({ i32, i32 }* %I) {
+define i1 @test6(ptr %I) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP_1_I:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[I:%.*]], i64 0, i32 1
-; CHECK-NEXT: [[TMP_2_I:%.*]] = load i32, i32* [[TMP_1_I]], align 4
+; CHECK-NEXT: [[TMP_1_I:%.*]] = getelementptr { i32, i32 }, ptr [[I:%.*]], i64 0, i32 1
+; CHECK-NEXT: [[TMP_2_I:%.*]] = load i32, ptr [[TMP_1_I]], align 4
; CHECK-NEXT: [[TMP_2_I_OFF:%.*]] = add i32 [[TMP_2_I]], -14
; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[TMP_2_I_OFF]], 6
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 true, i1 false
; CHECK-NEXT: ret i1 [[SPEC_SELECT]]
;
entry:
- %tmp.1.i = getelementptr { i32, i32 }, { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
- %tmp.2.i = load i32, i32* %tmp.1.i ; <i32> [#uses=6]
+ %tmp.1.i = getelementptr { i32, i32 }, ptr %I, i64 0, i32 1 ; <ptr> [#uses=1]
+ %tmp.2.i = load i32, ptr %tmp.1.i ; <i32> [#uses=6]
%tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1]
br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0
shortcirc_next.0: ; preds = %entry
ret void
}
-define void @test1_ptr(i32* %V) {
+define void @test1_ptr(ptr %V) {
; DL-LABEL: @test1_ptr(
-; DL-NEXT: [[MAGICPTR:%.*]] = ptrtoint i32* [[V:%.*]] to i32
+; DL-NEXT: [[MAGICPTR:%.*]] = ptrtoint ptr [[V:%.*]] to i32
; DL-NEXT: switch i32 [[MAGICPTR]], label [[F:%.*]] [
; DL-NEXT: i32 17, label [[T:%.*]]
; DL-NEXT: i32 4, label [[T]]
; DL-NEXT: call void @foo2()
; DL-NEXT: br label [[COMMON_RET]]
;
- %C1 = icmp eq i32* %V, inttoptr (i32 4 to i32*)
- %C2 = icmp eq i32* %V, inttoptr (i32 17 to i32*)
+ %C1 = icmp eq ptr %V, inttoptr (i32 4 to ptr)
+ %C2 = icmp eq ptr %V, inttoptr (i32 17 to ptr)
%CN = or i1 %C1, %C2 ; <i1> [#uses=1]
br i1 %CN, label %T, label %F
T: ; preds = %0
ret void
}
-define void @test1_ptr_as1(i32 addrspace(1)* %V) {
+define void @test1_ptr_as1(ptr addrspace(1) %V) {
; DL-LABEL: @test1_ptr_as1(
-; DL-NEXT: [[MAGICPTR:%.*]] = ptrtoint i32 addrspace(1)* [[V:%.*]] to i16
+; DL-NEXT: [[MAGICPTR:%.*]] = ptrtoint ptr addrspace(1) [[V:%.*]] to i16
; DL-NEXT: switch i16 [[MAGICPTR]], label [[F:%.*]] [
; DL-NEXT: i16 17, label [[T:%.*]]
; DL-NEXT: i16 4, label [[T]]
; DL-NEXT: call void @foo2()
; DL-NEXT: br label [[COMMON_RET]]
;
- %C1 = icmp eq i32 addrspace(1)* %V, inttoptr (i32 4 to i32 addrspace(1)*)
- %C2 = icmp eq i32 addrspace(1)* %V, inttoptr (i32 17 to i32 addrspace(1)*)
+ %C1 = icmp eq ptr addrspace(1) %V, inttoptr (i32 4 to ptr addrspace(1))
+ %C2 = icmp eq ptr addrspace(1) %V, inttoptr (i32 17 to ptr addrspace(1))
%CN = or i1 %C1, %C2 ; <i1> [#uses=1]
br i1 %CN, label %T, label %F
T: ; preds = %0
}
-define i1 @test6({ i32, i32 }* %I) {
+define i1 @test6(ptr %I) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP_1_I:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[I:%.*]], i64 0, i32 1
-; CHECK-NEXT: [[TMP_2_I:%.*]] = load i32, i32* [[TMP_1_I]], align 4
+; CHECK-NEXT: [[TMP_1_I:%.*]] = getelementptr { i32, i32 }, ptr [[I:%.*]], i64 0, i32 1
+; CHECK-NEXT: [[TMP_2_I:%.*]] = load i32, ptr [[TMP_1_I]], align 4
; CHECK-NEXT: [[TMP_2_I_OFF:%.*]] = add i32 [[TMP_2_I]], -14
; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[TMP_2_I_OFF]], 6
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 true, i1 false
; CHECK-NEXT: ret i1 [[SPEC_SELECT]]
;
entry:
- %tmp.1.i = getelementptr { i32, i32 }, { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
- %tmp.2.i = load i32, i32* %tmp.1.i ; <i32> [#uses=6]
+ %tmp.1.i = getelementptr { i32, i32 }, ptr %I, i64 0, i32 1 ; <ptr> [#uses=1]
+ %tmp.2.i = load i32, ptr %tmp.1.i ; <i32> [#uses=6]
%tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1]
br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0
shortcirc_next.0: ; preds = %entry
declare void @foo_02()
declare void @foo_03()
-define i32 @test_01(i32* %p, i32 %x, i1 %cond) {
+define i32 @test_01(ptr %p, i32 %x, i1 %cond) {
; CHECK-LABEL: @test_01(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB:%.*]], label [[COMMON_RET:%.*]]
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ [[R:%.*]], [[BB]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
; CHECK: bb:
-; CHECK-NEXT: [[R]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[R]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[COMMON_RET]]
;
entry:
i32 -654321, label %bb]
bb:
- %phi = phi i32* [null, %pred], [null, %pred], [null, %pred], [%p, %entry]
- %r = load i32, i32* %phi
+ %phi = phi ptr [null, %pred], [null, %pred], [null, %pred], [%p, %entry]
+ %r = load i32, ptr %phi
ret i32 %r
other_succ:
ret i32 0
}
-define i32 @test_02(i32* %p, i32 %x, i1 %cond) {
+define i32 @test_02(ptr %p, i32 %x, i1 %cond) {
; CHECK-LABEL: @test_02(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB:%.*]], label [[COMMON_RET:%.*]]
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ [[R:%.*]], [[BB]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
; CHECK: bb:
-; CHECK-NEXT: [[R]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[R]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[COMMON_RET]]
;
entry:
i32 -654321, label %other_succ]
bb:
- %phi = phi i32* [null, %pred], [%p, %entry]
- %r = load i32, i32* %phi
+ %phi = phi ptr [null, %pred], [%p, %entry]
+ %r = load i32, ptr %phi
ret i32 %r
other_succ:
ret i32 0
}
-define i32 @test_03(i32* %p, i32 %x, i1 %cond) {
+define i32 @test_03(ptr %p, i32 %x, i1 %cond) {
; CHECK-LABEL: @test_03(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB:%.*]], label [[PRED:%.*]]
; CHECK: unreachable:
; CHECK-NEXT: unreachable
; CHECK: bb:
-; CHECK-NEXT: [[R]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[R]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[COMMON_RET]]
; CHECK: do_1:
; CHECK-NEXT: call void @foo_01()
i32 3, label %do_3]
bb:
- %phi = phi i32* [null, %pred], [%p, %entry]
- %r = load i32, i32* %phi
+ %phi = phi ptr [null, %pred], [%p, %entry]
+ %r = load i32, ptr %phi
ret i32 %r
do_1:
ret i32 0
}
-define i32 @test_04(i32* %p, i32 %x, i1 %cond) {
+define i32 @test_04(ptr %p, i32 %x, i1 %cond) {
; CHECK-LABEL: @test_04(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB:%.*]], label [[PRED:%.*]]
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ [[R:%.*]], [[BB]] ], [ 1, [[DO_1]] ], [ 1, [[DO_2]] ], [ 1, [[DO_3]] ], [ 0, [[PRED]] ]
; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
; CHECK: bb:
-; CHECK-NEXT: [[R]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[R]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[COMMON_RET]]
; CHECK: do_1:
; CHECK-NEXT: call void @foo_01()
i32 3, label %do_3]
bb:
- %phi = phi i32* [null, %pred], [null, %pred], [null, %pred], [%p, %entry]
- %r = load i32, i32* %phi
+ %phi = phi ptr [null, %pred], [null, %pred], [null, %pred], [%p, %entry]
+ %r = load i32, ptr %phi
ret i32 %r
do_1:
@.str.2 = private unnamed_addr constant [10 x i8] c"y - x > 7\00", align 1
@.str.3 = private unnamed_addr constant [11 x i8] c"y - x < 40\00", align 1
-declare void @glibc_assert_fail(i8*, i8*, i32, i8*)
+declare void @glibc_assert_fail(ptr, ptr, i32, ptr)
define void @merge_glibc_asserts(i32 %x, i32 %y) {
; CHECK-LABEL: @merge_glibc_asserts(
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false:
-; CHECK-NEXT: tail call void @glibc_assert_fail(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 3, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @__PRETTY_FUNCTION__._Z1fjj, i64 0, i64 0))
+; CHECK-NEXT: tail call void @glibc_assert_fail(ptr @.str, ptr @.str.1, i32 3, ptr @__PRETTY_FUNCTION__._Z1fjj)
; CHECK-NEXT: unreachable
; CHECK: cond.end:
; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[Y]], [[X]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[SUB]], 7
; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END4:%.*]], label [[COND_FALSE3:%.*]]
; CHECK: cond.false3:
-; CHECK-NEXT: tail call void @glibc_assert_fail(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 4, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @__PRETTY_FUNCTION__._Z1fjj, i64 0, i64 0))
+; CHECK-NEXT: tail call void @glibc_assert_fail(ptr @.str.2, ptr @.str.1, i32 4, ptr @__PRETTY_FUNCTION__._Z1fjj)
; CHECK-NEXT: unreachable
; CHECK: cond.end4:
; CHECK-NEXT: [[CMP6:%.*]] = icmp ult i32 [[SUB]], 40
; CHECK-NEXT: br i1 [[CMP6]], label [[COND_END9:%.*]], label [[COND_FALSE8:%.*]]
; CHECK: cond.false8:
-; CHECK-NEXT: tail call void @glibc_assert_fail(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 5, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @__PRETTY_FUNCTION__._Z1fjj, i64 0, i64 0))
+; CHECK-NEXT: tail call void @glibc_assert_fail(ptr @.str.3, ptr @.str.1, i32 5, ptr @__PRETTY_FUNCTION__._Z1fjj)
; CHECK-NEXT: unreachable
; CHECK: cond.end9:
; CHECK-NEXT: ret void
br i1 %cmp, label %cond.end, label %cond.false
cond.false: ; preds = %entry
- tail call void @glibc_assert_fail(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 3, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @__PRETTY_FUNCTION__._Z1fjj, i64 0, i64 0)) #2
+ tail call void @glibc_assert_fail(ptr @.str, ptr @.str.1, i32 3, ptr @__PRETTY_FUNCTION__._Z1fjj) #2
unreachable
cond.end: ; preds = %entry
br i1 %cmp1, label %cond.end4, label %cond.false3
cond.false3: ; preds = %cond.end
- tail call void @glibc_assert_fail(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 4, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @__PRETTY_FUNCTION__._Z1fjj, i64 0, i64 0)) #2
+ tail call void @glibc_assert_fail(ptr @.str.2, ptr @.str.1, i32 4, ptr @__PRETTY_FUNCTION__._Z1fjj) #2
unreachable
cond.end4: ; preds = %cond.end
br i1 %cmp6, label %cond.end9, label %cond.false8
cond.false8: ; preds = %cond.end4
- tail call void @glibc_assert_fail(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32 5, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @__PRETTY_FUNCTION__._Z1fjj, i64 0, i64 0)) #2
+ tail call void @glibc_assert_fail(ptr @.str.3, ptr @.str.1, i32 5, ptr @__PRETTY_FUNCTION__._Z1fjj) #2
unreachable
cond.end9: ; preds = %cond.end4
; Don't tail merge these noreturn blocks using lifetime end. It prevents us
; from sharing stack slots for x and y.
-declare void @escape_i32_ptr(i32*)
-declare void @llvm.lifetime.start(i64, i8* nocapture)
-declare void @llvm.lifetime.end(i64, i8* nocapture)
+declare void @escape_i32_ptr(ptr)
+declare void @llvm.lifetime.start(i64, ptr nocapture)
+declare void @llvm.lifetime.end(i64, ptr nocapture)
define void @dont_merge_lifetimes(i32 %c1, i32 %c2) {
; CHECK-LABEL: @dont_merge_lifetimes(
; CHECK-NEXT: i32 42, label [[IF_THEN3:%.*]]
; CHECK-NEXT: ]
; CHECK: if.then:
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[X]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull [[TMP0]])
-; CHECK-NEXT: store i32 0, i32* [[X]], align 4
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[X]])
+; CHECK-NEXT: store i32 0, ptr [[X]], align 4
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C2:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN1:%.*]]
; CHECK: if.then1:
-; CHECK-NEXT: call void @escape_i32_ptr(i32* nonnull [[X]])
+; CHECK-NEXT: call void @escape_i32_ptr(ptr nonnull [[X]])
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull [[TMP0]])
+; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[X]])
; CHECK-NEXT: call void @abort()
; CHECK-NEXT: unreachable
; CHECK: if.then3:
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[Y]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull [[TMP1]])
-; CHECK-NEXT: store i32 0, i32* [[Y]], align 4
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[Y]])
+; CHECK-NEXT: store i32 0, ptr [[Y]], align 4
; CHECK-NEXT: [[TOBOOL5:%.*]] = icmp eq i32 [[C2]], 0
; CHECK-NEXT: br i1 [[TOBOOL5]], label [[IF_END7:%.*]], label [[IF_THEN6:%.*]]
; CHECK: if.then6:
-; CHECK-NEXT: call void @escape_i32_ptr(i32* nonnull [[Y]])
+; CHECK-NEXT: call void @escape_i32_ptr(ptr nonnull [[Y]])
; CHECK-NEXT: br label [[IF_END7]]
; CHECK: if.end7:
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull [[TMP1]])
+; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[Y]])
; CHECK-NEXT: call void @abort()
; CHECK-NEXT: unreachable
; CHECK: if.end9:
]
if.then: ; preds = %entry
- %0 = bitcast i32* %x to i8*
- call void @llvm.lifetime.start(i64 4, i8* nonnull %0)
- store i32 0, i32* %x, align 4
+ call void @llvm.lifetime.start(i64 4, ptr nonnull %x)
+ store i32 0, ptr %x, align 4
%tobool = icmp eq i32 %c2, 0
br i1 %tobool, label %if.end, label %if.then1
if.then1: ; preds = %if.then
- call void @escape_i32_ptr(i32* nonnull %x)
+ call void @escape_i32_ptr(ptr nonnull %x)
br label %if.end
if.end: ; preds = %if.then1, %if.then
- call void @llvm.lifetime.end(i64 4, i8* nonnull %0)
+ call void @llvm.lifetime.end(i64 4, ptr nonnull %x)
call void @abort()
unreachable
if.then3: ; preds = %entry
- %1 = bitcast i32* %y to i8*
- call void @llvm.lifetime.start(i64 4, i8* nonnull %1)
- store i32 0, i32* %y, align 4
+ call void @llvm.lifetime.start(i64 4, ptr nonnull %y)
+ store i32 0, ptr %y, align 4
%tobool5 = icmp eq i32 %c2, 0
br i1 %tobool5, label %if.end7, label %if.then6
if.then6: ; preds = %if.then3
- call void @escape_i32_ptr(i32* nonnull %y)
+ call void @escape_i32_ptr(ptr nonnull %y)
br label %if.end7
if.end7: ; preds = %if.then6, %if.then3
- call void @llvm.lifetime.end(i64 4, i8* nonnull %1)
+ call void @llvm.lifetime.end(i64 4, ptr nonnull %y)
call void @abort()
unreachable
declare void @quuz()
declare void @common()
-define void @merge_simple(i1 %cond) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @merge_simple(i1 %cond) personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: @merge_simple(
; CHECK-NEXT: invoke void @maybe_throws()
; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: invoke.cont3:
; CHECK-NEXT: ret void
; CHECK: lpad:
-; CHECK-NEXT: [[LP:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[LP:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br i1 [[COND:%.*]], label [[RESUME0:%.*]], label [[RESUME1:%.*]]
; CHECK: lpad2:
-; CHECK-NEXT: [[LP2:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[LP2:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @bar()
; CHECK-NEXT: br label [[RESUME2:%.*]]
; CHECK: lpad3:
-; CHECK-NEXT: [[LP3:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[LP3:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: call void @baz()
; CHECK-NEXT: br label [[RESUME2]]
; CHECK: common.resume:
-; CHECK-NEXT: [[COMMON_RESUME_OP:%.*]] = phi { i8*, i32 } [ [[LP]], [[RESUME0]] ], [ [[LP]], [[RESUME1]] ], [ [[SEMICOMMON_LP:%.*]], [[RESUME2]] ]
+; CHECK-NEXT: [[COMMON_RESUME_OP:%.*]] = phi { ptr, i32 } [ [[LP]], [[RESUME0]] ], [ [[LP]], [[RESUME1]] ], [ [[SEMICOMMON_LP:%.*]], [[RESUME2]] ]
; CHECK-NEXT: call void @common()
-; CHECK-NEXT: resume { i8*, i32 } [[COMMON_RESUME_OP]]
+; CHECK-NEXT: resume { ptr, i32 } [[COMMON_RESUME_OP]]
; CHECK: resume0:
; CHECK-NEXT: call void @qux()
; CHECK-NEXT: br label [[COMMON_RESUME:%.*]]
; CHECK-NEXT: call void @quux()
; CHECK-NEXT: br label [[COMMON_RESUME]]
; CHECK: resume2:
-; CHECK-NEXT: [[SEMICOMMON_LP]] = phi { i8*, i32 } [ [[LP2]], [[LPAD2]] ], [ [[LP3]], [[LPAD3]] ]
+; CHECK-NEXT: [[SEMICOMMON_LP]] = phi { ptr, i32 } [ [[LP2]], [[LPAD2]] ], [ [[LP3]], [[LPAD3]] ]
; CHECK-NEXT: call void @quuz()
; CHECK-NEXT: br label [[COMMON_RESUME]]
;
ret void
lpad:
- %lp = landingpad { i8*, i32 } cleanup
+ %lp = landingpad { ptr, i32 } cleanup
call void @foo()
br i1 %cond, label %resume0, label %resume1
lpad2:
- %lp2 = landingpad { i8*, i32 } cleanup
+ %lp2 = landingpad { ptr, i32 } cleanup
call void @bar()
br label %resume2
lpad3:
- %lp3 = landingpad { i8*, i32 } cleanup
+ %lp3 = landingpad { ptr, i32 } cleanup
call void @baz()
br label %resume2
resume0:
call void @qux()
call void @common()
- resume { i8*, i32 } %lp
+ resume { ptr, i32 } %lp
resume1:
call void @quux()
call void @common()
- resume { i8*, i32 } %lp
+ resume { ptr, i32 } %lp
resume2:
- %semicommon.lp = phi { i8*, i32 } [ %lp2, %lpad2 ], [ %lp3, %lpad3 ]
+ %semicommon.lp = phi { ptr, i32 } [ %lp2, %lpad2 ], [ %lp3, %lpad3 ]
call void @quuz()
call void @common()
- resume { i8*, i32 } %semicommon.lp
+ resume { ptr, i32 } %semicommon.lp
}
declare dso_local i32 @__gxx_personality_v0(...)
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
-%0 = type { %1*, %2* }
-%1 = type { %0* }
-%2 = type { %0*, %2* }
+%0 = type { ptr, ptr }
+%1 = type { ptr }
+%2 = type { ptr, ptr }
-define void @eggs(i1 %arg, i1 %arg16, %0* %arg17, %0* %arg18, %0* %arg19) {
+define void @eggs(i1 %arg, i1 %arg16, ptr %arg17, ptr %arg18, ptr %arg19) {
; CHECK-LABEL: @eggs(
; CHECK-NEXT: bb:
; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB20:%.*]], label [[BB21:%.*]]
; CHECK-NEXT: call void @wombat()
; CHECK-NEXT: unreachable
; CHECK: bb21:
-; CHECK-NEXT: [[I:%.*]] = icmp eq %0* [[ARG17:%.*]], null
+; CHECK-NEXT: [[I:%.*]] = icmp eq ptr [[ARG17:%.*]], null
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[I]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: call void @hoge()
; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[ARG16:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP1]])
-; CHECK-NEXT: [[I27:%.*]] = getelementptr inbounds [[TMP0]], %0* [[ARG19:%.*]], i64 0, i32 0
-; CHECK-NEXT: [[I28:%.*]] = load %1*, %1** [[I27]], align 8
-; CHECK-NEXT: call void @pluto.1(%1* [[I28]])
+; CHECK-NEXT: [[I28:%.*]] = load ptr, ptr [[ARG19:%.*]], align 8
+; CHECK-NEXT: call void @pluto.1(ptr [[I28]])
; CHECK-NEXT: call void @pluto()
; CHECK-NEXT: ret void
;
br label %bb24
bb21: ; preds = %bb
- %i = icmp eq %0* %arg17, null
+ %i = icmp eq ptr %arg17, null
br i1 %i, label %bb24, label %bb22
bb22: ; preds = %bb21
bb24: ; preds = %bb23, %bb22, %bb21, %bb20
%i25 = phi i1 [ false, %bb21 ], [ false, %bb20 ], [ false, %bb23 ], [ false, %bb22 ]
- %i26 = phi %0* [ null, %bb21 ], [ null, %bb20 ], [ %arg19, %bb23 ], [ null, %bb22 ]
- %i27 = getelementptr inbounds %0, %0* %i26, i64 0, i32 0
- %i28 = load %1*, %1** %i27, align 8
- call void @pluto.1(%1* %i28)
+ %i26 = phi ptr [ null, %bb21 ], [ null, %bb20 ], [ %arg19, %bb23 ], [ null, %bb22 ]
+ %i28 = load ptr, ptr %i26, align 8
+ call void @pluto.1(ptr %i28)
br i1 %i25, label %bb30, label %bb29
bb29: ; preds = %bb24
declare void @pluto()
declare void @spam()
declare void @hoge()
-declare void @pluto.1(%1*)
+declare void @pluto.1(ptr)
; Assign DebugLoc to unreachable instruction.
define void @foo() nounwind ssp !dbg !0 {
; CHECK: unreachable, !dbg
- store i32 42, i32* null, !dbg !5
+ store i32 42, ptr null, !dbg !5
ret void, !dbg !7
}
; RUN: opt -S -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s
define void @foo() nounwind ssp #0 !dbg !0 {
-; CHECK: store i32 42, i32* null
+; CHECK: store i32 42, ptr null
; CHECK-NOT: call void @llvm.trap()
; CHECK: ret void
- store i32 42, i32* null, !dbg !5
+ store i32 42, ptr null, !dbg !5
ret void, !dbg !7
}
br i1 %0, label %bb, label %return
bb: ; preds = %entry
- %1 = load volatile i32, i32* null
+ %1 = load volatile i32, ptr null
unreachable
br label %return
br i1 %0, label %bb, label %return
bb: ; preds = %entry
- %1 = load volatile i32, i32* null
+ %1 = load volatile i32, ptr null
unreachable
br label %return
; CHECK-NEXT: unreachable
;
entry:
- store i32 4,i32* null
+ store i32 4,ptr null
ret void
}
define void @test2_no_null_opt() nounwind #0 {
; CHECK-LABEL: @test2_no_null_opt(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 4, i32* null, align 4
+; CHECK-NEXT: store i32 4, ptr null, align 4
; CHECK-NEXT: ret void
;
entry:
- store i32 4,i32* null
+ store i32 4,ptr null
ret void
}
define void @test3() nounwind {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store volatile i32 4, i32* null, align 4
+; CHECK-NEXT: store volatile i32 4, ptr null, align 4
; CHECK-NEXT: ret void
;
entry:
- store volatile i32 4, i32* null
+ store volatile i32 4, ptr null
ret void
}
define void @test3_no_null_opt() nounwind #0 {
; CHECK-LABEL: @test3_no_null_opt(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store volatile i32 4, i32* null, align 4
+; CHECK-NEXT: store volatile i32 4, ptr null, align 4
; CHECK-NEXT: ret void
;
entry:
- store volatile i32 4, i32* null
+ store volatile i32 4, ptr null
ret void
}
; Check store before unreachable.
-define void @test4(i1 %C, i32* %P) {
+define void @test4(i1 %C, ptr %P) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[T:%.*]], label [[F:%.*]]
; CHECK: T:
-; CHECK-NEXT: store volatile i32 0, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store volatile i32 0, ptr [[P:%.*]], align 4
; CHECK-NEXT: unreachable
; CHECK: F:
; CHECK-NEXT: ret void
entry:
br i1 %C, label %T, label %F
T:
- store volatile i32 0, i32* %P
+ store volatile i32 0, ptr %P
unreachable
F:
ret void
}
; Check cmpxchg before unreachable.
-define void @test5(i1 %C, i32* %P) {
+define void @test5(i1 %C, ptr %P) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[C:%.*]], true
entry:
br i1 %C, label %T, label %F
T:
- cmpxchg volatile i32* %P, i32 0, i32 1 seq_cst seq_cst
+ cmpxchg volatile ptr %P, i32 0, i32 1 seq_cst seq_cst
unreachable
F:
ret void
}
; Check atomicrmw before unreachable.
-define void @test6(i1 %C, i32* %P) {
+define void @test6(i1 %C, ptr %P) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[C:%.*]], true
entry:
br i1 %C, label %T, label %F
T:
- atomicrmw volatile xchg i32* %P, i32 0 seq_cst
+ atomicrmw volatile xchg ptr %P, i32 0 seq_cst
unreachable
F:
ret void
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 2>&1 | FileCheck %s
-declare i32 @blam(i8*, i32)
+declare i32 @blam(ptr, i32)
-define i32 @wibble(i8* %arg, i8** %arg1) {
+define i32 @wibble(ptr %arg, ptr %arg1) {
; CHECK-LABEL: @wibble(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[BORG:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[BORG]], [[BB2]] ]
; CHECK-NEXT: [[BORG3:%.*]] = phi i32 [ 8, [[BB]] ], [ [[SPEC_SELECT:%.*]], [[BB2]] ]
-; CHECK-NEXT: [[BORG4:%.*]] = tail call i32 @blam(i8* [[ARG:%.*]], i32 [[BORG]])
+; CHECK-NEXT: [[BORG4:%.*]] = tail call i32 @blam(ptr [[ARG:%.*]], i32 [[BORG]])
; CHECK-NEXT: [[BORG5:%.*]] = icmp eq i32 [[BORG4]], 0
; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[BORG5]], i32 [[BORG3]], i32 [[BORG4]]
; CHECK-NEXT: [[BORG11:%.*]] = icmp ult i32 [[BORG]], 2
bb2: ; preds = %bb8, %bb
%borg = phi i32 [ 0, %bb ], [ %borg9, %bb8 ]
%borg3 = phi i32 [ 8, %bb ], [ %borg10, %bb8 ]
- %borg4 = tail call i32 @blam(i8* %arg, i32 %borg)
+ %borg4 = tail call i32 @blam(ptr %arg, i32 %borg)
%borg5 = icmp eq i32 %borg4, 0
br i1 %borg5, label %bb8, label %bb6
bb6: ; preds = %bb2
- %borg7 = load i8*, i8** %arg1, align 4
+ %borg7 = load ptr, ptr %arg1, align 4
br label %bb8
bb8: ; preds = %bb6, %bb2
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
-define i1 @qux(i8* %m, i8* %n, i8* %o, i8* %p) nounwind {
+define i1 @qux(ptr %m, ptr %n, ptr %o, ptr %p) nounwind {
; CHECK-LABEL: @qux(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[T7:%.*]] = icmp eq i8* [[M:%.*]], [[N:%.*]]
-; CHECK-NEXT: [[T15:%.*]] = icmp eq i8* [[O:%.*]], [[P:%.*]]
+; CHECK-NEXT: [[T7:%.*]] = icmp eq ptr [[M:%.*]], [[N:%.*]]
+; CHECK-NEXT: [[T15:%.*]] = icmp eq ptr [[O:%.*]], [[P:%.*]]
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[T7]], i1 [[T15]], i1 false, !prof [[PROF0:![0-9]+]]
; CHECK-NEXT: ret i1 [[SPEC_SELECT]]
;
entry:
- %t7 = icmp eq i8* %m, %n
+ %t7 = icmp eq ptr %m, %n
br i1 %t7, label %bb, label %UnifiedReturnBlock, !prof !0
bb:
- %t15 = icmp eq i8* %o, %p
+ %t15 = icmp eq ptr %o, %p
br label %UnifiedReturnBlock
UnifiedReturnBlock:
define i32 @PR50638() {
; CHECK-LABEL: @PR50638(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 0, i32* @a, align 4
+; CHECK-NEXT: store i32 0, ptr @a, align 4
; CHECK-NEXT: ret i32 0
;
entry:
- store i32 0, i32* @a, align 4
+ store i32 0, ptr @a, align 4
br label %pre.for
pre.for:
for:
%cmp = phi i1 [ true, %pre.for ], [ false, %post.for ]
%storemerge = phi i32 [ 0, %pre.for ], [ 1, %post.for ]
- store i32 %storemerge, i32* @a, align 4
+ store i32 %storemerge, ptr @a, align 4
br i1 %cmp, label %post.for, label %pre.for
post.for:
target datalayout = "e-p:64:64-p5:32:32-A5"
declare void @llvm.assume(i1)
-declare i1 @llvm.type.test(i8*, metadata) nounwind readnone
+declare i1 @llvm.type.test(ptr, metadata) nounwind readnone
-define void @test_01(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
+define void @test_01(i1 %c, ptr align 1 %ptr) local_unnamed_addr #0 {
; CHECK-LABEL: @test_01(
; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
; CHECK: false1:
-; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR]] to i64
+; CHECK-NEXT: store volatile i64 1, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[PTR]] to i64
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 7
; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 3, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: true2.critedge:
-; CHECK-NEXT: [[PTRINT_C:%.*]] = ptrtoint i64* [[PTR]] to i64
+; CHECK-NEXT: [[PTRINT_C:%.*]] = ptrtoint ptr [[PTR]] to i64
; CHECK-NEXT: [[MASKEDPTR_C:%.*]] = and i64 [[PTRINT_C]], 7
; CHECK-NEXT: [[MASKCOND_C:%.*]] = icmp eq i64 [[MASKEDPTR_C]], 0
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND_C]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 2, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET]]
;
br i1 %c, label %true1, label %false1
true1: ; preds = %false1, %0
- %ptrint = ptrtoint i64* %ptr to i64
+ %ptrint = ptrtoint ptr %ptr to i64
%maskedptr = and i64 %ptrint, 7
%maskcond = icmp eq i64 %maskedptr, 0
tail call void @llvm.assume(i1 %maskcond)
- store volatile i64 0, i64* %ptr, align 8
+ store volatile i64 0, ptr %ptr, align 8
br i1 %c, label %true2, label %false2
false1: ; preds = %0
- store volatile i64 1, i64* %ptr, align 4
+ store volatile i64 1, ptr %ptr, align 4
br label %true1
true2: ; preds = %true1
- store volatile i64 2, i64* %ptr, align 8
+ store volatile i64 2, ptr %ptr, align 8
ret void
false2: ; preds = %true1
- store volatile i64 3, i64* %ptr, align 8
+ store volatile i64 3, ptr %ptr, align 8
ret void
}
; Corner case: the block has max possible size for which we still do PRE.
-define void @test_02(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
+define void @test_02(i1 %c, ptr align 1 %ptr) local_unnamed_addr #0 {
; CHECK-LABEL: @test_02(
; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
; CHECK: false1:
-; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR]] to i64
+; CHECK-NEXT: store volatile i64 1, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[PTR]] to i64
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 7
; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 3, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: true2.critedge:
-; CHECK-NEXT: [[PTRINT_C:%.*]] = ptrtoint i64* [[PTR]] to i64
+; CHECK-NEXT: [[PTRINT_C:%.*]] = ptrtoint ptr [[PTR]] to i64
; CHECK-NEXT: [[MASKEDPTR_C:%.*]] = and i64 [[PTRINT_C]], 7
; CHECK-NEXT: [[MASKCOND_C:%.*]] = icmp eq i64 [[MASKEDPTR_C]], 0
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND_C]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 2, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET]]
;
br i1 %c, label %true1, label %false1
true1: ; preds = %false1, %0
- %ptrint = ptrtoint i64* %ptr to i64
+ %ptrint = ptrtoint ptr %ptr to i64
%maskedptr = and i64 %ptrint, 7
%maskcond = icmp eq i64 %maskedptr, 0
tail call void @llvm.assume(i1 %maskcond)
- store volatile i64 0, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
+ store volatile i64 0, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
br i1 %c, label %true2, label %false2
false1: ; preds = %0
- store volatile i64 1, i64* %ptr, align 4
+ store volatile i64 1, ptr %ptr, align 4
br label %true1
true2: ; preds = %true1
- store volatile i64 2, i64* %ptr, align 8
+ store volatile i64 2, ptr %ptr, align 8
ret void
false2: ; preds = %true1
- store volatile i64 3, i64* %ptr, align 8
+ store volatile i64 3, ptr %ptr, align 8
ret void
}
; This block is too huge for PRE.
-define void @test_03(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
+define void @test_03(i1 %c, ptr align 1 %ptr) local_unnamed_addr #0 {
; CHECK-LABEL: @test_03(
; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE1:%.*]], label [[FALSE1:%.*]]
; CHECK: true1:
-; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR:%.*]] to i64
+; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[PTR:%.*]] to i64
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 7
; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
; CHECK-NEXT: br i1 [[C]], label [[TRUE2:%.*]], label [[FALSE2:%.*]]
; CHECK: false1:
-; CHECK-NEXT: store volatile i64 1, i64* [[PTR]], align 4
+; CHECK-NEXT: store volatile i64 1, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[TRUE1]]
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: true2:
-; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 2, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: false2:
-; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 3, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET]]
;
br i1 %c, label %true1, label %false1
true1: ; preds = %false1, %0
- %ptrint = ptrtoint i64* %ptr to i64
+ %ptrint = ptrtoint ptr %ptr to i64
%maskedptr = and i64 %ptrint, 7
%maskcond = icmp eq i64 %maskedptr, 0
tail call void @llvm.assume(i1 %maskcond)
- store volatile i64 0, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
+ store volatile i64 0, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
br i1 %c, label %true2, label %false2
false1: ; preds = %0
- store volatile i64 1, i64* %ptr, align 4
+ store volatile i64 1, ptr %ptr, align 4
br label %true1
true2: ; preds = %true1
- store volatile i64 2, i64* %ptr, align 8
+ store volatile i64 2, ptr %ptr, align 8
ret void
false2: ; preds = %true1
- store volatile i64 3, i64* %ptr, align 8
+ store volatile i64 3, ptr %ptr, align 8
ret void
}
; Try the max block size for PRE again but with the bitcast/type test/assume
; sequence used for whole program devirt.
-define void @test_04(i1 %c, i64* align 1 %ptr, [3 x i8*]* %vtable) local_unnamed_addr #0 {
+define void @test_04(i1 %c, ptr align 1 %ptr, ptr %vtable) local_unnamed_addr #0 {
; CHECK-LABEL: @test_04(
; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
; CHECK: false1:
-; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[VTABLEI8:%.*]] = bitcast [3 x i8*]* [[VTABLE:%.*]] to i8*
-; CHECK-NEXT: [[P:%.*]] = call i1 @llvm.type.test(i8* [[VTABLEI8]], metadata !"foo")
+; CHECK-NEXT: store volatile i64 1, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: [[P:%.*]] = call i1 @llvm.type.test(ptr [[VTABLE:%.*]], metadata !"foo")
; CHECK-NEXT: tail call void @llvm.assume(i1 [[P]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 3, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: true2.critedge:
-; CHECK-NEXT: [[VTABLEI8_C:%.*]] = bitcast [3 x i8*]* [[VTABLE]] to i8*
-; CHECK-NEXT: [[P_C:%.*]] = call i1 @llvm.type.test(i8* [[VTABLEI8_C]], metadata !"foo")
+; CHECK-NEXT: [[P_C:%.*]] = call i1 @llvm.type.test(ptr [[VTABLE]], metadata !"foo")
; CHECK-NEXT: tail call void @llvm.assume(i1 [[P_C]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 2, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET]]
;
br i1 %c, label %true1, label %false1
true1: ; preds = %false1, %0
- %vtablei8 = bitcast [3 x i8*]* %vtable to i8*
- %p = call i1 @llvm.type.test(i8* %vtablei8, metadata !"foo")
+ %p = call i1 @llvm.type.test(ptr %vtable, metadata !"foo")
tail call void @llvm.assume(i1 %p)
- store volatile i64 0, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
+ store volatile i64 0, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
br i1 %c, label %true2, label %false2
false1: ; preds = %0
- store volatile i64 1, i64* %ptr, align 4
+ store volatile i64 1, ptr %ptr, align 4
br label %true1
true2: ; preds = %true1
- store volatile i64 2, i64* %ptr, align 8
+ store volatile i64 2, ptr %ptr, align 8
ret void
false2: ; preds = %true1
- store volatile i64 3, i64* %ptr, align 8
+ store volatile i64 3, ptr %ptr, align 8
ret void
}
; The load, icmp and assume should not count towards the limit, they are
; ephemeral.
-define void @test_non_speculatable(i1 %c, i64* align 1 %ptr, i8* %ptr2) local_unnamed_addr #0 {
+define void @test_non_speculatable(i1 %c, ptr align 1 %ptr, ptr %ptr2) local_unnamed_addr #0 {
; CHECK-LABEL: @test_non_speculatable(
; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
; CHECK: false1:
-; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[PTR2:%.*]], align 1
+; CHECK-NEXT: store volatile i64 1, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: [[V:%.*]] = load i8, ptr [[PTR2:%.*]], align 1
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[V]], 42
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 3, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET:%.*]]
; CHECK: common.ret:
; CHECK-NEXT: ret void
; CHECK: true2.critedge:
-; CHECK-NEXT: [[V_C:%.*]] = load i8, i8* [[PTR2]], align 1
+; CHECK-NEXT: [[V_C:%.*]] = load i8, ptr [[PTR2]], align 1
; CHECK-NEXT: [[C2_C:%.*]] = icmp eq i8 [[V_C]], 42
; CHECK-NEXT: call void @llvm.assume(i1 [[C2_C]])
-; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
-; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 0, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 -1, ptr [[PTR]], align 8
+; CHECK-NEXT: store volatile i64 2, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[COMMON_RET]]
;
br i1 %c, label %true1, label %false1
true1: ; preds = %false1, %0
- %v = load i8, i8* %ptr2
+ %v = load i8, ptr %ptr2
%c2 = icmp eq i8 %v, 42
call void @llvm.assume(i1 %c2)
- store volatile i64 0, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
- store volatile i64 -1, i64* %ptr, align 8
+ store volatile i64 0, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
+ store volatile i64 -1, ptr %ptr, align 8
br i1 %c, label %true2, label %false2
false1: ; preds = %0
- store volatile i64 1, i64* %ptr, align 4
+ store volatile i64 1, ptr %ptr, align 4
br label %true1
true2: ; preds = %true1
- store volatile i64 2, i64* %ptr, align 8
+ store volatile i64 2, ptr %ptr, align 8
ret void
false2: ; preds = %true1
- store volatile i64 3, i64* %ptr, align 8
+ store volatile i64 3, ptr %ptr, align 8
ret void
}
declare void @fn_2()
-define void @fn_1(i1 %B) personality i32 (...)* @__CxxFrameHandler3 {
+define void @fn_1(i1 %B) personality ptr @__CxxFrameHandler3 {
entry:
br i1 %B, label %__Ea.exit, label %lor.lhs.false.i.i
br label %arraydestroy.body.i
arraydestroy.body.i:
- %gep = getelementptr i8, i8* null, i32 -1
+ %gep = getelementptr i8, ptr null, i32 -1
br label %dtor.exit.i
dtor.exit.i:
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s | FileCheck %s
-define i32 @basic(i1 %cond_0, i32* %p) {
+define i32 @basic(i1 %cond_0, ptr %p) {
; CHECK-LABEL: @basic(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[DEOPTRET:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"() ]
; CHECK-NEXT: ret i32 [[DEOPTRET]]
; CHECK: guarded:
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i32 [[V]], 0
; CHECK-NEXT: br i1 [[COND_1]], label [[RETURN:%.*]], label [[DEOPT]], !prof [[PROF0]]
; CHECK: return:
ret i32 %deoptret
guarded:
- %v = load i32, i32* %p
+ %v = load i32, ptr %p
%cond_1 = icmp eq i32 %v, 0
br i1 %cond_1, label %return, label %deopt2, !prof !0
ret i32 0
}
-define i32 @basic_swapped_branch(i1 %cond_0, i32* %p) {
+define i32 @basic_swapped_branch(i1 %cond_0, ptr %p) {
; CHECK-LABEL: @basic_swapped_branch(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[DEOPTRET:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"() ]
; CHECK-NEXT: ret i32 [[DEOPTRET]]
; CHECK: guarded:
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i32 [[V]], 0
; CHECK-NEXT: br i1 [[COND_1]], label [[DEOPT]], label [[RETURN:%.*]], !prof [[PROF0]]
; CHECK: return:
ret i32 %deoptret
guarded:
- %v = load i32, i32* %p
+ %v = load i32, ptr %p
%cond_1 = icmp eq i32 %v, 0
br i1 %cond_1, label %deopt2, label %return, !prof !0
; This one is subtle - We can't widen only one branch use of the
; widenable condition as two branches are correlated. We'd have to
; widen them *both*.
-define i32 @neg_correlated(i1 %cond_0, i1 %cond_1, i32* %p) {
+define i32 @neg_correlated(i1 %cond_0, i1 %cond_1, ptr %p) {
; CHECK-LABEL: @neg_correlated(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[DEOPTRET2:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"() ]
; CHECK-NEXT: ret i32 [[DEOPTRET2]]
; CHECK: guarded2:
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND_2:%.*]] = icmp eq i32 [[V]], 0
; CHECK-NEXT: br i1 [[COND_2]], label [[RETURN:%.*]], label [[DEOPT3:%.*]], !prof [[PROF0]]
; CHECK: deopt3:
ret i32 %deoptret2
guarded2:
- %v = load i32, i32* %p
+ %v = load i32, ptr %p
%cond_2 = icmp eq i32 %v, 0
br i1 %cond_2, label %return, label %deopt3, !prof !0
ret i32 0
}
-define i32 @trivial_wb(i1 %cond_0, i32* %p) {
+define i32 @trivial_wb(i1 %cond_0, ptr %p) {
; CHECK-LABEL: @trivial_wb(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[DEOPTRET:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"() ]
; CHECK-NEXT: ret i32 [[DEOPTRET]]
; CHECK: guarded:
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i32 [[V]], 0
; CHECK-NEXT: br i1 [[COND_1]], label [[RETURN:%.*]], label [[DEOPT]], !prof [[PROF0]]
; CHECK: return:
ret i32 %deoptret
guarded:
- %v = load i32, i32* %p
+ %v = load i32, ptr %p
%cond_1 = icmp eq i32 %v, 0
br i1 %cond_1, label %return, label %deopt2, !prof !0
}
-define i32 @swapped_wb(i1 %cond_0, i32* %p) {
+define i32 @swapped_wb(i1 %cond_0, ptr %p) {
; CHECK-LABEL: @swapped_wb(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[WIDENABLE_COND:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[DEOPTRET:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"() ]
; CHECK-NEXT: ret i32 [[DEOPTRET]]
; CHECK: guarded:
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i32 [[V]], 0
; CHECK-NEXT: br i1 [[COND_1]], label [[RETURN:%.*]], label [[DEOPT]], !prof [[PROF0]]
; CHECK: return:
ret i32 %deoptret
guarded:
- %v = load i32, i32* %p
+ %v = load i32, ptr %p
%cond_1 = icmp eq i32 %v, 0
br i1 %cond_1, label %return, label %deopt2, !prof !0
declare void @Personality()
declare void @f()
-define void @test1() personality i8* bitcast (void ()* @Personality to i8*) {
+define void @test1() personality ptr @Personality {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @f()
unreachable
}
-define void @test2() personality i8* bitcast (void ()* @Personality to i8*) {
+define void @test2() personality ptr @Personality {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
unreachable
}
-define void @test3() personality i8* bitcast (void ()* @Personality to i8*) {
+define void @test3() personality ptr @Personality {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
unreachable
}
-define void @test5() personality i8* bitcast (void ()* @Personality to i8*) {
+define void @test5() personality ptr @Personality {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
unreachable
}
-define void @test6() personality i8* bitcast (void ()* @Personality to i8*) {
+define void @test6() personality ptr @Personality {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
; CHECK: catch.pad:
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch.body] unwind to caller
; CHECK: catch.body:
-; CHECK-NEXT: [[CATCH:%.*]] = catchpad within [[CS1]] [i8* null, i32 0, i8* null]
+; CHECK-NEXT: [[CATCH:%.*]] = catchpad within [[CS1]] [ptr null, i32 0, ptr null]
; CHECK-NEXT: catchret from [[CATCH]] to label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
%cs1 = catchswitch within none [label %catch.body, label %catch.body] unwind to caller
catch.body:
- %catch = catchpad within %cs1 [i8* null, i32 0, i8* null]
+ %catch = catchpad within %cs1 [ptr null, i32 0, ptr null]
catchret from %catch to label %exit
exit:
ret void
}
-define void @test7() personality i8* bitcast (void ()* @Personality to i8*) {
+define void @test7() personality ptr @Personality {
; CHECK-LABEL: @test7(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
; CHECK: catch.pad:
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch.body] unwind to caller
; CHECK: catch.body:
-; CHECK-NEXT: [[CATCH:%.*]] = catchpad within [[CS1]] [i8* null, i32 0, i8* null]
+; CHECK-NEXT: [[CATCH:%.*]] = catchpad within [[CS1]] [ptr null, i32 0, ptr null]
; CHECK-NEXT: catchret from [[CATCH]] to label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
%cs1 = catchswitch within none [label %catch.body, label %catch.body2] unwind to caller
catch.body:
- %catch = catchpad within %cs1 [i8* null, i32 0, i8* null]
+ %catch = catchpad within %cs1 [ptr null, i32 0, ptr null]
catchret from %catch to label %exit
catch.body2:
- %catch2 = catchpad within %cs1 [i8* null, i32 0, i8* null]
+ %catch2 = catchpad within %cs1 [ptr null, i32 0, ptr null]
catchret from %catch2 to label %exit
exit:
ret void
}
-define void @test8() personality i8* bitcast (void ()* @Personality to i8*) {
+define void @test8() personality ptr @Personality {
; CHECK-LABEL: @test8(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
; CHECK: catch.pad:
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label %catch.body] unwind to caller
; CHECK: catch.body:
-; CHECK-NEXT: [[CATCH:%.*]] = catchpad within [[CS1]] [i8* null, i32 0, i8* null]
+; CHECK-NEXT: [[CATCH:%.*]] = catchpad within [[CS1]] [ptr null, i32 0, ptr null]
; CHECK-NEXT: catchret from [[CATCH]] to label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
%cs1 = catchswitch within none [label %catch.body, label %catch.body2] unwind to caller
catch.body2:
- %catch2 = catchpad within %cs1 [i8* null, i32 0, i8* null]
+ %catch2 = catchpad within %cs1 [ptr null, i32 0, ptr null]
catchret from %catch2 to label %exit
catch.body:
- %catch = catchpad within %cs1 [i8* null, i32 0, i8* null]
+ %catch = catchpad within %cs1 [ptr null, i32 0, ptr null]
catchret from %catch to label %exit
exit:
ret void
}
-define void @test9() personality i8* bitcast (void ()* @Personality to i8*) {
+define void @test9() personality ptr @Personality {
; CHECK-LABEL: @test9(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @f()
; CHECK: catch.pad:
; CHECK-NEXT: [[CS1:%.*]] = catchswitch within none [label [[CATCH_BODY:%.*]], label %catch.body2] unwind to caller
; CHECK: catch.body:
-; CHECK-NEXT: [[CATCH:%.*]] = catchpad within [[CS1]] [i8* null, i32 0, i8* null]
+; CHECK-NEXT: [[CATCH:%.*]] = catchpad within [[CS1]] [ptr null, i32 0, ptr null]
; CHECK-NEXT: catchret from [[CATCH]] to label [[EXIT]]
; CHECK: catch.body2:
-; CHECK-NEXT: [[CATCH2:%.*]] = catchpad within [[CS1]] [i8* null, i32 64, i8* null]
+; CHECK-NEXT: [[CATCH2:%.*]] = catchpad within [[CS1]] [ptr null, i32 64, ptr null]
; CHECK-NEXT: catchret from [[CATCH2]] to label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
%cs1 = catchswitch within none [label %catch.body, label %catch.body2] unwind to caller
catch.body:
- %catch = catchpad within %cs1 [i8* null, i32 0, i8* null]
+ %catch = catchpad within %cs1 [ptr null, i32 0, ptr null]
catchret from %catch to label %exit
catch.body2:
- %catch2 = catchpad within %cs1 [i8* null, i32 64, i8* null]
+ %catch2 = catchpad within %cs1 [ptr null, i32 64, ptr null]
catchret from %catch2 to label %exit
exit: