InnerShift.getOperand(0), NewShiftAmt);
return DAG.getNode(ISD::TRUNCATE, DL, VT, NewShift);
}
+ // In the more general case, we can clear the high bits after the shift:
+ // srl (trunc (srl x, c1)), c2 --> trunc (and (srl x, (c1+c2)), Mask)
+ if (N0.hasOneUse() && InnerShift.hasOneUse() && c1 + c2 <= OpSizeInBits) {
+ SDLoc DL(N);
+ SDValue NewShiftAmt = DAG.getConstant(c1 + c2, DL, ShiftAmtVT);
+ SDValue NewShift = DAG.getNode(ISD::SRL, DL, InnerShiftVT,
+ InnerShift.getOperand(0), NewShiftAmt);
+ SDValue Mask = DAG.getConstant((1 << (InnerShiftSize - c2)) - 1, DL,
+ InnerShiftVT);
+ SDValue And = DAG.getNode(ISD::AND, DL, InnerShiftVT, NewShift, Mask);
+ return DAG.getNode(ISD::TRUNCATE, DL, VT, And);
+ }
}
}
define i32 @t(i64 %x) {
; CHECK-LABEL: t:
; CHECK: // %bb.0:
-; CHECK-NEXT: lsr x8, x0, #13
-; CHECK-NEXT: ubfx x0, x8, #4, #28
+; CHECK-NEXT: ubfx x0, x0, #17, #28
; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0
; CHECK-NEXT: ret
%s = lshr i64 %x, 13
define i32 @sh_trunc_sh(i64 %x) {
; CHECK-LABEL: sh_trunc_sh:
; CHECK: # %bb.0:
-; CHECK-NEXT: rldicl 3, 3, 51, 13
-; CHECK-NEXT: srwi 3, 3, 4
+; CHECK-NEXT: rldicl 3, 3, 47, 36
; CHECK-NEXT: blr
%s = lshr i64 %x, 13
%t = trunc i64 %s to i32