ARM: dts: imx6ul: set enet_clk_ref to CLK_ENETx_REF_SEL
authorOleksij Rempel <o.rempel@pengutronix.de>
Tue, 31 Jan 2023 08:46:40 +0000 (09:46 +0100)
committerShawn Guo <shawnguo@kernel.org>
Mon, 6 Mar 2023 02:01:46 +0000 (10:01 +0800)
IMX6UL_CLK_ENETx_REF is behind of CLK_ENETx_REF_SEL:

FEC MAC <---------- CLK_ENETx_REF_SEL <--------- CLK_ENETx_REF
       \
        ^------<-> CLK_ENETx_REF_PAD

We should point to the clock selector instead. So, we will be able to
use external clock source from CLK_ENETx_REF_PAD as well.

At same time, remove enet_out clk. It is using always the same clock as
enet_clk_ref and do not help to solve any challenges of this HW.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6ul.dtsi

index f0a9139..3d9d0f8 100644 (file)
                                clocks = <&clks IMX6UL_CLK_ENET>,
                                         <&clks IMX6UL_CLK_ENET_AHB>,
                                         <&clks IMX6UL_CLK_ENET_PTP>,
-                                        <&clks IMX6UL_CLK_ENET2_REF_125M>,
-                                        <&clks IMX6UL_CLK_ENET2_REF_125M>;
+                                        <&clks IMX6UL_CLK_ENET2_REF_SEL>;
                                clock-names = "ipg", "ahb", "ptp",
-                                             "enet_clk_ref", "enet_out";
+                                             "enet_clk_ref";
                                fsl,num-tx-queues = <1>;
                                fsl,num-rx-queues = <1>;
                                fsl,stop-mode = <&gpr 0x10 4>;
                                clocks = <&clks IMX6UL_CLK_ENET>,
                                         <&clks IMX6UL_CLK_ENET_AHB>,
                                         <&clks IMX6UL_CLK_ENET_PTP>,
-                                        <&clks IMX6UL_CLK_ENET_REF>,
-                                        <&clks IMX6UL_CLK_ENET_REF>;
+                                        <&clks IMX6UL_CLK_ENET1_REF_SEL>;
                                clock-names = "ipg", "ahb", "ptp",
-                                             "enet_clk_ref", "enet_out";
+                                             "enet_clk_ref";
                                fsl,num-tx-queues = <1>;
                                fsl,num-rx-queues = <1>;
                                fsl,stop-mode = <&gpr 0x10 3>;