drm/amd/amdgpu: remove unnecessary RAS context field
authorCandice Li <candice.li@amd.com>
Fri, 13 Aug 2021 11:06:33 +0000 (19:06 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 16 Aug 2021 19:35:55 +0000 (15:35 -0400)
Delete ras_if->name in the RAS ctx structure and remove related lines.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c
drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

index a0be0772c8b3c3bff7e95aa144152ad2a03c97c1..e7e9655c5623f414abc14f4e04f5498446c4d3e7 100644 (file)
@@ -615,7 +615,6 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev)
                adev->gfx.ras_if->block = AMDGPU_RAS_BLOCK__GFX;
                adev->gfx.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
                adev->gfx.ras_if->sub_block_index = 0;
-               strcpy(adev->gfx.ras_if->name, "gfx");
        }
        fs_info.head = ih_info.head = *adev->gfx.ras_if;
        r = amdgpu_ras_late_init(adev, adev->gfx.ras_if,
index 1d50d534d77c7fb82e05342f6bdb5d03ba8161ee..a766e1aad2b913183ad4c211b57e28661ccf7d38 100644 (file)
@@ -41,7 +41,6 @@ int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev)
                adev->hdp.ras_if->block = AMDGPU_RAS_BLOCK__HDP;
                adev->hdp.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
                adev->hdp.ras_if->sub_block_index = 0;
-               strcpy(adev->hdp.ras_if->name, "hdp");
        }
        ih_info.head = fs_info.head = *adev->hdp.ras_if;
        r = amdgpu_ras_late_init(adev, adev->hdp.ras_if,
index ead3dc572ec54471a01cfebcf4c06e985d2a2609..24297dc51434b2a07ce1b1f90cec1261449ecad7 100644 (file)
@@ -41,7 +41,6 @@ int amdgpu_mmhub_ras_late_init(struct amdgpu_device *adev)
                adev->mmhub.ras_if->block = AMDGPU_RAS_BLOCK__MMHUB;
                adev->mmhub.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
                adev->mmhub.ras_if->sub_block_index = 0;
-               strcpy(adev->mmhub.ras_if->name, "mmhub");
        }
        ih_info.head = fs_info.head = *adev->mmhub.ras_if;
        r = amdgpu_ras_late_init(adev, adev->mmhub.ras_if,
index 6201a5f4b4fa6e523459c0611af0304c1bdb96f3..6afb02fef8cfb786c76d74d50b588bcdb6108e9b 100644 (file)
@@ -39,7 +39,6 @@ int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev)
                adev->nbio.ras_if->block = AMDGPU_RAS_BLOCK__PCIE_BIF;
                adev->nbio.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
                adev->nbio.ras_if->sub_block_index = 0;
-               strcpy(adev->nbio.ras_if->name, "pcie_bif");
        }
        ih_info.head = fs_info.head = *adev->nbio.ras_if;
        r = amdgpu_ras_late_init(adev, adev->nbio.ras_if,
index 3811b6b6a192daa005808c623f71647b2ad8c23d..96a8fd0ca1df3177ccfb9c6615daf1caa0f2b161 100644 (file)
@@ -64,7 +64,6 @@ const char *ras_block_string[] = {
 };
 
 #define ras_err_str(i) (ras_error_string[ffs(i)])
-#define ras_block_str(i) (ras_block_string[i])
 
 #define RAS_DEFAULT_FLAGS (AMDGPU_RAS_FLAG_INIT_BY_VBIOS)
 
@@ -530,7 +529,7 @@ static inline void put_obj(struct ras_manager *obj)
        if (obj && (--obj->use == 0))
                list_del(&obj->node);
        if (obj && (obj->use < 0))
-               DRM_ERROR("RAS ERROR: Unbalance obj(%s) use\n", obj->head.name);
+               DRM_ERROR("RAS ERROR: Unbalance obj(%s) use\n", ras_block_str(obj->head.block));
 }
 
 /* make one obj and return it. */
@@ -793,7 +792,6 @@ static int amdgpu_ras_enable_all_features(struct amdgpu_device *adev,
                        .type = default_ras_type,
                        .sub_block_index = 0,
                };
-               strcpy(head.name, ras_block_str(i));
                if (bypass) {
                        /*
                         * bypass psp. vbios enable ras for us.
index 471ffe885fdf22c5ecabcd4a7dc6c15dc10e194d..abc5710898e80345eadeb8048fe37b1c2132bfa4 100644 (file)
@@ -53,6 +53,9 @@ enum amdgpu_ras_block {
        AMDGPU_RAS_BLOCK__LAST
 };
 
+extern const char *ras_block_string[];
+
+#define ras_block_str(i) (ras_block_string[i])
 #define AMDGPU_RAS_BLOCK_COUNT AMDGPU_RAS_BLOCK__LAST
 #define AMDGPU_RAS_BLOCK_MASK  ((1ULL << AMDGPU_RAS_BLOCK_COUNT) - 1)
 
@@ -306,8 +309,6 @@ struct ras_common_if {
        enum amdgpu_ras_block block;
        enum amdgpu_ras_error_type type;
        uint32_t sub_block_index;
-       /* block name */
-       char name[32];
 };
 
 struct amdgpu_ras {
index de91d29c9d963a2cf68da44ac3df9303559a986e..65debb65a5dfac37a0ad1071e31847e43abff0df 100644 (file)
@@ -105,7 +105,6 @@ int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
                adev->sdma.ras_if->block = AMDGPU_RAS_BLOCK__SDMA;
                adev->sdma.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
                adev->sdma.ras_if->sub_block_index = 0;
-               strcpy(adev->sdma.ras_if->name, "sdma");
        }
        fs_info.head = ih_info->head = *adev->sdma.ras_if;
 
index 0c7c56a91b251dbb21f2269193bb7c5ab45a7283..a90029ee9733e9b83e97db3ed739871a12682f7e 100644 (file)
@@ -41,7 +41,6 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev)
                adev->umc.ras_if->block = AMDGPU_RAS_BLOCK__UMC;
                adev->umc.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
                adev->umc.ras_if->sub_block_index = 0;
-               strcpy(adev->umc.ras_if->name, "umc");
        }
        ih_info.head = fs_info.head = *adev->umc.ras_if;
 
index 258cf86b32f6e29fddc42b4b02dde0b458e37ed9..2e47bc4467003a2418def384334f6c419eee8dd6 100644 (file)
@@ -663,7 +663,6 @@ static int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev)
                adev->gmc.xgmi.ras_if->block = AMDGPU_RAS_BLOCK__XGMI_WAFL;
                adev->gmc.xgmi.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
                adev->gmc.xgmi.ras_if->sub_block_index = 0;
-               strcpy(adev->gmc.xgmi.ras_if->name, "xgmi_wafl");
        }
        ih_info.head = fs_info.head = *adev->gmc.xgmi.ras_if;
        r = amdgpu_ras_late_init(adev, adev->gmc.xgmi.ras_if,
index cef929746739d189b2fdf65e7ce4b9886dc57ad6..1c94a14fc18d5e8b24cd810e8ffc15ba0c77cb22 100644 (file)
@@ -372,13 +372,13 @@ static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device
                                                "errors detected in %s block, "
                                                "no user action is needed.\n",
                                                obj->err_data.ce_count,
-                                               adev->nbio.ras_if->name);
+                                               ras_block_str(adev->nbio.ras_if->block));
 
                        if (err_data.ue_count)
                                dev_info(adev->dev, "%ld uncorrectable hardware "
                                                "errors detected in %s block\n",
                                                obj->err_data.ue_count,
-                                               adev->nbio.ras_if->name);
+                                               ras_block_str(adev->nbio.ras_if->block));
                }
 
                dev_info(adev->dev, "RAS controller interrupt triggered "